Tim Rowley feecd7dcf5 swr: [rasterizer core] Frontend SIMD16 WIP ...

SIMD16 Primitive Assembly (PA) only supports TriList and RectList.

CUT_AWARE_PA, TESS, GS, and SO disabled in the SIMD16 front end.

Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>

2017-02-08 13:57:10 -06:00

..

amd

radv: handle dcc in explicit image resolve path. (v2)

2017-02-07 23:31:08 +00:00

compiler

spirv: Add more asserts in vtn_vector_construct

2017-02-07 08:08:06 -08:00

egl

android: fix droid_create_image_from_prime_fd_yuv for YV12

2017-02-03 07:44:33 +02:00

gallium

swr: [rasterizer core] Frontend SIMD16 WIP

2017-02-08 13:57:10 -06:00

gbm

gbm/dri: fix memory leaks in error path

2017-01-27 17:56:58 +00:00

getopt

Introduce .editorconfig

2016-08-31 17:06:54 -07:00

glx

glx: guard swap-interval functions against destroyed drawables

2017-02-06 17:39:30 +01:00

gtest

gtest: Update to 1.8.0.

2017-01-20 11:40:52 -08:00

hgl

glapi/hgl: remove the final user of _glapi_check_table()

2016-10-06 15:03:46 +01:00

intel

anv/pipeline: set ThreadDispatchEnable conditionally

2017-02-06 10:27:44 +01:00

loader

loader: Add an environment variable to override driver name choice.

2017-02-06 12:44:06 -08:00

mapi

mapi: automake: include builddir prior to srcdir

2017-01-27 17:56:56 +00:00

mesa

mesa: use PRId64/PRIu64 when printing 64-bit ints

2017-02-08 13:50:01 +11:00

util

glsl: Switch to disable-by-default for the GLSL shader cache

2017-01-31 09:51:30 +11:00

vulkan

vulkan/wsi: Lower the maximum image sizes

2017-01-25 09:05:30 -08:00

Makefile.am

vulkan: automake: do not use EXTRA_DIST in a conditional

2017-01-18 13:41:32 +00:00

SConscript

scons: put the generated git_sha1.h file in top-level src/ directory

2016-06-17 10:33:00 -06:00