
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Reviewed-by: Marek Olšák <marek.olsak@amd.com>
776 lines
23 KiB
C
776 lines
23 KiB
C
/*
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* Mesa 3-D graphics library
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*
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* Copyright (C) 2012-2013 LunarG, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* Chia-I Wu <olv@lunarg.com>
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*/
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#include "pipe/p_state.h"
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#include "os/os_misc.h"
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#include "util/u_format_s3tc.h"
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#include "vl/vl_decoder.h"
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#include "vl/vl_video_buffer.h"
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#include "genhw/genhw.h" /* for GEN6_REG_TIMESTAMP */
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#include "core/intel_winsys.h"
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#include "ilo_context.h"
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#include "ilo_format.h"
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#include "ilo_resource.h"
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#include "ilo_transfer.h" /* for ILO_TRANSFER_MAP_BUFFER_ALIGNMENT */
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#include "ilo_public.h"
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#include "ilo_screen.h"
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struct pipe_fence_handle {
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struct pipe_reference reference;
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struct intel_bo *seqno_bo;
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};
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static float
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ilo_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
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{
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switch (param) {
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case PIPE_CAPF_MAX_LINE_WIDTH:
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/* in U3.7, defined in 3DSTATE_SF */
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return 7.0f;
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case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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/* line width minus one, which is reserved for AA region */
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return 6.0f;
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case PIPE_CAPF_MAX_POINT_WIDTH:
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/* in U8.3, defined in 3DSTATE_SF */
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return 255.0f;
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case PIPE_CAPF_MAX_POINT_WIDTH_AA:
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/* same as point width, as we ignore rasterizer->point_smooth */
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return 255.0f;
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case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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/* [2.0, 16.0], defined in SAMPLER_STATE */
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return 16.0f;
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case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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/* [-16.0, 16.0), defined in SAMPLER_STATE */
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return 15.0f;
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case PIPE_CAPF_GUARD_BAND_LEFT:
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case PIPE_CAPF_GUARD_BAND_TOP:
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case PIPE_CAPF_GUARD_BAND_RIGHT:
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case PIPE_CAPF_GUARD_BAND_BOTTOM:
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/* what are these for? */
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return 0.0f;
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default:
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return 0.0f;
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}
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}
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static int
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ilo_get_shader_param(struct pipe_screen *screen, unsigned shader,
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enum pipe_shader_cap param)
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{
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switch (shader) {
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case PIPE_SHADER_FRAGMENT:
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case PIPE_SHADER_VERTEX:
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case PIPE_SHADER_GEOMETRY:
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break;
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default:
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return 0;
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}
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switch (param) {
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/* the limits are copied from the classic driver */
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case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
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return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 16384;
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case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
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return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
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case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
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return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
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case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
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return (shader == PIPE_SHADER_FRAGMENT) ? 1024 : 0;
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case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
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return UINT_MAX;
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case PIPE_SHADER_CAP_MAX_INPUTS:
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case PIPE_SHADER_CAP_MAX_OUTPUTS:
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/* this is limited by how many attributes SF can remap */
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return 16;
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case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
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return 1024 * sizeof(float[4]);
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case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
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return ILO_MAX_CONST_BUFFERS;
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case PIPE_SHADER_CAP_MAX_TEMPS:
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return 256;
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case PIPE_SHADER_CAP_MAX_PREDS:
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return 0;
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case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
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return 1;
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case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
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return 0;
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case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
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return 0;
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case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
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return (shader == PIPE_SHADER_FRAGMENT) ? 0 : 1;
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case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
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return 1;
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case PIPE_SHADER_CAP_SUBROUTINES:
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return 0;
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case PIPE_SHADER_CAP_INTEGERS:
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return 1;
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case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
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return ILO_MAX_SAMPLERS;
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case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
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return ILO_MAX_SAMPLER_VIEWS;
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case PIPE_SHADER_CAP_PREFERRED_IR:
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return PIPE_SHADER_IR_TGSI;
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case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
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return 1;
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case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
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return 32;
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default:
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return 0;
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}
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}
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static int
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ilo_get_video_param(struct pipe_screen *screen,
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enum pipe_video_profile profile,
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enum pipe_video_entrypoint entrypoint,
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enum pipe_video_cap param)
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{
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switch (param) {
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case PIPE_VIDEO_CAP_SUPPORTED:
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return vl_profile_supported(screen, profile, entrypoint);
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case PIPE_VIDEO_CAP_NPOT_TEXTURES:
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return 1;
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case PIPE_VIDEO_CAP_MAX_WIDTH:
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case PIPE_VIDEO_CAP_MAX_HEIGHT:
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return vl_video_buffer_max_size(screen);
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case PIPE_VIDEO_CAP_PREFERED_FORMAT:
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return PIPE_FORMAT_NV12;
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case PIPE_VIDEO_CAP_PREFERS_INTERLACED:
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return 1;
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case PIPE_VIDEO_CAP_SUPPORTS_PROGRESSIVE:
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return 1;
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case PIPE_VIDEO_CAP_SUPPORTS_INTERLACED:
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return 0;
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case PIPE_VIDEO_CAP_MAX_LEVEL:
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return vl_level_supported(screen, profile);
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default:
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return 0;
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}
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}
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static int
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ilo_get_compute_param(struct pipe_screen *screen,
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enum pipe_compute_cap param,
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void *ret)
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{
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struct ilo_screen *is = ilo_screen(screen);
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union {
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const char *ir_target;
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uint64_t grid_dimension;
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uint64_t max_grid_size[3];
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uint64_t max_block_size[3];
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uint64_t max_threads_per_block;
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uint64_t max_global_size;
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uint64_t max_local_size;
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uint64_t max_private_size;
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uint64_t max_input_size;
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uint64_t max_mem_alloc_size;
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uint32_t max_clock_frequency;
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uint32_t max_compute_units;
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uint32_t images_supported;
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uint32_t subgroup_size;
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} val;
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const void *ptr;
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int size;
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switch (param) {
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case PIPE_COMPUTE_CAP_IR_TARGET:
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val.ir_target = "ilog";
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ptr = val.ir_target;
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size = strlen(val.ir_target) + 1;
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break;
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case PIPE_COMPUTE_CAP_GRID_DIMENSION:
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val.grid_dimension = Elements(val.max_grid_size);
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ptr = &val.grid_dimension;
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size = sizeof(val.grid_dimension);
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break;
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case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
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val.max_grid_size[0] = 0xffffffffu;
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val.max_grid_size[1] = 0xffffffffu;
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val.max_grid_size[2] = 0xffffffffu;
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ptr = &val.max_grid_size;
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size = sizeof(val.max_grid_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
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val.max_block_size[0] = 1024;
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val.max_block_size[1] = 1024;
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val.max_block_size[2] = 1024;
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ptr = &val.max_block_size;
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size = sizeof(val.max_block_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
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val.max_threads_per_block = 1024;
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ptr = &val.max_threads_per_block;
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size = sizeof(val.max_threads_per_block);
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break;
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case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
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/* \see ilo_max_resource_size */
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val.max_global_size = 1u << 31;
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ptr = &val.max_global_size;
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size = sizeof(val.max_global_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
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/* Shared Local Memory Size of INTERFACE_DESCRIPTOR_DATA */
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val.max_local_size = 64 * 1024;
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ptr = &val.max_local_size;
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size = sizeof(val.max_local_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
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/* scratch size */
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val.max_private_size = 12 * 1024;
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ptr = &val.max_private_size;
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size = sizeof(val.max_private_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
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val.max_input_size = 1024;
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ptr = &val.max_input_size;
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size = sizeof(val.max_input_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
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val.max_mem_alloc_size = 1u << 31;
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ptr = &val.max_mem_alloc_size;
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size = sizeof(val.max_mem_alloc_size);
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break;
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case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
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val.max_clock_frequency = 1000;
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ptr = &val.max_clock_frequency;
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size = sizeof(val.max_clock_frequency);
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break;
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case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
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val.max_compute_units = is->dev.eu_count;
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ptr = &val.max_compute_units;
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size = sizeof(val.max_compute_units);
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break;
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case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
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val.images_supported = 1;
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ptr = &val.images_supported;
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size = sizeof(val.images_supported);
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break;
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case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
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/* best case is actually SIMD32 */
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val.subgroup_size = 16;
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ptr = &val.subgroup_size;
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size = sizeof(val.subgroup_size);
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break;
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default:
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ptr = NULL;
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size = 0;
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break;
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}
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if (ret)
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memcpy(ret, ptr, size);
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return size;
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}
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static int
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ilo_get_param(struct pipe_screen *screen, enum pipe_cap param)
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{
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struct ilo_screen *is = ilo_screen(screen);
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switch (param) {
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case PIPE_CAP_NPOT_TEXTURES:
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case PIPE_CAP_TWO_SIDED_STENCIL:
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return true;
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case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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return 0; /* TODO */
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case PIPE_CAP_ANISOTROPIC_FILTER:
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case PIPE_CAP_POINT_SPRITE:
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return true;
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return ILO_MAX_DRAW_BUFFERS;
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case PIPE_CAP_OCCLUSION_QUERY:
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case PIPE_CAP_QUERY_TIME_ELAPSED:
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case PIPE_CAP_TEXTURE_SHADOW_MAP:
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case PIPE_CAP_TEXTURE_SWIZZLE: /* must be supported for shadow map */
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return true;
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case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
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/*
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* As defined in SURFACE_STATE, we have
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*
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* Max WxHxD for 2D and CUBE Max WxHxD for 3D
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* GEN6 8192x8192x512 2048x2048x2048
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* GEN7 16384x16384x2048 2048x2048x2048
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*/
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return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 15 : 14;
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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return 12;
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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return (ilo_dev_gen(&is->dev) >= ILO_GEN(7)) ? 15 : 14;
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
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return false;
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case PIPE_CAP_BLEND_EQUATION_SEPARATE:
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case PIPE_CAP_SM3:
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return true;
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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if (ilo_dev_gen(&is->dev) >= ILO_GEN(7) && !is->dev.has_gen7_sol_reset)
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return 0;
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return ILO_MAX_SO_BUFFERS;
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case PIPE_CAP_PRIMITIVE_RESTART:
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return true;
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case PIPE_CAP_INDEP_BLEND_ENABLE:
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case PIPE_CAP_INDEP_BLEND_FUNC:
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return true;
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case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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return (ilo_dev_gen(&is->dev) >= ILO_GEN(7.5)) ? 2048 : 512;
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
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case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
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case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
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case PIPE_CAP_DEPTH_CLIP_DISABLE:
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return true;
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case PIPE_CAP_SHADER_STENCIL_EXPORT:
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return false;
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case PIPE_CAP_TGSI_INSTANCEID:
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case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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return true;
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case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
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return false;
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case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
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return true;
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case PIPE_CAP_SEAMLESS_CUBE_MAP:
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case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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return true;
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case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
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case PIPE_CAP_MIN_TEXEL_OFFSET:
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return -8;
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case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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case PIPE_CAP_MAX_TEXEL_OFFSET:
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return 7;
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case PIPE_CAP_CONDITIONAL_RENDER:
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case PIPE_CAP_TEXTURE_BARRIER:
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return true;
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case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
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return ILO_MAX_SO_BINDINGS / ILO_MAX_SO_BUFFERS;
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case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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return ILO_MAX_SO_BINDINGS;
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case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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if (ilo_dev_gen(&is->dev) >= ILO_GEN(7))
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return is->dev.has_gen7_sol_reset;
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else
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return false; /* TODO */
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case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
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return false;
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case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
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return true;
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case PIPE_CAP_VERTEX_COLOR_CLAMPED:
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return false;
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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return 140;
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case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
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case PIPE_CAP_USER_VERTEX_BUFFERS:
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return false;
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case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
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case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
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case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
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return false;
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case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
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return 2048;
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case PIPE_CAP_COMPUTE:
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return false; /* TODO */
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case PIPE_CAP_USER_INDEX_BUFFERS:
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case PIPE_CAP_USER_CONSTANT_BUFFERS:
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return true;
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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/* imposed by OWord (Dual) Block Read */
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return 16;
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case PIPE_CAP_START_INSTANCE:
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return true;
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case PIPE_CAP_QUERY_TIMESTAMP:
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return is->dev.has_timestamp;
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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return false; /* TODO */
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case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
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return ILO_TRANSFER_MAP_BUFFER_ALIGNMENT;
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case PIPE_CAP_CUBE_MAP_ARRAY:
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case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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return true;
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case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
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return 0;
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case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
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return 1;
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case PIPE_CAP_TGSI_TEXCOORD:
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return false;
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case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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return true;
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case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
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return 0;
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case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
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/* a GEN6_SURFTYPE_BUFFER can have up to 2^27 elements */
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return 1 << 27;
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case PIPE_CAP_MAX_VIEWPORTS:
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return ILO_MAX_VIEWPORTS;
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case PIPE_CAP_ENDIANNESS:
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return PIPE_ENDIAN_LITTLE;
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case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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return true;
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case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
|
|
case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
|
|
case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
|
|
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
|
|
case PIPE_CAP_TEXTURE_GATHER_SM5:
|
|
return 0;
|
|
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
|
|
case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
|
|
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
|
|
return true;
|
|
case PIPE_CAP_FAKE_SW_MSAA:
|
|
case PIPE_CAP_TEXTURE_QUERY_LOD:
|
|
case PIPE_CAP_SAMPLE_SHADING:
|
|
case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
|
|
case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
|
|
case PIPE_CAP_MAX_VERTEX_STREAMS:
|
|
case PIPE_CAP_DRAW_INDIRECT:
|
|
case PIPE_CAP_MULTI_DRAW_INDIRECT:
|
|
case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
|
|
case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
|
|
case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
|
|
case PIPE_CAP_SAMPLER_VIEW_TARGET:
|
|
case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
|
|
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
|
|
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
|
|
case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
|
|
case PIPE_CAP_DEPTH_BOUNDS_TEST:
|
|
case PIPE_CAP_TGSI_TXQS:
|
|
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
|
|
case PIPE_CAP_SHAREABLE_SHADERS:
|
|
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
|
|
case PIPE_CAP_CLEAR_TEXTURE:
|
|
case PIPE_CAP_DRAW_PARAMETERS:
|
|
case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
|
|
case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
|
|
case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
|
|
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
|
|
case PIPE_CAP_INVALIDATE_BUFFER:
|
|
case PIPE_CAP_GENERATE_MIPMAP:
|
|
case PIPE_CAP_STRING_MARKER:
|
|
case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
|
|
case PIPE_CAP_QUERY_BUFFER_OBJECT:
|
|
return 0;
|
|
|
|
case PIPE_CAP_VENDOR_ID:
|
|
return 0x8086;
|
|
case PIPE_CAP_DEVICE_ID:
|
|
return is->dev.devid;
|
|
case PIPE_CAP_ACCELERATED:
|
|
return true;
|
|
case PIPE_CAP_VIDEO_MEMORY: {
|
|
/* Once a batch uses more than 75% of the maximum mappable size, we
|
|
* assume that there's some fragmentation, and we start doing extra
|
|
* flushing, etc. That's the big cliff apps will care about.
|
|
*/
|
|
const uint64_t gpu_memory = is->dev.aperture_total * 3 / 4;
|
|
uint64_t system_memory;
|
|
|
|
if (!os_get_total_physical_memory(&system_memory))
|
|
return 0;
|
|
|
|
return (int) (MIN2(gpu_memory, system_memory) >> 20);
|
|
}
|
|
case PIPE_CAP_UMA:
|
|
return true;
|
|
case PIPE_CAP_CLIP_HALFZ:
|
|
return true;
|
|
case PIPE_CAP_VERTEXID_NOBASE:
|
|
return false;
|
|
case PIPE_CAP_POLYGON_OFFSET_CLAMP:
|
|
return true;
|
|
|
|
default:
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
static const char *
|
|
ilo_get_vendor(struct pipe_screen *screen)
|
|
{
|
|
return "LunarG, Inc.";
|
|
}
|
|
|
|
static const char *
|
|
ilo_get_device_vendor(struct pipe_screen *screen)
|
|
{
|
|
return "Intel";
|
|
}
|
|
|
|
static const char *
|
|
ilo_get_name(struct pipe_screen *screen)
|
|
{
|
|
struct ilo_screen *is = ilo_screen(screen);
|
|
const char *chipset = NULL;
|
|
|
|
if (gen_is_chv(is->dev.devid)) {
|
|
chipset = "Intel(R) Cherryview";
|
|
} else if (gen_is_bdw(is->dev.devid)) {
|
|
/* this is likely wrong */
|
|
if (gen_is_desktop(is->dev.devid))
|
|
chipset = "Intel(R) Broadwell Desktop";
|
|
else if (gen_is_mobile(is->dev.devid))
|
|
chipset = "Intel(R) Broadwell Mobile";
|
|
else if (gen_is_server(is->dev.devid))
|
|
chipset = "Intel(R) Broadwell Server";
|
|
} else if (gen_is_vlv(is->dev.devid)) {
|
|
chipset = "Intel(R) Bay Trail";
|
|
} else if (gen_is_hsw(is->dev.devid)) {
|
|
if (gen_is_desktop(is->dev.devid))
|
|
chipset = "Intel(R) Haswell Desktop";
|
|
else if (gen_is_mobile(is->dev.devid))
|
|
chipset = "Intel(R) Haswell Mobile";
|
|
else if (gen_is_server(is->dev.devid))
|
|
chipset = "Intel(R) Haswell Server";
|
|
} else if (gen_is_ivb(is->dev.devid)) {
|
|
if (gen_is_desktop(is->dev.devid))
|
|
chipset = "Intel(R) Ivybridge Desktop";
|
|
else if (gen_is_mobile(is->dev.devid))
|
|
chipset = "Intel(R) Ivybridge Mobile";
|
|
else if (gen_is_server(is->dev.devid))
|
|
chipset = "Intel(R) Ivybridge Server";
|
|
} else if (gen_is_snb(is->dev.devid)) {
|
|
if (gen_is_desktop(is->dev.devid))
|
|
chipset = "Intel(R) Sandybridge Desktop";
|
|
else if (gen_is_mobile(is->dev.devid))
|
|
chipset = "Intel(R) Sandybridge Mobile";
|
|
else if (gen_is_server(is->dev.devid))
|
|
chipset = "Intel(R) Sandybridge Server";
|
|
}
|
|
|
|
if (!chipset)
|
|
chipset = "Unknown Intel Chipset";
|
|
|
|
return chipset;
|
|
}
|
|
|
|
static uint64_t
|
|
ilo_get_timestamp(struct pipe_screen *screen)
|
|
{
|
|
struct ilo_screen *is = ilo_screen(screen);
|
|
union {
|
|
uint64_t val;
|
|
uint32_t dw[2];
|
|
} timestamp;
|
|
|
|
intel_winsys_read_reg(is->dev.winsys, GEN6_REG_TIMESTAMP, ×tamp.val);
|
|
|
|
/*
|
|
* From the Ivy Bridge PRM, volume 1 part 3, page 107:
|
|
*
|
|
* "Note: This timestamp register reflects the value of the PCU TSC.
|
|
* The PCU TSC counts 10ns increments; this timestamp reflects bits
|
|
* 38:3 of the TSC (i.e. 80ns granularity, rolling over every 1.5
|
|
* hours)."
|
|
*
|
|
* However, it seems dw[0] is garbage and dw[1] contains the lower 32 bits
|
|
* of the timestamp. We will have to live with a timestamp that rolls over
|
|
* every ~343 seconds.
|
|
*
|
|
* See also brw_get_timestamp().
|
|
*/
|
|
return (uint64_t) timestamp.dw[1] * 80;
|
|
}
|
|
|
|
static boolean
|
|
ilo_is_format_supported(struct pipe_screen *screen,
|
|
enum pipe_format format,
|
|
enum pipe_texture_target target,
|
|
unsigned sample_count,
|
|
unsigned bindings)
|
|
{
|
|
struct ilo_screen *is = ilo_screen(screen);
|
|
const struct ilo_dev *dev = &is->dev;
|
|
|
|
if (!util_format_is_supported(format, bindings))
|
|
return false;
|
|
|
|
/* no MSAA support yet */
|
|
if (sample_count > 1)
|
|
return false;
|
|
|
|
if ((bindings & PIPE_BIND_DEPTH_STENCIL) &&
|
|
!ilo_format_support_zs(dev, format))
|
|
return false;
|
|
|
|
if ((bindings & PIPE_BIND_RENDER_TARGET) &&
|
|
!ilo_format_support_rt(dev, format))
|
|
return false;
|
|
|
|
if ((bindings & PIPE_BIND_SAMPLER_VIEW) &&
|
|
!ilo_format_support_sampler(dev, format))
|
|
return false;
|
|
|
|
if ((bindings & PIPE_BIND_VERTEX_BUFFER) &&
|
|
!ilo_format_support_vb(dev, format))
|
|
return false;
|
|
|
|
return true;
|
|
}
|
|
|
|
static boolean
|
|
ilo_is_video_format_supported(struct pipe_screen *screen,
|
|
enum pipe_format format,
|
|
enum pipe_video_profile profile,
|
|
enum pipe_video_entrypoint entrypoint)
|
|
{
|
|
return vl_video_buffer_is_format_supported(screen, format, profile, entrypoint);
|
|
}
|
|
|
|
static void
|
|
ilo_screen_fence_reference(struct pipe_screen *screen,
|
|
struct pipe_fence_handle **ptr,
|
|
struct pipe_fence_handle *fence)
|
|
{
|
|
struct pipe_fence_handle *old;
|
|
|
|
if (likely(ptr)) {
|
|
old = *ptr;
|
|
*ptr = fence;
|
|
} else {
|
|
old = NULL;
|
|
}
|
|
|
|
STATIC_ASSERT(&((struct pipe_fence_handle *) NULL)->reference == NULL);
|
|
if (pipe_reference(&old->reference, &fence->reference)) {
|
|
intel_bo_unref(old->seqno_bo);
|
|
FREE(old);
|
|
}
|
|
}
|
|
|
|
static boolean
|
|
ilo_screen_fence_finish(struct pipe_screen *screen,
|
|
struct pipe_fence_handle *fence,
|
|
uint64_t timeout)
|
|
{
|
|
const int64_t wait_timeout = (timeout > INT64_MAX) ? -1 : timeout;
|
|
bool signaled;
|
|
|
|
signaled = (!fence->seqno_bo ||
|
|
intel_bo_wait(fence->seqno_bo, wait_timeout) == 0);
|
|
|
|
/* XXX not thread safe */
|
|
if (signaled && fence->seqno_bo) {
|
|
intel_bo_unref(fence->seqno_bo);
|
|
fence->seqno_bo = NULL;
|
|
}
|
|
|
|
return signaled;
|
|
}
|
|
|
|
/**
|
|
* Create a fence for \p bo. When \p bo is not NULL, it must be submitted
|
|
* before waited on or checked.
|
|
*/
|
|
struct pipe_fence_handle *
|
|
ilo_screen_fence_create(struct pipe_screen *screen, struct intel_bo *bo)
|
|
{
|
|
struct pipe_fence_handle *fence;
|
|
|
|
fence = CALLOC_STRUCT(pipe_fence_handle);
|
|
if (!fence)
|
|
return NULL;
|
|
|
|
pipe_reference_init(&fence->reference, 1);
|
|
|
|
fence->seqno_bo = intel_bo_ref(bo);
|
|
|
|
return fence;
|
|
}
|
|
|
|
static void
|
|
ilo_screen_destroy(struct pipe_screen *screen)
|
|
{
|
|
struct ilo_screen *is = ilo_screen(screen);
|
|
|
|
intel_winsys_destroy(is->dev.winsys);
|
|
|
|
FREE(is);
|
|
}
|
|
|
|
struct pipe_screen *
|
|
ilo_screen_create(struct intel_winsys *ws)
|
|
{
|
|
struct ilo_screen *is;
|
|
|
|
ilo_debug_init("ILO_DEBUG");
|
|
|
|
is = CALLOC_STRUCT(ilo_screen);
|
|
if (!is)
|
|
return NULL;
|
|
|
|
if (!ilo_dev_init(&is->dev, ws)) {
|
|
FREE(is);
|
|
return NULL;
|
|
}
|
|
|
|
util_format_s3tc_init();
|
|
|
|
is->base.destroy = ilo_screen_destroy;
|
|
is->base.get_name = ilo_get_name;
|
|
is->base.get_vendor = ilo_get_vendor;
|
|
is->base.get_device_vendor = ilo_get_device_vendor;
|
|
is->base.get_param = ilo_get_param;
|
|
is->base.get_paramf = ilo_get_paramf;
|
|
is->base.get_shader_param = ilo_get_shader_param;
|
|
is->base.get_video_param = ilo_get_video_param;
|
|
is->base.get_compute_param = ilo_get_compute_param;
|
|
|
|
is->base.get_timestamp = ilo_get_timestamp;
|
|
|
|
is->base.is_format_supported = ilo_is_format_supported;
|
|
is->base.is_video_format_supported = ilo_is_video_format_supported;
|
|
|
|
is->base.flush_frontbuffer = NULL;
|
|
|
|
is->base.fence_reference = ilo_screen_fence_reference;
|
|
is->base.fence_finish = ilo_screen_fence_finish;
|
|
|
|
is->base.get_driver_query_info = NULL;
|
|
|
|
ilo_init_context_functions(is);
|
|
ilo_init_resource_functions(is);
|
|
|
|
return &is->base;
|
|
}
|