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Francisco Jerez ecc19e12dc intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy. 
This is what we use later on to compute the number of registers that
will actually get spilled to memory, so it's more likely to match
reality than the current open-coded approximation.

Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Plamena Manolova <plamena.manolova@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-04-24 10:59:56 -07:00
..
.gitignore
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_cfg.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_cfg.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_compiler.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_compiler.h
anv/pipeline: make FragCoord include sample positions when sample shading
2017-03-24 08:11:53 +01:00
brw_dead_control_flow.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_dead_control_flow.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_disasm.c
i965/disasm: also print nibctrl in IVB for execsize=8
2017-04-14 14:56:06 -07:00
brw_eu_compact.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_eu_defines.h
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
2017-04-14 14:56:08 -07:00
brw_eu_emit.c
i965: Use correct VertStride on align16 instructions.
2017-04-14 14:56:09 -07:00
brw_eu_util.c
intel/compiler: whitespace cleanups
2017-03-13 11:16:35 +00:00
brw_eu_validate.c
i965: Handle IVB DF differences in the validator.
2017-04-14 14:56:07 -07:00
brw_eu.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_eu.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_builder.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_cmod_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_combine_constants.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_copy_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_cse.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_dead_code_eliminate.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_generator.cpp
i965/fs: Get 64-bit indirect moves working on IVB.
2017-04-14 14:56:08 -07:00
brw_fs_live_variables.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_live_variables.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_fs_lower_conversions.cpp
i965/fs: rename lower_d2x to lower_conversions
2017-04-14 14:56:07 -07:00
brw_fs_lower_pack.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_nir.cpp
i965/fs: Always provide a default LOD of 0 for TXS and TXL
2017-04-04 18:33:35 -07:00
brw_fs_reg_allocate.cpp
intel/fs: Use regs_written() in spilling cost heuristic for improved accuracy.
2017-04-24 10:59:56 -07:00
brw_fs_register_coalesce.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_saturate_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_sel_peephole.cpp
Revert "i965/fs: Don't emit SEL instructions for type-converting MOVs."
2017-04-14 14:56:07 -07:00
brw_fs_surface_builder.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_surface_builder.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_validate.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs_visitor.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_fs.cpp
i965/fs: lower all non-force_writemask_all DF instructions to SIMD4 on IVB/BYT
2017-04-14 14:56:08 -07:00
brw_fs.h
i965/fs: rename lower_d2x to lower_conversions
2017-04-14 14:56:07 -07:00
brw_inst.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_interpolation_map.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_ir_allocator.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_ir_fs.h
i965/fs: add helper to retrieve instruction execution type
2017-04-14 14:56:07 -07:00
brw_ir_vec4.h
i965/vec4: don't do horizontal stride on some register file types
2017-04-14 14:56:09 -07:00
brw_nir_analyze_boolean_resolves.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_nir_attribute_workarounds.c
nir: Rework conversion opcodes
2017-03-14 07:36:40 -07:00
brw_nir_intrinsics.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_nir_opt_peephole_ffma.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_nir_tcs_workarounds.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_nir_trig_workarounds.py
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_nir.c
nir/i965: add before ffma algebraic opts
2017-04-24 12:08:14 +10:00
brw_nir.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_packed_float.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_predicated_break.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_reg.h
i965/fs: add helper to retrieve instruction execution type
2017-04-14 14:56:07 -07:00
brw_schedule_instructions.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_shader.cpp
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
2017-04-14 14:56:08 -07:00
brw_shader.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_vec4_builder.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_cmod_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_copy_propagation.cpp
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
2017-04-14 14:56:08 -07:00
brw_vec4_cse.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_dead_code_eliminate.cpp
i965/vec4/dce: improve track of partial flag register writes
2017-04-14 14:56:09 -07:00
brw_vec4_generator.cpp
i965/vec4: Fix exec size for MOVs {SET,PICK}_{HIGH,LOW}_32BIT.
2017-04-14 14:56:09 -07:00
brw_vec4_gs_nir.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_gs_visitor.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_gs_visitor.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_live_variables.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_live_variables.h
i965/vec4: consider subregister offset in live variables
2017-04-14 14:56:08 -07:00
brw_vec4_nir.cpp
i965/vec4: use vec4_builder to emit instructions in setup_imm_df()
2017-04-14 14:56:09 -07:00
brw_vec4_reg_allocate.cpp
i965/vec4: split VEC4_OPCODE_FROM_DOUBLE into one opcode per destination's type
2017-04-14 14:56:08 -07:00
brw_vec4_surface_builder.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_surface_builder.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_tcs.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_tcs.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_tes.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_tes.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_visitor.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_vs_visitor.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4_vs.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_vec4.cpp
i965/vec4: Use reads_accumulator_implicitly(), not MACH checks.
2017-04-24 10:53:49 -07:00
brw_vec4.h
i965/vec4: use vec4_builder to emit instructions in setup_imm_df()
2017-04-14 14:56:09 -07:00
brw_vue_map.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
brw_wm_iz.cpp
intel/compiler: whitespace cleanups
2017-03-13 11:16:35 +00:00
gen6_gs_visitor.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
gen6_gs_visitor.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
intel_asm_annotation.c
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
intel_asm_annotation.h
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_eu_compact.cpp
intel/compiler: link all tests again gtest, even test_eu_compact"
2017-03-13 11:16:35 +00:00
test_eu_validate.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_fs_cmod_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_fs_copy_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_fs_saturate_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_vec4_cmod_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_vec4_copy_propagation.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_vec4_register_coalesce.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00
test_vf_float_conversions.cpp
i965: Move the back-end compiler to src/intel/compiler
2017-03-13 11:16:34 +00:00