1135 lines
36 KiB
C
1135 lines
36 KiB
C
/**********************************************************
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* Copyright 2008-2009 VMware, Inc. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use, copy,
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* modify, merge, publish, distribute, sublicense, and/or sell copies
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* of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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**********************************************************/
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#include "util/u_format.h"
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#include "util/u_memory.h"
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#include "util/u_inlines.h"
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#include "util/u_string.h"
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#include "util/u_math.h"
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#include "svga_winsys.h"
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#include "svga_public.h"
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#include "svga_context.h"
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#include "svga_format.h"
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#include "svga_screen.h"
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#include "svga_tgsi.h"
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#include "svga_resource_texture.h"
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#include "svga_resource.h"
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#include "svga_debug.h"
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#include "svga3d_shaderdefs.h"
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#include "VGPU10ShaderTokens.h"
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/* NOTE: this constant may get moved into a svga3d*.h header file */
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#define SVGA3D_DX_MAX_RESOURCE_SIZE (128 * 1024 * 1024)
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#ifdef DEBUG
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int SVGA_DEBUG = 0;
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static const struct debug_named_value svga_debug_flags[] = {
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{ "dma", DEBUG_DMA, NULL },
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{ "tgsi", DEBUG_TGSI, NULL },
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{ "pipe", DEBUG_PIPE, NULL },
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{ "state", DEBUG_STATE, NULL },
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{ "screen", DEBUG_SCREEN, NULL },
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{ "tex", DEBUG_TEX, NULL },
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{ "swtnl", DEBUG_SWTNL, NULL },
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{ "const", DEBUG_CONSTS, NULL },
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{ "viewport", DEBUG_VIEWPORT, NULL },
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{ "views", DEBUG_VIEWS, NULL },
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{ "perf", DEBUG_PERF, NULL },
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{ "flush", DEBUG_FLUSH, NULL },
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{ "sync", DEBUG_SYNC, NULL },
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{ "cache", DEBUG_CACHE, NULL },
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{ "streamout", DEBUG_STREAMOUT, NULL },
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{ "query", DEBUG_QUERY, NULL },
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DEBUG_NAMED_VALUE_END
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};
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#endif
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static const char *
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svga_get_vendor( struct pipe_screen *pscreen )
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{
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return "VMware, Inc.";
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}
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static const char *
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svga_get_name( struct pipe_screen *pscreen )
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{
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const char *build = "", *llvm = "", *mutex = "";
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static char name[100];
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#ifdef DEBUG
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/* Only return internal details in the DEBUG version:
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*/
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build = "build: DEBUG;";
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mutex = "mutex: " PIPE_ATOMIC ";";
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#elif defined(VMX86_STATS)
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build = "build: OPT;";
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#else
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build = "build: RELEASE;";
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#endif
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#ifdef HAVE_LLVM
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llvm = "LLVM;";
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#endif
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util_snprintf(name, sizeof(name), "SVGA3D; %s %s %s", build, mutex, llvm);
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return name;
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}
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/** Helper for querying float-valued device cap */
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static float
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get_float_cap(struct svga_winsys_screen *sws, unsigned cap, float defaultVal)
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{
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SVGA3dDevCapResult result;
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if (sws->get_cap(sws, cap, &result))
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return result.f;
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else
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return defaultVal;
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}
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/** Helper for querying uint-valued device cap */
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static unsigned
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get_uint_cap(struct svga_winsys_screen *sws, unsigned cap, unsigned defaultVal)
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{
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SVGA3dDevCapResult result;
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if (sws->get_cap(sws, cap, &result))
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return result.u;
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else
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return defaultVal;
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}
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/** Helper for querying boolean-valued device cap */
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static boolean
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get_bool_cap(struct svga_winsys_screen *sws, unsigned cap, boolean defaultVal)
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{
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SVGA3dDevCapResult result;
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if (sws->get_cap(sws, cap, &result))
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return result.b;
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else
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return defaultVal;
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}
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static float
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svga_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
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{
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struct svga_screen *svgascreen = svga_screen(screen);
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struct svga_winsys_screen *sws = svgascreen->sws;
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switch (param) {
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case PIPE_CAPF_MAX_LINE_WIDTH:
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return svgascreen->maxLineWidth;
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case PIPE_CAPF_MAX_LINE_WIDTH_AA:
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return svgascreen->maxLineWidthAA;
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case PIPE_CAPF_MAX_POINT_WIDTH:
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/* fall-through */
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case PIPE_CAPF_MAX_POINT_WIDTH_AA:
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return svgascreen->maxPointSize;
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case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
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return (float) get_uint_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY, 4);
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case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
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return 15.0;
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case PIPE_CAPF_GUARD_BAND_LEFT:
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case PIPE_CAPF_GUARD_BAND_TOP:
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case PIPE_CAPF_GUARD_BAND_RIGHT:
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case PIPE_CAPF_GUARD_BAND_BOTTOM:
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return 0.0;
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}
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debug_printf("Unexpected PIPE_CAPF_ query %u\n", param);
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return 0;
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}
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static int
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svga_get_param(struct pipe_screen *screen, enum pipe_cap param)
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{
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struct svga_screen *svgascreen = svga_screen(screen);
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struct svga_winsys_screen *sws = svgascreen->sws;
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SVGA3dDevCapResult result;
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switch (param) {
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case PIPE_CAP_NPOT_TEXTURES:
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case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
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case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
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return 1;
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case PIPE_CAP_TWO_SIDED_STENCIL:
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return 1;
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case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
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/*
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* "In virtually every OpenGL implementation and hardware,
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* GL_MAX_DUAL_SOURCE_DRAW_BUFFERS is 1"
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* http://www.opengl.org/wiki/Blending
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*/
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return sws->have_vgpu10 ? 1 : 0;
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case PIPE_CAP_ANISOTROPIC_FILTER:
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return 1;
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case PIPE_CAP_POINT_SPRITE:
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return 1;
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case PIPE_CAP_TGSI_TEXCOORD:
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return 0;
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case PIPE_CAP_MAX_RENDER_TARGETS:
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return svgascreen->max_color_buffers;
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case PIPE_CAP_OCCLUSION_QUERY:
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return 1;
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case PIPE_CAP_QUERY_TIME_ELAPSED:
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return 0;
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case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
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return sws->have_vgpu10;
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case PIPE_CAP_TEXTURE_SHADOW_MAP:
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return 1;
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case PIPE_CAP_TEXTURE_SWIZZLE:
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return 1;
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case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
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return 0;
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case PIPE_CAP_USER_VERTEX_BUFFERS:
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return 0;
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case PIPE_CAP_USER_CONSTANT_BUFFERS:
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return 1;
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case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
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return 256;
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case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
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{
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unsigned levels = SVGA_MAX_TEXTURE_LEVELS;
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if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH, &result))
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levels = MIN2(util_logbase2(result.u) + 1, levels);
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else
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levels = 12 /* 2048x2048 */;
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if (sws->get_cap(sws, SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT, &result))
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levels = MIN2(util_logbase2(result.u) + 1, levels);
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else
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levels = 12 /* 2048x2048 */;
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return levels;
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}
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case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
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if (!sws->get_cap(sws, SVGA3D_DEVCAP_MAX_VOLUME_EXTENT, &result))
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return 8; /* max 128x128x128 */
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return MIN2(util_logbase2(result.u) + 1, SVGA_MAX_TEXTURE_LEVELS);
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case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
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/*
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* No mechanism to query the host, and at least limited to 2048x2048 on
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* certain hardware.
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*/
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return MIN2(screen->get_param(screen, PIPE_CAP_MAX_TEXTURE_2D_LEVELS),
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12 /* 2048x2048 */);
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case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
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return sws->have_vgpu10 ? SVGA3D_MAX_SURFACE_ARRAYSIZE : 0;
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case PIPE_CAP_BLEND_EQUATION_SEPARATE: /* req. for GL 1.5 */
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return 1;
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
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return 1;
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case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
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return sws->have_vgpu10;
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case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
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return 0;
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case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
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return !sws->have_vgpu10;
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case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
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return 1; /* The color outputs of vertex shaders are not clamped */
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case PIPE_CAP_VERTEX_COLOR_CLAMPED:
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return 0; /* The driver can't clamp vertex colors */
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case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
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return 0; /* The driver can't clamp fragment colors */
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case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
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return 1; /* expected for GL_ARB_framebuffer_object */
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case PIPE_CAP_GLSL_FEATURE_LEVEL:
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return sws->have_vgpu10 ? 330 : 120;
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case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
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return 0;
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case PIPE_CAP_SM3:
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return 1;
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case PIPE_CAP_DEPTH_CLIP_DISABLE:
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case PIPE_CAP_INDEP_BLEND_ENABLE:
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case PIPE_CAP_CONDITIONAL_RENDER:
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case PIPE_CAP_QUERY_TIMESTAMP:
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case PIPE_CAP_TGSI_INSTANCEID:
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case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
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case PIPE_CAP_SEAMLESS_CUBE_MAP:
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case PIPE_CAP_FAKE_SW_MSAA:
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return sws->have_vgpu10;
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case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
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return sws->have_vgpu10 ? SVGA3D_DX_MAX_SOTARGETS : 0;
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case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
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return sws->have_vgpu10 ? 4 : 0;
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case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
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return sws->have_vgpu10 ? SVGA3D_MAX_STREAMOUT_DECLS : 0;
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case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
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case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
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return 0;
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case PIPE_CAP_TEXTURE_MULTISAMPLE:
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return svgascreen->ms_samples ? 1 : 0;
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case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
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return SVGA3D_DX_MAX_RESOURCE_SIZE;
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case PIPE_CAP_MIN_TEXEL_OFFSET:
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return sws->have_vgpu10 ? VGPU10_MIN_TEXEL_FETCH_OFFSET : 0;
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case PIPE_CAP_MAX_TEXEL_OFFSET:
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return sws->have_vgpu10 ? VGPU10_MAX_TEXEL_FETCH_OFFSET : 0;
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case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
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case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
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return 0;
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case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
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return sws->have_vgpu10 ? 256 : 0;
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case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
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return sws->have_vgpu10 ? 1024 : 0;
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case PIPE_CAP_PRIMITIVE_RESTART:
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return 1; /* may be a sw fallback, depending on restart index */
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case PIPE_CAP_GENERATE_MIPMAP:
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return sws->have_generate_mipmap_cmd;
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/* Unsupported features */
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case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
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case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
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case PIPE_CAP_SHADER_STENCIL_EXPORT:
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case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
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case PIPE_CAP_INDEP_BLEND_FUNC:
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case PIPE_CAP_TEXTURE_BARRIER:
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case PIPE_CAP_MAX_VERTEX_STREAMS:
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case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
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case PIPE_CAP_COMPUTE:
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case PIPE_CAP_START_INSTANCE:
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case PIPE_CAP_CUBE_MAP_ARRAY:
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case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
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case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
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case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
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case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
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case PIPE_CAP_TEXTURE_GATHER_SM5:
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case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
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case PIPE_CAP_TEXTURE_QUERY_LOD:
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case PIPE_CAP_SAMPLE_SHADING:
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case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
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case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
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case PIPE_CAP_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT:
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case PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS:
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case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
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case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
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case PIPE_CAP_SAMPLER_VIEW_TARGET:
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case PIPE_CAP_CLIP_HALFZ:
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case PIPE_CAP_VERTEXID_NOBASE:
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case PIPE_CAP_POLYGON_OFFSET_CLAMP:
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case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
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case PIPE_CAP_TGSI_PACK_HALF_FLOAT:
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case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
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case PIPE_CAP_INVALIDATE_BUFFER:
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case PIPE_CAP_STRING_MARKER:
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case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
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case PIPE_CAP_QUERY_MEMORY_INFO:
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case PIPE_CAP_PCI_GROUP:
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case PIPE_CAP_PCI_BUS:
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case PIPE_CAP_PCI_DEVICE:
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case PIPE_CAP_PCI_FUNCTION:
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case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
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case PIPE_CAP_NATIVE_FENCE_FD:
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return 0;
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case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
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return 64;
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case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
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case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
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case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
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return 1; /* need 4-byte alignment for all offsets and strides */
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case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
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return 2048;
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case PIPE_CAP_MAX_VIEWPORTS:
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return 1;
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case PIPE_CAP_ENDIANNESS:
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return PIPE_ENDIAN_LITTLE;
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case PIPE_CAP_VENDOR_ID:
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return 0x15ad; /* VMware Inc. */
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case PIPE_CAP_DEVICE_ID:
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return 0x0405; /* assume SVGA II */
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case PIPE_CAP_ACCELERATED:
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return 0; /* XXX: */
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case PIPE_CAP_VIDEO_MEMORY:
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/* XXX: Query the host ? */
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return 1;
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case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
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return sws->have_vgpu10;
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case PIPE_CAP_CLEAR_TEXTURE:
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return sws->have_vgpu10;
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case PIPE_CAP_UMA:
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case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
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case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
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case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
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case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
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case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
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case PIPE_CAP_DEPTH_BOUNDS_TEST:
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case PIPE_CAP_TGSI_TXQS:
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case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
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case PIPE_CAP_SHAREABLE_SHADERS:
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case PIPE_CAP_DRAW_PARAMETERS:
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case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
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case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
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case PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY:
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case PIPE_CAP_QUERY_BUFFER_OBJECT:
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case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
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case PIPE_CAP_CULL_DISTANCE:
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case PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES:
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case PIPE_CAP_TGSI_VOTE:
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case PIPE_CAP_MAX_WINDOW_RECTANGLES:
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case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
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case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
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case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
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case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
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case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
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case PIPE_CAP_TGSI_FS_FBFETCH:
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case PIPE_CAP_TGSI_MUL_ZERO_WINS:
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case PIPE_CAP_DOUBLES:
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case PIPE_CAP_INT64:
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case PIPE_CAP_INT64_DIVMOD:
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case PIPE_CAP_TGSI_TEX_TXF_LZ:
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case PIPE_CAP_TGSI_CLOCK:
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case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
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case PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE:
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case PIPE_CAP_TGSI_BALLOT:
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return 0;
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}
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debug_printf("Unexpected PIPE_CAP_ query %u\n", param);
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return 0;
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}
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static int
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vgpu9_get_shader_param(struct pipe_screen *screen,
|
|
enum pipe_shader_type shader,
|
|
enum pipe_shader_cap param)
|
|
{
|
|
struct svga_screen *svgascreen = svga_screen(screen);
|
|
struct svga_winsys_screen *sws = svgascreen->sws;
|
|
unsigned val;
|
|
|
|
assert(!sws->have_vgpu10);
|
|
|
|
switch (shader)
|
|
{
|
|
case PIPE_SHADER_FRAGMENT:
|
|
switch (param)
|
|
{
|
|
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
|
|
return get_uint_cap(sws,
|
|
SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS,
|
|
512);
|
|
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
|
|
return 512;
|
|
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
|
|
return SVGA3D_MAX_NESTING_LEVEL;
|
|
case PIPE_SHADER_CAP_MAX_INPUTS:
|
|
return 10;
|
|
case PIPE_SHADER_CAP_MAX_OUTPUTS:
|
|
return svgascreen->max_color_buffers;
|
|
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
|
|
return 224 * sizeof(float[4]);
|
|
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
|
|
return 1;
|
|
case PIPE_SHADER_CAP_MAX_TEMPS:
|
|
val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS, 32);
|
|
return MIN2(val, SVGA3D_TEMPREG_MAX);
|
|
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
|
|
/*
|
|
* Although PS 3.0 has some addressing abilities it can only represent
|
|
* loops that can be statically determined and unrolled. Given we can
|
|
* only handle a subset of the cases that the state tracker already
|
|
* does it is better to defer loop unrolling to the state tracker.
|
|
*/
|
|
return 0;
|
|
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
|
|
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
|
|
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_SUBROUTINES:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_INTEGERS:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
|
|
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
|
|
return 16;
|
|
case PIPE_SHADER_CAP_PREFERRED_IR:
|
|
return PIPE_SHADER_IR_TGSI;
|
|
case PIPE_SHADER_CAP_SUPPORTED_IRS:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
|
|
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
|
|
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
|
|
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
|
|
return 32;
|
|
}
|
|
/* If we get here, we failed to handle a cap above */
|
|
debug_printf("Unexpected fragment shader query %u\n", param);
|
|
return 0;
|
|
case PIPE_SHADER_VERTEX:
|
|
switch (param)
|
|
{
|
|
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
|
|
return get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS,
|
|
512);
|
|
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
|
|
/* XXX: until we have vertex texture support */
|
|
return 0;
|
|
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
|
|
return SVGA3D_MAX_NESTING_LEVEL;
|
|
case PIPE_SHADER_CAP_MAX_INPUTS:
|
|
return 16;
|
|
case PIPE_SHADER_CAP_MAX_OUTPUTS:
|
|
return 10;
|
|
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
|
|
return 256 * sizeof(float[4]);
|
|
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
|
|
return 1;
|
|
case PIPE_SHADER_CAP_MAX_TEMPS:
|
|
val = get_uint_cap(sws, SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS, 32);
|
|
return MIN2(val, SVGA3D_TEMPREG_MAX);
|
|
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
|
|
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
|
|
return 1;
|
|
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
|
|
return 1;
|
|
case PIPE_SHADER_CAP_SUBROUTINES:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_INTEGERS:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
|
|
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_PREFERRED_IR:
|
|
return PIPE_SHADER_IR_TGSI;
|
|
case PIPE_SHADER_CAP_SUPPORTED_IRS:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
|
|
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
|
|
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
|
|
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
|
|
return 32;
|
|
}
|
|
/* If we get here, we failed to handle a cap above */
|
|
debug_printf("Unexpected vertex shader query %u\n", param);
|
|
return 0;
|
|
case PIPE_SHADER_GEOMETRY:
|
|
case PIPE_SHADER_COMPUTE:
|
|
case PIPE_SHADER_TESS_CTRL:
|
|
case PIPE_SHADER_TESS_EVAL:
|
|
/* no support for geometry, tess or compute shaders at this time */
|
|
return 0;
|
|
default:
|
|
debug_printf("Unexpected shader type (%u) query\n", shader);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int
|
|
vgpu10_get_shader_param(struct pipe_screen *screen,
|
|
enum pipe_shader_type shader,
|
|
enum pipe_shader_cap param)
|
|
{
|
|
struct svga_screen *svgascreen = svga_screen(screen);
|
|
struct svga_winsys_screen *sws = svgascreen->sws;
|
|
|
|
assert(sws->have_vgpu10);
|
|
(void) sws; /* silence unused var warnings in non-debug builds */
|
|
|
|
/* Only VS, GS, FS supported */
|
|
if (shader != PIPE_SHADER_VERTEX &&
|
|
shader != PIPE_SHADER_GEOMETRY &&
|
|
shader != PIPE_SHADER_FRAGMENT) {
|
|
return 0;
|
|
}
|
|
|
|
/* NOTE: we do not query the device for any caps/limits at this time */
|
|
|
|
/* Generally the same limits for vertex, geometry and fragment shaders */
|
|
switch (param) {
|
|
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
|
|
case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
|
|
return 64 * 1024;
|
|
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
|
|
return 64;
|
|
case PIPE_SHADER_CAP_MAX_INPUTS:
|
|
if (shader == PIPE_SHADER_FRAGMENT)
|
|
return VGPU10_MAX_FS_INPUTS;
|
|
else if (shader == PIPE_SHADER_GEOMETRY)
|
|
return VGPU10_MAX_GS_INPUTS;
|
|
else
|
|
return VGPU10_MAX_VS_INPUTS;
|
|
case PIPE_SHADER_CAP_MAX_OUTPUTS:
|
|
if (shader == PIPE_SHADER_FRAGMENT)
|
|
return VGPU10_MAX_FS_OUTPUTS;
|
|
else if (shader == PIPE_SHADER_GEOMETRY)
|
|
return VGPU10_MAX_GS_OUTPUTS;
|
|
else
|
|
return VGPU10_MAX_VS_OUTPUTS;
|
|
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
|
|
return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
|
|
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
|
|
return svgascreen->max_const_buffers;
|
|
case PIPE_SHADER_CAP_MAX_TEMPS:
|
|
return VGPU10_MAX_TEMPS;
|
|
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
|
|
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
|
|
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
|
|
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
|
|
return TRUE; /* XXX verify */
|
|
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
|
|
case PIPE_SHADER_CAP_SUBROUTINES:
|
|
case PIPE_SHADER_CAP_INTEGERS:
|
|
return TRUE;
|
|
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
|
|
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
|
|
return SVGA3D_DX_MAX_SAMPLERS;
|
|
case PIPE_SHADER_CAP_PREFERRED_IR:
|
|
return PIPE_SHADER_IR_TGSI;
|
|
case PIPE_SHADER_CAP_SUPPORTED_IRS:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
|
|
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
|
|
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
|
|
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
|
|
case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
|
|
return 0;
|
|
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
|
|
return 32;
|
|
default:
|
|
debug_printf("Unexpected vgpu10 shader query %u\n", param);
|
|
return 0;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
static int
|
|
svga_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
|
|
enum pipe_shader_cap param)
|
|
{
|
|
struct svga_screen *svgascreen = svga_screen(screen);
|
|
struct svga_winsys_screen *sws = svgascreen->sws;
|
|
if (sws->have_vgpu10) {
|
|
return vgpu10_get_shader_param(screen, shader, param);
|
|
}
|
|
else {
|
|
return vgpu9_get_shader_param(screen, shader, param);
|
|
}
|
|
}
|
|
|
|
|
|
/**
|
|
* Implement pipe_screen::is_format_supported().
|
|
* \param bindings bitmask of PIPE_BIND_x flags
|
|
*/
|
|
static boolean
|
|
svga_is_format_supported( struct pipe_screen *screen,
|
|
enum pipe_format format,
|
|
enum pipe_texture_target target,
|
|
unsigned sample_count,
|
|
unsigned bindings)
|
|
{
|
|
struct svga_screen *ss = svga_screen(screen);
|
|
SVGA3dSurfaceFormat svga_format;
|
|
SVGA3dSurfaceFormatCaps caps;
|
|
SVGA3dSurfaceFormatCaps mask;
|
|
|
|
assert(bindings);
|
|
|
|
if (sample_count > 1) {
|
|
/* In ms_samples, if bit N is set it means that we support
|
|
* multisample with N+1 samples per pixel.
|
|
*/
|
|
if ((ss->ms_samples & (1 << (sample_count - 1))) == 0) {
|
|
return FALSE;
|
|
}
|
|
}
|
|
|
|
svga_format = svga_translate_format(ss, format, bindings);
|
|
if (svga_format == SVGA3D_FORMAT_INVALID) {
|
|
return FALSE;
|
|
}
|
|
|
|
/* we don't support sRGB rendering into display targets */
|
|
if (util_format_is_srgb(format) && (bindings & PIPE_BIND_DISPLAY_TARGET)) {
|
|
return FALSE;
|
|
}
|
|
|
|
/*
|
|
* For VGPU10 vertex formats, skip querying host capabilities
|
|
*/
|
|
|
|
if (ss->sws->have_vgpu10 && (bindings & PIPE_BIND_VERTEX_BUFFER)) {
|
|
SVGA3dSurfaceFormat svga_format;
|
|
unsigned flags;
|
|
svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
|
|
return svga_format != SVGA3D_FORMAT_INVALID;
|
|
}
|
|
|
|
/*
|
|
* Override host capabilities, so that we end up with the same
|
|
* visuals for all virtual hardware implementations.
|
|
*/
|
|
|
|
if (bindings & PIPE_BIND_DISPLAY_TARGET) {
|
|
switch (svga_format) {
|
|
case SVGA3D_A8R8G8B8:
|
|
case SVGA3D_X8R8G8B8:
|
|
case SVGA3D_R5G6B5:
|
|
break;
|
|
|
|
/* VGPU10 formats */
|
|
case SVGA3D_B8G8R8A8_UNORM:
|
|
case SVGA3D_B8G8R8X8_UNORM:
|
|
case SVGA3D_B5G6R5_UNORM:
|
|
break;
|
|
|
|
/* Often unsupported/problematic. This means we end up with the same
|
|
* visuals for all virtual hardware implementations.
|
|
*/
|
|
case SVGA3D_A4R4G4B4:
|
|
case SVGA3D_A1R5G5B5:
|
|
return FALSE;
|
|
|
|
default:
|
|
return FALSE;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Query the host capabilities.
|
|
*/
|
|
|
|
svga_get_format_cap(ss, svga_format, &caps);
|
|
|
|
if (bindings & PIPE_BIND_RENDER_TARGET) {
|
|
/* Check that the color surface is blendable, unless it's an
|
|
* integer format.
|
|
*/
|
|
if (!svga_format_is_integer(svga_format) &&
|
|
(caps.value & SVGA3DFORMAT_OP_NOALPHABLEND)) {
|
|
return FALSE;
|
|
}
|
|
}
|
|
|
|
mask.value = 0;
|
|
if (bindings & PIPE_BIND_RENDER_TARGET) {
|
|
mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
|
|
}
|
|
if (bindings & PIPE_BIND_DEPTH_STENCIL) {
|
|
mask.value |= SVGA3DFORMAT_OP_ZSTENCIL;
|
|
}
|
|
if (bindings & PIPE_BIND_SAMPLER_VIEW) {
|
|
mask.value |= SVGA3DFORMAT_OP_TEXTURE;
|
|
}
|
|
|
|
if (target == PIPE_TEXTURE_CUBE) {
|
|
mask.value |= SVGA3DFORMAT_OP_CUBETEXTURE;
|
|
}
|
|
else if (target == PIPE_TEXTURE_3D) {
|
|
mask.value |= SVGA3DFORMAT_OP_VOLUMETEXTURE;
|
|
}
|
|
|
|
return (caps.value & mask.value) == mask.value;
|
|
}
|
|
|
|
|
|
static void
|
|
svga_fence_reference(struct pipe_screen *screen,
|
|
struct pipe_fence_handle **ptr,
|
|
struct pipe_fence_handle *fence)
|
|
{
|
|
struct svga_winsys_screen *sws = svga_screen(screen)->sws;
|
|
sws->fence_reference(sws, ptr, fence);
|
|
}
|
|
|
|
|
|
static boolean
|
|
svga_fence_finish(struct pipe_screen *screen,
|
|
struct pipe_context *ctx,
|
|
struct pipe_fence_handle *fence,
|
|
uint64_t timeout)
|
|
{
|
|
struct svga_winsys_screen *sws = svga_screen(screen)->sws;
|
|
boolean retVal;
|
|
|
|
SVGA_STATS_TIME_PUSH(sws, SVGA_STATS_TIME_FENCEFINISH);
|
|
|
|
if (!timeout) {
|
|
retVal = sws->fence_signalled(sws, fence, 0) == 0;
|
|
}
|
|
else {
|
|
SVGA_DBG(DEBUG_DMA|DEBUG_PERF, "%s fence_ptr %p\n",
|
|
__FUNCTION__, fence);
|
|
|
|
retVal = sws->fence_finish(sws, fence, 0) == 0;
|
|
}
|
|
|
|
SVGA_STATS_TIME_POP(sws);
|
|
|
|
return retVal;
|
|
}
|
|
|
|
|
|
static int
|
|
svga_get_driver_query_info(struct pipe_screen *screen,
|
|
unsigned index,
|
|
struct pipe_driver_query_info *info)
|
|
{
|
|
#define QUERY(NAME, ENUM, UNITS) \
|
|
{NAME, ENUM, {0}, UNITS, PIPE_DRIVER_QUERY_RESULT_TYPE_AVERAGE, 0, 0x0}
|
|
|
|
static const struct pipe_driver_query_info queries[] = {
|
|
/* per-frame counters */
|
|
QUERY("num-draw-calls", SVGA_QUERY_NUM_DRAW_CALLS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-fallbacks", SVGA_QUERY_NUM_FALLBACKS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-flushes", SVGA_QUERY_NUM_FLUSHES,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-validations", SVGA_QUERY_NUM_VALIDATIONS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("map-buffer-time", SVGA_QUERY_MAP_BUFFER_TIME,
|
|
PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
|
|
QUERY("num-buffers-mapped", SVGA_QUERY_NUM_BUFFERS_MAPPED,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-textures-mapped", SVGA_QUERY_NUM_TEXTURES_MAPPED,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-bytes-uploaded", SVGA_QUERY_NUM_BYTES_UPLOADED,
|
|
PIPE_DRIVER_QUERY_TYPE_BYTES),
|
|
QUERY("command-buffer-size", SVGA_QUERY_COMMAND_BUFFER_SIZE,
|
|
PIPE_DRIVER_QUERY_TYPE_BYTES),
|
|
QUERY("flush-time", SVGA_QUERY_FLUSH_TIME,
|
|
PIPE_DRIVER_QUERY_TYPE_MICROSECONDS),
|
|
QUERY("surface-write-flushes", SVGA_QUERY_SURFACE_WRITE_FLUSHES,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-readbacks", SVGA_QUERY_NUM_READBACKS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-resource-updates", SVGA_QUERY_NUM_RESOURCE_UPDATES,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-buffer-uploads", SVGA_QUERY_NUM_BUFFER_UPLOADS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-const-buf-updates", SVGA_QUERY_NUM_CONST_BUF_UPDATES,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-const-updates", SVGA_QUERY_NUM_CONST_UPDATES,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
|
|
/* running total counters */
|
|
QUERY("memory-used", SVGA_QUERY_MEMORY_USED,
|
|
PIPE_DRIVER_QUERY_TYPE_BYTES),
|
|
QUERY("num-shaders", SVGA_QUERY_NUM_SHADERS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-resources", SVGA_QUERY_NUM_RESOURCES,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-state-objects", SVGA_QUERY_NUM_STATE_OBJECTS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-surface-views", SVGA_QUERY_NUM_SURFACE_VIEWS,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
QUERY("num-generate-mipmap", SVGA_QUERY_NUM_GENERATE_MIPMAP,
|
|
PIPE_DRIVER_QUERY_TYPE_UINT64),
|
|
};
|
|
#undef QUERY
|
|
|
|
if (!info)
|
|
return ARRAY_SIZE(queries);
|
|
|
|
if (index >= ARRAY_SIZE(queries))
|
|
return 0;
|
|
|
|
*info = queries[index];
|
|
return 1;
|
|
}
|
|
|
|
|
|
static void
|
|
svga_destroy_screen( struct pipe_screen *screen )
|
|
{
|
|
struct svga_screen *svgascreen = svga_screen(screen);
|
|
|
|
svga_screen_cache_cleanup(svgascreen);
|
|
|
|
mtx_destroy(&svgascreen->swc_mutex);
|
|
mtx_destroy(&svgascreen->tex_mutex);
|
|
|
|
svgascreen->sws->destroy(svgascreen->sws);
|
|
|
|
FREE(svgascreen);
|
|
}
|
|
|
|
|
|
/**
|
|
* Create a new svga_screen object
|
|
*/
|
|
struct pipe_screen *
|
|
svga_screen_create(struct svga_winsys_screen *sws)
|
|
{
|
|
struct svga_screen *svgascreen;
|
|
struct pipe_screen *screen;
|
|
|
|
#ifdef DEBUG
|
|
SVGA_DEBUG = debug_get_flags_option("SVGA_DEBUG", svga_debug_flags, 0 );
|
|
#endif
|
|
|
|
svgascreen = CALLOC_STRUCT(svga_screen);
|
|
if (!svgascreen)
|
|
goto error1;
|
|
|
|
svgascreen->debug.force_level_surface_view =
|
|
debug_get_bool_option("SVGA_FORCE_LEVEL_SURFACE_VIEW", FALSE);
|
|
svgascreen->debug.force_surface_view =
|
|
debug_get_bool_option("SVGA_FORCE_SURFACE_VIEW", FALSE);
|
|
svgascreen->debug.force_sampler_view =
|
|
debug_get_bool_option("SVGA_FORCE_SAMPLER_VIEW", FALSE);
|
|
svgascreen->debug.no_surface_view =
|
|
debug_get_bool_option("SVGA_NO_SURFACE_VIEW", FALSE);
|
|
svgascreen->debug.no_sampler_view =
|
|
debug_get_bool_option("SVGA_NO_SAMPLER_VIEW", FALSE);
|
|
svgascreen->debug.no_cache_index_buffers =
|
|
debug_get_bool_option("SVGA_NO_CACHE_INDEX_BUFFERS", FALSE);
|
|
|
|
screen = &svgascreen->screen;
|
|
|
|
screen->destroy = svga_destroy_screen;
|
|
screen->get_name = svga_get_name;
|
|
screen->get_vendor = svga_get_vendor;
|
|
screen->get_device_vendor = svga_get_vendor; // TODO actual device vendor
|
|
screen->get_param = svga_get_param;
|
|
screen->get_shader_param = svga_get_shader_param;
|
|
screen->get_paramf = svga_get_paramf;
|
|
screen->get_timestamp = NULL;
|
|
screen->is_format_supported = svga_is_format_supported;
|
|
screen->context_create = svga_context_create;
|
|
screen->fence_reference = svga_fence_reference;
|
|
screen->fence_finish = svga_fence_finish;
|
|
screen->get_driver_query_info = svga_get_driver_query_info;
|
|
svgascreen->sws = sws;
|
|
|
|
svga_init_screen_resource_functions(svgascreen);
|
|
|
|
if (sws->get_hw_version) {
|
|
svgascreen->hw_version = sws->get_hw_version(sws);
|
|
} else {
|
|
svgascreen->hw_version = SVGA3D_HWVERSION_WS65_B1;
|
|
}
|
|
|
|
/*
|
|
* The D16, D24X8, and D24S8 formats always do an implicit shadow compare
|
|
* when sampled from, where as the DF16, DF24, and D24S8_INT do not. So
|
|
* we prefer the later when available.
|
|
*
|
|
* This mimics hardware vendors extensions for D3D depth sampling. See also
|
|
* http://aras-p.info/texts/D3D9GPUHacks.html
|
|
*/
|
|
|
|
{
|
|
boolean has_df16, has_df24, has_d24s8_int;
|
|
SVGA3dSurfaceFormatCaps caps;
|
|
SVGA3dSurfaceFormatCaps mask;
|
|
mask.value = 0;
|
|
mask.zStencil = 1;
|
|
mask.texture = 1;
|
|
|
|
svgascreen->depth.z16 = SVGA3D_Z_D16;
|
|
svgascreen->depth.x8z24 = SVGA3D_Z_D24X8;
|
|
svgascreen->depth.s8z24 = SVGA3D_Z_D24S8;
|
|
|
|
svga_get_format_cap(svgascreen, SVGA3D_Z_DF16, &caps);
|
|
has_df16 = (caps.value & mask.value) == mask.value;
|
|
|
|
svga_get_format_cap(svgascreen, SVGA3D_Z_DF24, &caps);
|
|
has_df24 = (caps.value & mask.value) == mask.value;
|
|
|
|
svga_get_format_cap(svgascreen, SVGA3D_Z_D24S8_INT, &caps);
|
|
has_d24s8_int = (caps.value & mask.value) == mask.value;
|
|
|
|
/* XXX: We might want some other logic here.
|
|
* Like if we only have d24s8_int we should
|
|
* emulate the other formats with that.
|
|
*/
|
|
if (has_df16) {
|
|
svgascreen->depth.z16 = SVGA3D_Z_DF16;
|
|
}
|
|
if (has_df24) {
|
|
svgascreen->depth.x8z24 = SVGA3D_Z_DF24;
|
|
}
|
|
if (has_d24s8_int) {
|
|
svgascreen->depth.s8z24 = SVGA3D_Z_D24S8_INT;
|
|
}
|
|
}
|
|
|
|
/* Query device caps
|
|
*/
|
|
if (sws->have_vgpu10) {
|
|
svgascreen->haveProvokingVertex
|
|
= get_bool_cap(sws, SVGA3D_DEVCAP_DX_PROVOKING_VERTEX, FALSE);
|
|
svgascreen->haveLineSmooth = TRUE;
|
|
svgascreen->maxPointSize = 80.0F;
|
|
svgascreen->max_color_buffers = SVGA3D_DX_MAX_RENDER_TARGETS;
|
|
|
|
/* Multisample samples per pixel */
|
|
if (debug_get_bool_option("SVGA_MSAA", TRUE)) {
|
|
svgascreen->ms_samples =
|
|
get_uint_cap(sws, SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES, 0);
|
|
}
|
|
|
|
/* Maximum number of constant buffers */
|
|
svgascreen->max_const_buffers =
|
|
get_uint_cap(sws, SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS, 1);
|
|
assert(svgascreen->max_const_buffers <= SVGA_MAX_CONST_BUFS);
|
|
}
|
|
else {
|
|
/* VGPU9 */
|
|
unsigned vs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_VERTEX_SHADER_VERSION,
|
|
SVGA3DVSVERSION_NONE);
|
|
unsigned fs_ver = get_uint_cap(sws, SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION,
|
|
SVGA3DPSVERSION_NONE);
|
|
|
|
/* we require Shader model 3.0 or later */
|
|
if (fs_ver < SVGA3DPSVERSION_30 || vs_ver < SVGA3DVSVERSION_30) {
|
|
goto error2;
|
|
}
|
|
|
|
svgascreen->haveProvokingVertex = FALSE;
|
|
|
|
svgascreen->haveLineSmooth =
|
|
get_bool_cap(sws, SVGA3D_DEVCAP_LINE_AA, FALSE);
|
|
|
|
svgascreen->maxPointSize =
|
|
get_float_cap(sws, SVGA3D_DEVCAP_MAX_POINT_SIZE, 1.0f);
|
|
/* Keep this to a reasonable size to avoid failures in conform/pntaa.c */
|
|
svgascreen->maxPointSize = MIN2(svgascreen->maxPointSize, 80.0f);
|
|
|
|
/* The SVGA3D device always supports 4 targets at this time, regardless
|
|
* of what querying SVGA3D_DEVCAP_MAX_RENDER_TARGETS might return.
|
|
*/
|
|
svgascreen->max_color_buffers = 4;
|
|
|
|
/* Only support one constant buffer
|
|
*/
|
|
svgascreen->max_const_buffers = 1;
|
|
|
|
/* No multisampling */
|
|
svgascreen->ms_samples = 0;
|
|
}
|
|
|
|
/* common VGPU9 / VGPU10 caps */
|
|
svgascreen->haveLineStipple =
|
|
get_bool_cap(sws, SVGA3D_DEVCAP_LINE_STIPPLE, FALSE);
|
|
|
|
svgascreen->maxLineWidth =
|
|
get_float_cap(sws, SVGA3D_DEVCAP_MAX_LINE_WIDTH, 1.0f);
|
|
|
|
svgascreen->maxLineWidthAA =
|
|
get_float_cap(sws, SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH, 1.0f);
|
|
|
|
if (0) {
|
|
debug_printf("svga: haveProvokingVertex %u\n",
|
|
svgascreen->haveProvokingVertex);
|
|
debug_printf("svga: haveLineStip %u "
|
|
"haveLineSmooth %u maxLineWidth %f\n",
|
|
svgascreen->haveLineStipple, svgascreen->haveLineSmooth,
|
|
svgascreen->maxLineWidth);
|
|
debug_printf("svga: maxPointSize %g\n", svgascreen->maxPointSize);
|
|
debug_printf("svga: msaa samples mask: 0x%x\n", svgascreen->ms_samples);
|
|
}
|
|
|
|
(void) mtx_init(&svgascreen->tex_mutex, mtx_plain);
|
|
(void) mtx_init(&svgascreen->swc_mutex, mtx_plain);
|
|
|
|
svga_screen_cache_init(svgascreen);
|
|
|
|
return screen;
|
|
error2:
|
|
FREE(svgascreen);
|
|
error1:
|
|
return NULL;
|
|
}
|
|
|
|
struct svga_winsys_screen *
|
|
svga_winsys_screen(struct pipe_screen *screen)
|
|
{
|
|
return svga_screen(screen)->sws;
|
|
}
|
|
|
|
#ifdef DEBUG
|
|
struct svga_screen *
|
|
svga_screen(struct pipe_screen *screen)
|
|
{
|
|
assert(screen);
|
|
assert(screen->destroy == svga_destroy_screen);
|
|
return (struct svga_screen *)screen;
|
|
}
|
|
#endif
|