Iago Toral Quiroga be45960d3e broadcom/compiler: support pipelining of tex instructions
This follows the same idea as for TMU general instructions of reusing
the existing infrastructure to first count required register writes and
flush outstanding TMU dependencies, and then emit the actual writes, which
requires that we split the code that decides about register writes to
a helper.

We also need to start using a component mask instead of the number
of components that we need to read with a particular TMU operation.

v2: update tmu_writes for V3D_QPU_WADDR_TMUOFF

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8825>
2021-02-04 10:33:10 +00:00
2020-08-06 09:46:48 +00:00
2020-01-18 11:39:32 +01:00
2020-08-06 09:46:48 +00:00
2019-10-18 16:42:40 +00:00
2021-01-13 09:46:19 -08:00

`Mesa <https://mesa3d.org>`_ - The 3D Graphics Library
======================================================


Source
------

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---------------

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.. code-block:: sh

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