
This avoids modeling the r0l register explicitly in the IR, which would complicate RA for little benefit at this stage. Do the simplest thing that could possibly work in SSA. glmark2 subset. total instructions in shared programs: 6442 -> 6442 (0.00%) instructions in affected programs: 701 -> 701 (0.00%) helped: 4 HURT: 5 helped stats (abs) min: 1.0 max: 3.0 x̄: 2.00 x̃: 2 helped stats (rel) min: 1.46% max: 7.69% x̄: 4.03% x̃: 3.48% HURT stats (abs) min: 1.0 max: 3.0 x̄: 1.60 x̃: 1 HURT stats (rel) min: 0.81% max: 7.41% x̄: 2.67% x̃: 1.14% 95% mean confidence interval for instructions value: -1.58 1.58 95% mean confidence interval for instructions %-change: -3.70% 3.08% Inconclusive result (value mean confidence interval includes 0). total bytes in shared programs: 42196 -> 42186 (-0.02%) bytes in affected programs: 7768 -> 7758 (-0.13%) helped: 8 HURT: 5 helped stats (abs) min: 2.0 max: 18.0 x̄: 7.25 x̃: 4 helped stats (rel) min: 0.13% max: 7.26% x̄: 2.02% x̃: 0.97% HURT stats (abs) min: 6.0 max: 18.0 x̄: 9.60 x̃: 6 HURT stats (rel) min: 0.82% max: 6.32% x̄: 2.37% x̃: 1.02% 95% mean confidence interval for bytes value: -7.02 5.48 95% mean confidence interval for bytes %-change: -2.30% 1.63% Inconclusive result (value mean confidence interval includes 0). total halfregs in shared programs: 1926 -> 1769 (-8.15%) halfregs in affected programs: 1395 -> 1238 (-11.25%) helped: 71 HURT: 0 helped stats (abs) min: 1.0 max: 10.0 x̄: 2.21 x̃: 2 helped stats (rel) min: 1.92% max: 52.63% x̄: 15.33% x̃: 11.76% 95% mean confidence interval for halfregs value: -2.69 -1.73 95% mean confidence interval for halfregs %-change: -17.98% -12.68% Halfregs are helped. Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18804>
291 lines
9.4 KiB
Python
291 lines
9.4 KiB
Python
"""
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Copyright (C) 2021 Alyssa Rosenzweig <alyssa@rosenzweig.io>
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice (including the next
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paragraph) shall be included in all copies or substantial portions of the
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Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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SOFTWARE.
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"""
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opcodes = {}
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immediates = {}
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enums = {}
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VARIABLE = ~0
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class Opcode(object):
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def __init__(self, name, dests, srcs, imms, is_float, can_eliminate,
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encoding_16, encoding_32):
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self.name = name
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self.dests = dests if dests != VARIABLE else 0
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self.srcs = srcs if srcs != VARIABLE else 0
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self.variable_srcs = (srcs == VARIABLE)
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self.variable_dests = (dests == VARIABLE)
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self.imms = imms
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self.is_float = is_float
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self.can_eliminate = can_eliminate
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self.encoding_16 = encoding_16
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self.encoding_32 = encoding_32
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class Immediate(object):
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def __init__(self, name, ctype):
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self.name = name
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self.ctype = ctype
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class Encoding(object):
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def __init__(self, description):
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(exact, mask, length_short, length_long) = description
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# Convenience
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if length_long is None:
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length_long = length_short
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self.exact = exact
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self.mask = mask
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self.length_short = length_short
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self.extensible = length_short != length_long
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if self.extensible:
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assert(length_long == length_short + (4 if length_short > 8 else 2))
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def op(name, encoding_32, dests = 1, srcs = 0, imms = [], is_float = False,
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can_eliminate = True, encoding_16 = None):
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encoding_16 = Encoding(encoding_16) if encoding_16 is not None else None
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encoding_32 = Encoding(encoding_32) if encoding_32 is not None else None
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opcodes[name] = Opcode(name, dests, srcs, imms, is_float, can_eliminate, encoding_16, encoding_32)
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def immediate(name, ctype = "uint32_t"):
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imm = Immediate(name, ctype)
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immediates[name] = imm
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return imm
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def enum(name, value_dict):
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enums[name] = value_dict
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return immediate(name, "enum agx_" + name)
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L = (1 << 15)
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_ = None
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FORMAT = immediate("format", "enum agx_format")
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IMM = immediate("imm")
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WRITEOUT = immediate("writeout")
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INDEX = immediate("index")
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COMPONENT = immediate("component")
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CHANNELS = immediate("channels")
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TRUTH_TABLE = immediate("truth_table")
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ROUND = immediate("round", "enum agx_round")
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SHIFT = immediate("shift")
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MASK = immediate("mask")
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BFI_MASK = immediate("bfi_mask")
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LOD_MODE = immediate("lod_mode", "enum agx_lod_mode")
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DIM = enum("dim", {
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0: '1d',
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1: '1d_array',
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2: '2d',
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3: '2d_array',
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4: '2d_ms',
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5: '3d',
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6: 'cube',
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7: 'cube_array'
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})
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OFFSET = immediate("offset", "bool")
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SHADOW = immediate("shadow", "bool")
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SCOREBOARD = immediate("scoreboard")
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ICOND = immediate("icond", "enum agx_icond")
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FCOND = immediate("fcond", "enum agx_fcond")
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NEST = immediate("nest")
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INVERT_COND = immediate("invert_cond")
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NEST = immediate("nest")
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TARGET = immediate("target", "agx_block *")
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PERSPECTIVE = immediate("perspective", "bool")
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SR = enum("sr", {
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0: 'threadgroup_position_in_grid.x',
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1: 'threadgroup_position_in_grid.y',
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2: 'threadgroup_position_in_grid.z',
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4: 'threads_per_threadgroup.x',
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5: 'threads_per_threadgroup.y',
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6: 'threads_per_threadgroup.z',
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8: 'dispatch_threads_per_threadgroup.x',
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9: 'dispatch_threads_per_threadgroup.y',
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10: 'dispatch_threads_per_threadgroup.z',
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48: 'thread_position_in_threadgroup.x',
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49: 'thread_position_in_threadgroup.y',
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50: 'thread_position_in_threadgroup.z',
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51: 'thread_index_in_threadgroup',
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52: 'thread_index_in_subgroup',
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53: 'subgroup_index_in_threadgroup',
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56: 'active_thread_index_in_quad',
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58: 'active_thread_index_in_subgroup',
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62: 'backfacing',
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80: 'thread_position_in_grid.x',
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81: 'thread_position_in_grid.y',
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82: 'thread_position_in_grid.z',
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})
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FUNOP = lambda x: (x << 28)
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FUNOP_MASK = FUNOP((1 << 14) - 1)
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def funop(name, opcode):
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op(name, (0x0A | L | (opcode << 28),
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0x3F | L | (((1 << 14) - 1) << 28), 6, _),
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srcs = 1, is_float = True)
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# Listing of opcodes
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funop("floor", 0b000000)
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funop("srsqrt", 0b000001)
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funop("dfdx", 0b000100)
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funop("dfdy", 0b000110)
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funop("rcp", 0b001000)
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funop("rsqrt", 0b001001)
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funop("sin_pt_1", 0b001010)
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funop("log2", 0b001100)
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funop("exp2", 0b001101)
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funop("sin_pt_2", 0b001110)
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funop("ceil", 0b010000)
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funop("trunc", 0b100000)
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funop("roundeven", 0b110000)
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op("fadd",
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encoding_16 = (0x26 | L, 0x3F | L, 6, _),
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encoding_32 = (0x2A | L, 0x3F | L, 6, _),
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srcs = 2, is_float = True)
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op("fma",
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encoding_16 = (0x36, 0x3F, 6, 8),
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encoding_32 = (0x3A, 0x3F, 6, 8),
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srcs = 3, is_float = True)
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op("fmul",
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encoding_16 = ((0x16 | L), (0x3F | L), 6, _),
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encoding_32 = ((0x1A | L), (0x3F | L), 6, _),
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srcs = 2, is_float = True)
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op("mov_imm",
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encoding_32 = (0x62, 0xFF, 6, 8),
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encoding_16 = (0x62, 0xFF, 4, 6),
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imms = [IMM])
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op("iadd",
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encoding_32 = (0x0E, 0x3F | L, 8, _),
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srcs = 2, imms = [SHIFT])
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op("imad",
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encoding_32 = (0x1E, 0x3F | L, 8, _),
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srcs = 3, imms = [SHIFT])
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op("bfi",
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encoding_32 = (0x2E, 0x7F | (0x3 << 26), 8, _),
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srcs = 3, imms = [BFI_MASK])
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op("bfeil",
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encoding_32 = (0x2E | L, 0x7F | L | (0x3 << 26), 8, _),
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srcs = 3, imms = [BFI_MASK])
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op("asr",
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encoding_32 = (0x2E | L | (0x1 << 26), 0x7F | L | (0x3 << 26), 8, _),
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srcs = 2)
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op("icmpsel",
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encoding_32 = (0x12, 0x7F, 8, 10),
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srcs = 4, imms = [ICOND])
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op("fcmpsel",
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encoding_32 = (0x02, 0x7F, 8, 10),
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srcs = 4, imms = [FCOND])
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# sources are coordinates, LOD, texture, sampler, shadow/offset
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# TODO: anything else?
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op("texture_sample",
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encoding_32 = (0x31, 0x7F, 8, 10), # XXX WRONG SIZE
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srcs = 5, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET, SHADOW])
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op("texture_load",
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encoding_32 = (0x71, 0x7F, 8, 10), # XXX WRONG SIZE
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srcs = 5, imms = [DIM, LOD_MODE, MASK, SCOREBOARD, OFFSET])
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# sources are base, index
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op("device_load",
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encoding_32 = (0x05, 0x7F, 6, 8),
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srcs = 2, imms = [FORMAT, MASK, SCOREBOARD])
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op("wait", (0x38, 0xFF, 2, _), dests = 0,
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can_eliminate = False, imms = [SCOREBOARD])
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op("get_sr", (0x72, 0x7F | L, 4, _), dests = 1, imms = [SR])
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op("sample_mask", (0x7fc1, 0xffff, 6, _), dests = 0, srcs = 1, can_eliminate = False)
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# Essentially same encoding
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op("ld_tile", (0x49, 0x7F, 8, _), dests = 1, srcs = 0, imms = [FORMAT, MASK])
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op("st_tile", (0x09, 0x7F, 8, _), dests = 0, srcs = 1,
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can_eliminate = False, imms = [FORMAT, MASK])
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for (name, exact) in [("any", 0xC000), ("none", 0xC200)]:
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op("jmp_exec_" + name, (exact, (1 << 16) - 1, 6, _), dests = 0, srcs = 0,
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can_eliminate = False, imms = [TARGET])
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# TODO: model implicit r0l destinations
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op("pop_exec", (0x52 | (0x3 << 9), ((1 << 48) - 1) ^ (0x3 << 7) ^ (0x3 << 11), 6, _),
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dests = 0, srcs = 0, can_eliminate = False, imms = [NEST])
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for is_float in [False, True]:
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mod_mask = 0 if is_float else (0x3 << 26) | (0x3 << 38)
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for (cf, cf_op) in [("if", 0), ("else", 1), ("while", 2)]:
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name = "{}_{}cmp".format(cf, "f" if is_float else "i")
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exact = 0x42 | (0x0 if is_float else 0x10) | (cf_op << 9)
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mask = 0x7F | (0x3 << 9) | mod_mask | (0x3 << 44)
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imms = [NEST, FCOND if is_float else ICOND, INVERT_COND]
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op(name, (exact, mask, 6, _), dests = 0, srcs = 2, can_eliminate = False,
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imms = imms, is_float = is_float)
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op("bitop", (0x7E, 0x7F, 6, _), srcs = 2, imms = [TRUTH_TABLE])
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op("convert", (0x3E | L, 0x7F | L | (0x3 << 38), 6, _), srcs = 2, imms = [ROUND])
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op("iter", (0x21, 0xBF, 8, _), srcs = 2, imms = [CHANNELS, PERSPECTIVE])
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op("ldcf", (0xA1, 0xBF, 8, _), srcs = 1, imms = [CHANNELS])
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op("st_vary", None, dests = 0, srcs = 2, can_eliminate = False)
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op("stop", (0x88, 0xFFFF, 2, _), dests = 0, can_eliminate = False)
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op("trap", (0x08, 0xFFFF, 2, _), dests = 0, can_eliminate = False)
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op("writeout", (0x48, 0xFF, 4, _), dests = 0, imms = [WRITEOUT], can_eliminate = False)
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# Convenient aliases.
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op("mov", _, srcs = 1)
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op("not", _, srcs = 1)
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op("xor", _, srcs = 2)
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op("and", _, srcs = 2)
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op("or", _, srcs = 2)
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# Indicates the logical end of the block, before final branches/control flow
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op("logical_end", _, dests = 0, srcs = 0, can_eliminate = False)
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op("collect", _, srcs = VARIABLE)
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op("split", _, srcs = 1, dests = VARIABLE)
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op("phi", _, srcs = VARIABLE)
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op("unit_test", _, dests = 0, srcs = 1, can_eliminate = False)
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# Like mov, but takes a register and can only appear at the start. Gauranteed
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# to be coalesced during RA, rather than lowered to a real move.
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op("preload", _, srcs = 1)
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# Set the nesting counter. Lowers to mov r0l, x after RA.
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op("nest", _, dests = 0, srcs = 1, can_eliminate = False)
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