514 lines
17 KiB
C
514 lines
17 KiB
C
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#include "util/u_math.h"
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#include "nvc0_context.h"
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static void
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nvc0_validate_zcull(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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struct pipe_framebuffer_state *fb = &nvc0->framebuffer;
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struct nv50_surface *sf = nv50_surface(fb->zsbuf);
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struct nv50_miptree *mt = nv50_miptree(sf->base.texture);
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struct nouveau_bo *bo = mt->base.bo;
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uint32_t size;
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uint32_t offset = align(mt->total_size, 1 << 17);
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unsigned width, height;
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assert(mt->base.base.depth0 == 1 && mt->base.base.array_size < 2);
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size = mt->total_size * 2;
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height = align(fb->height, 32);
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width = fb->width % 224;
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if (width)
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width = fb->width + (224 - width);
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else
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width = fb->width;
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MARK_RING (chan, 23, 4);
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BEGIN_RING(chan, RING_3D_(0x1590), 1); /* ZCULL_REGION_INDEX (bits 0x3f) */
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OUT_RING (chan, 0);
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BEGIN_RING(chan, RING_3D_(0x07e8), 2); /* ZCULL_ADDRESS_A_HIGH */
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OUT_RELOCh(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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OUT_RELOCl(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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offset += 1 << 17;
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BEGIN_RING(chan, RING_3D_(0x07f0), 2); /* ZCULL_ADDRESS_B_HIGH */
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OUT_RELOCh(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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OUT_RELOCl(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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BEGIN_RING(chan, RING_3D_(0x07e0), 2);
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OUT_RING (chan, size);
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OUT_RING (chan, size >> 16);
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BEGIN_RING(chan, RING_3D_(0x15c8), 1); /* bits 0x3 */
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OUT_RING (chan, 2);
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BEGIN_RING(chan, RING_3D_(0x07c0), 4); /* ZCULL dimensions */
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OUT_RING (chan, width);
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OUT_RING (chan, height);
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OUT_RING (chan, 1);
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OUT_RING (chan, 0);
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BEGIN_RING(chan, RING_3D_(0x15fc), 2);
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OUT_RING (chan, 0); /* bits 0xffff */
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OUT_RING (chan, 0); /* bits 0xffff */
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BEGIN_RING(chan, RING_3D_(0x1958), 1);
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OUT_RING (chan, 0); /* bits ~0 */
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}
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static void
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nvc0_validate_fb(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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struct pipe_framebuffer_state *fb = &nvc0->framebuffer;
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unsigned i;
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unsigned ms_mode = NVC0_3D_MULTISAMPLE_MODE_MS1;
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boolean serialize = FALSE;
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nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_FRAME);
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BEGIN_RING(chan, RING_3D(RT_CONTROL), 1);
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OUT_RING (chan, (076543210 << 4) | fb->nr_cbufs);
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BEGIN_RING(chan, RING_3D(SCREEN_SCISSOR_HORIZ), 2);
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OUT_RING (chan, fb->width << 16);
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OUT_RING (chan, fb->height << 16);
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MARK_RING(chan, 9 * fb->nr_cbufs, 2 * fb->nr_cbufs);
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for (i = 0; i < fb->nr_cbufs; ++i) {
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struct nv50_miptree *mt = nv50_miptree(fb->cbufs[i]->texture);
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struct nv50_surface *sf = nv50_surface(fb->cbufs[i]);
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struct nouveau_bo *bo = mt->base.bo;
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uint32_t offset = sf->offset;
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BEGIN_RING(chan, RING_3D(RT_ADDRESS_HIGH(i)), 9);
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OUT_RELOCh(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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OUT_RELOCl(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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OUT_RING (chan, sf->width);
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OUT_RING (chan, sf->height);
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OUT_RING (chan, nvc0_format_table[sf->base.format].rt);
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OUT_RING (chan, (mt->layout_3d << 16) |
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mt->level[sf->base.u.tex.level].tile_mode);
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OUT_RING (chan, sf->base.u.tex.first_layer + sf->depth);
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OUT_RING (chan, mt->layer_stride >> 2);
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OUT_RING (chan, sf->base.u.tex.first_layer);
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ms_mode = mt->ms_mode;
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if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
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serialize = TRUE;
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mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
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mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
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/* only register for writing, otherwise we'd always serialize here */
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nvc0_bufctx_add_resident(nvc0, NVC0_BUFCTX_FRAME, &mt->base,
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NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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}
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if (fb->zsbuf) {
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struct nv50_miptree *mt = nv50_miptree(fb->zsbuf->texture);
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struct nv50_surface *sf = nv50_surface(fb->zsbuf);
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struct nouveau_bo *bo = mt->base.bo;
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int unk = mt->base.base.target == PIPE_TEXTURE_2D;
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uint32_t offset = sf->offset;
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MARK_RING (chan, 12, 2);
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BEGIN_RING(chan, RING_3D(ZETA_ADDRESS_HIGH), 5);
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OUT_RELOCh(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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OUT_RELOCl(chan, bo, offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_RDWR);
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OUT_RING (chan, nvc0_format_table[fb->zsbuf->format].rt);
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OUT_RING (chan, mt->level[sf->base.u.tex.level].tile_mode);
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OUT_RING (chan, mt->layer_stride >> 2);
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BEGIN_RING(chan, RING_3D(ZETA_ENABLE), 1);
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OUT_RING (chan, 1);
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BEGIN_RING(chan, RING_3D(ZETA_HORIZ), 3);
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OUT_RING (chan, sf->width);
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OUT_RING (chan, sf->height);
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OUT_RING (chan, (unk << 16) |
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(sf->base.u.tex.first_layer + sf->depth));
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BEGIN_RING(chan, RING_3D(ZETA_BASE_LAYER), 1);
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OUT_RING (chan, sf->base.u.tex.first_layer);
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ms_mode = mt->ms_mode;
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if (mt->base.status & NOUVEAU_BUFFER_STATUS_GPU_READING)
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serialize = TRUE;
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mt->base.status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
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mt->base.status &= ~NOUVEAU_BUFFER_STATUS_GPU_READING;
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nvc0_bufctx_add_resident(nvc0, NVC0_BUFCTX_FRAME, &mt->base,
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NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
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} else {
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BEGIN_RING(chan, RING_3D(ZETA_ENABLE), 1);
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OUT_RING (chan, 0);
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}
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IMMED_RING(chan, RING_3D(MULTISAMPLE_MODE), ms_mode);
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if (serialize) {
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BEGIN_RING(chan, RING_3D(SERIALIZE), 1);
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OUT_RING (chan, 0);
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}
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}
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static void
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nvc0_validate_blend_colour(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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BEGIN_RING(chan, RING_3D(BLEND_COLOR(0)), 4);
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OUT_RINGf (chan, nvc0->blend_colour.color[0]);
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OUT_RINGf (chan, nvc0->blend_colour.color[1]);
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OUT_RINGf (chan, nvc0->blend_colour.color[2]);
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OUT_RINGf (chan, nvc0->blend_colour.color[3]);
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}
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static void
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nvc0_validate_stencil_ref(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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const ubyte *ref = &nvc0->stencil_ref.ref_value[0];
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IMMED_RING(chan, RING_3D(STENCIL_FRONT_FUNC_REF), ref[0]);
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IMMED_RING(chan, RING_3D(STENCIL_BACK_FUNC_REF), ref[1]);
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}
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static void
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nvc0_validate_stipple(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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unsigned i;
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BEGIN_RING(chan, RING_3D(POLYGON_STIPPLE_PATTERN(0)), 32);
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for (i = 0; i < 32; ++i)
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OUT_RING(chan, util_bswap32(nvc0->stipple.stipple[i]));
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}
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static void
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nvc0_validate_scissor(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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struct pipe_scissor_state *s = &nvc0->scissor;
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if (!(nvc0->dirty & NVC0_NEW_SCISSOR) &&
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nvc0->rast->pipe.scissor == nvc0->state.scissor)
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return;
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nvc0->state.scissor = nvc0->rast->pipe.scissor;
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BEGIN_RING(chan, RING_3D(SCISSOR_HORIZ(0)), 2);
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if (nvc0->rast->pipe.scissor) {
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OUT_RING(chan, (s->maxx << 16) | s->minx);
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OUT_RING(chan, (s->maxy << 16) | s->miny);
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} else {
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OUT_RING(chan, (0xffff << 16) | 0);
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OUT_RING(chan, (0xffff << 16) | 0);
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}
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}
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static void
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nvc0_validate_viewport(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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struct pipe_viewport_state *vp = &nvc0->viewport;
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int x, y, w, h;
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float zmin, zmax;
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BEGIN_RING(chan, RING_3D(VIEWPORT_TRANSLATE_X(0)), 3);
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OUT_RINGf (chan, vp->translate[0]);
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OUT_RINGf (chan, vp->translate[1]);
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OUT_RINGf (chan, vp->translate[2]);
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BEGIN_RING(chan, RING_3D(VIEWPORT_SCALE_X(0)), 3);
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OUT_RINGf (chan, vp->scale[0]);
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OUT_RINGf (chan, vp->scale[1]);
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OUT_RINGf (chan, vp->scale[2]);
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/* now set the viewport rectangle to viewport dimensions for clipping */
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x = util_iround(MAX2(0.0f, vp->translate[0] - fabsf(vp->scale[0])));
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y = util_iround(MAX2(0.0f, vp->translate[1] - fabsf(vp->scale[1])));
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w = util_iround(vp->translate[0] + fabsf(vp->scale[0])) - x;
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h = util_iround(vp->translate[1] + fabsf(vp->scale[1])) - y;
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zmin = vp->translate[2] - fabsf(vp->scale[2]);
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zmax = vp->translate[2] + fabsf(vp->scale[2]);
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BEGIN_RING(chan, RING_3D(VIEWPORT_HORIZ(0)), 2);
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OUT_RING (chan, (w << 16) | x);
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OUT_RING (chan, (h << 16) | y);
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BEGIN_RING(chan, RING_3D(DEPTH_RANGE_NEAR(0)), 2);
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OUT_RINGf (chan, zmin);
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OUT_RINGf (chan, zmax);
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}
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static void
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nvc0_validate_clip(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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uint32_t clip;
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if (nvc0->clip.depth_clamp) {
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clip =
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NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1 |
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NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
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NVC0_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
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NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK2;
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} else {
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clip = NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1;
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}
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BEGIN_RING(chan, RING_3D(VIEW_VOLUME_CLIP_CTRL), 1);
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OUT_RING (chan, clip);
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if (nvc0->clip.nr) {
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struct nouveau_bo *bo = nvc0->screen->uniforms;
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MARK_RING (chan, 6 + nvc0->clip.nr * 4, 2);
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BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
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OUT_RING (chan, 256);
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OUT_RELOCh(chan, bo, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, bo, 5 << 16, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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BEGIN_RING_1I(chan, RING_3D(CB_POS), nvc0->clip.nr * 4 + 1);
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OUT_RING (chan, 0);
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OUT_RINGp (chan, &nvc0->clip.ucp[0][0], nvc0->clip.nr * 4);
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BEGIN_RING(chan, RING_3D(VP_CLIP_DISTANCE_ENABLE), 1);
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OUT_RING (chan, (1 << nvc0->clip.nr) - 1);
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} else {
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IMMED_RING(chan, RING_3D(VP_CLIP_DISTANCE_ENABLE), 0);
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}
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}
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static void
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nvc0_validate_blend(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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WAIT_RING(chan, nvc0->blend->size);
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OUT_RINGp(chan, nvc0->blend->state, nvc0->blend->size);
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}
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static void
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nvc0_validate_zsa(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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WAIT_RING(chan, nvc0->zsa->size);
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OUT_RINGp(chan, nvc0->zsa->state, nvc0->zsa->size);
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}
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static void
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nvc0_validate_rasterizer(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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WAIT_RING(chan, nvc0->rast->size);
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OUT_RINGp(chan, nvc0->rast->state, nvc0->rast->size);
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}
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static void
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nvc0_constbufs_validate(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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struct nouveau_bo *bo;
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unsigned s;
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for (s = 0; s < 5; ++s) {
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struct nv04_resource *res;
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int i;
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while (nvc0->constbuf_dirty[s]) {
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unsigned base = 0;
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unsigned offset = 0, words = 0;
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boolean rebind = TRUE;
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i = ffs(nvc0->constbuf_dirty[s]) - 1;
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nvc0->constbuf_dirty[s] &= ~(1 << i);
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res = nv04_resource(nvc0->constbuf[s][i]);
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if (!res) {
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BEGIN_RING(chan, RING_3D(CB_BIND(s)), 1);
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OUT_RING (chan, (i << 4) | 0);
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if (i == 0)
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nvc0->state.uniform_buffer_bound[s] = 0;
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continue;
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}
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if (!nouveau_resource_mapped_by_gpu(&res->base)) {
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if (i == 0) {
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base = s << 16;
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bo = nvc0->screen->uniforms;
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if (nvc0->state.uniform_buffer_bound[s] >= res->base.width0)
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rebind = FALSE;
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else
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nvc0->state.uniform_buffer_bound[s] =
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align(res->base.width0, 0x100);
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} else {
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bo = res->bo;
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}
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#if 0
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nvc0_m2mf_push_linear(nvc0, bo, NOUVEAU_BO_VRAM,
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base, res->base.width0, res->data);
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BEGIN_RING(chan, RING_3D_(0x021c), 1);
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OUT_RING (chan, 0x1111);
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#else
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words = res->base.width0 / 4;
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#endif
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} else {
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bo = res->bo;
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if (i == 0)
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nvc0->state.uniform_buffer_bound[s] = 0;
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}
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if (bo != nvc0->screen->uniforms)
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nvc0_bufctx_add_resident(nvc0, NVC0_BUFCTX_CONSTANT, res,
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NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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if (rebind) {
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MARK_RING (chan, 4, 2);
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BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
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OUT_RING (chan, align(res->base.width0, 0x100));
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OUT_RELOCh(chan, bo, base, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, bo, base, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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BEGIN_RING(chan, RING_3D(CB_BIND(s)), 1);
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OUT_RING (chan, (i << 4) | 1);
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}
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while (words) {
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unsigned nr = AVAIL_RING(chan);
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if (nr < 16) {
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FIRE_RING(chan);
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continue;
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}
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nr = MIN2(MIN2(nr - 6, words), NV04_PFIFO_MAX_PACKET_LEN - 1);
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MARK_RING (chan, nr + 5, 2);
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BEGIN_RING(chan, RING_3D(CB_SIZE), 3);
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OUT_RING (chan, align(res->base.width0, 0x100));
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OUT_RELOCh(chan, bo, base, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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OUT_RELOCl(chan, bo, base, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
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BEGIN_RING_1I(chan, RING_3D(CB_POS), nr + 1);
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OUT_RING (chan, offset);
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OUT_RINGp (chan, &res->data[offset], nr);
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offset += nr * 4;
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words -= nr;
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}
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}
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}
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}
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static void
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nvc0_validate_sample_mask(struct nvc0_context *nvc0)
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{
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struct nouveau_channel *chan = nvc0->screen->base.channel;
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unsigned mask[4] =
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{
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nvc0->sample_mask & 0xffff,
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nvc0->sample_mask & 0xffff,
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nvc0->sample_mask & 0xffff,
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nvc0->sample_mask & 0xffff
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};
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BEGIN_RING(chan, RING_3D(MSAA_MASK(0)), 4);
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OUT_RING (chan, mask[0]);
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OUT_RING (chan, mask[1]);
|
|
OUT_RING (chan, mask[2]);
|
|
OUT_RING (chan, mask[3]);
|
|
BEGIN_RING(chan, RING_3D(SAMPLE_SHADING), 1);
|
|
OUT_RING (chan, 0x01);
|
|
}
|
|
|
|
static void
|
|
nvc0_validate_derived_1(struct nvc0_context *nvc0)
|
|
{
|
|
struct nouveau_channel *chan = nvc0->screen->base.channel;
|
|
boolean early_z;
|
|
|
|
early_z = nvc0->fragprog->fp.early_z && !nvc0->zsa->pipe.alpha.enabled;
|
|
|
|
if (early_z != nvc0->state.early_z) {
|
|
nvc0->state.early_z = early_z;
|
|
IMMED_RING(chan, RING_3D(EARLY_FRAGMENT_TESTS), early_z);
|
|
}
|
|
}
|
|
|
|
static void
|
|
nvc0_switch_pipe_context(struct nvc0_context *ctx_to)
|
|
{
|
|
struct nvc0_context *ctx_from = ctx_to->screen->cur_ctx;
|
|
|
|
if (ctx_from)
|
|
ctx_to->state = ctx_from->state;
|
|
|
|
ctx_to->dirty = ~0;
|
|
|
|
if (!ctx_to->vertex)
|
|
ctx_to->dirty &= ~(NVC0_NEW_VERTEX | NVC0_NEW_ARRAYS);
|
|
|
|
if (!ctx_to->vertprog)
|
|
ctx_to->dirty &= ~NVC0_NEW_VERTPROG;
|
|
if (!ctx_to->fragprog)
|
|
ctx_to->dirty &= ~NVC0_NEW_FRAGPROG;
|
|
|
|
if (!ctx_to->blend)
|
|
ctx_to->dirty &= ~NVC0_NEW_BLEND;
|
|
if (!ctx_to->rast)
|
|
ctx_to->dirty &= ~NVC0_NEW_RASTERIZER;
|
|
if (!ctx_to->zsa)
|
|
ctx_to->dirty &= ~NVC0_NEW_ZSA;
|
|
|
|
ctx_to->screen->cur_ctx = ctx_to;
|
|
}
|
|
|
|
static struct state_validate {
|
|
void (*func)(struct nvc0_context *);
|
|
uint32_t states;
|
|
} validate_list[] = {
|
|
{ nvc0_validate_fb, NVC0_NEW_FRAMEBUFFER },
|
|
{ nvc0_validate_blend, NVC0_NEW_BLEND },
|
|
{ nvc0_validate_zsa, NVC0_NEW_ZSA },
|
|
{ nvc0_validate_sample_mask, NVC0_NEW_SAMPLE_MASK },
|
|
{ nvc0_validate_rasterizer, NVC0_NEW_RASTERIZER },
|
|
{ nvc0_validate_blend_colour, NVC0_NEW_BLEND_COLOUR },
|
|
{ nvc0_validate_stencil_ref, NVC0_NEW_STENCIL_REF },
|
|
{ nvc0_validate_stipple, NVC0_NEW_STIPPLE },
|
|
{ nvc0_validate_scissor, NVC0_NEW_SCISSOR | NVC0_NEW_RASTERIZER },
|
|
{ nvc0_validate_viewport, NVC0_NEW_VIEWPORT },
|
|
{ nvc0_validate_clip, NVC0_NEW_CLIP },
|
|
{ nvc0_vertprog_validate, NVC0_NEW_VERTPROG },
|
|
{ nvc0_tctlprog_validate, NVC0_NEW_TCTLPROG },
|
|
{ nvc0_tevlprog_validate, NVC0_NEW_TEVLPROG },
|
|
{ nvc0_gmtyprog_validate, NVC0_NEW_GMTYPROG },
|
|
{ nvc0_fragprog_validate, NVC0_NEW_FRAGPROG },
|
|
{ nvc0_validate_derived_1, NVC0_NEW_FRAGPROG | NVC0_NEW_ZSA },
|
|
{ nvc0_constbufs_validate, NVC0_NEW_CONSTBUF },
|
|
{ nvc0_validate_textures, NVC0_NEW_TEXTURES },
|
|
{ nvc0_validate_samplers, NVC0_NEW_SAMPLERS },
|
|
{ nvc0_vertex_arrays_validate, NVC0_NEW_VERTEX | NVC0_NEW_ARRAYS },
|
|
{ nvc0_tfb_validate, NVC0_NEW_TFB | NVC0_NEW_TFB_BUFFERS }
|
|
};
|
|
#define validate_list_len (sizeof(validate_list) / sizeof(validate_list[0]))
|
|
|
|
boolean
|
|
nvc0_state_validate(struct nvc0_context *nvc0)
|
|
{
|
|
unsigned i;
|
|
|
|
if (nvc0->screen->cur_ctx != nvc0)
|
|
nvc0_switch_pipe_context(nvc0);
|
|
|
|
if (nvc0->dirty) {
|
|
for (i = 0; i < validate_list_len; ++i) {
|
|
struct state_validate *validate = &validate_list[i];
|
|
|
|
if (nvc0->dirty & validate->states)
|
|
validate->func(nvc0);
|
|
}
|
|
nvc0->dirty = 0;
|
|
}
|
|
|
|
nvc0_bufctx_emit_relocs(nvc0);
|
|
|
|
return TRUE;
|
|
}
|