
The eventual goal is to hide all radv-specific details behind ac_nir_context::abi, so that the NIR->LLVM code can be re-used by radeonsi. During development, we live with a partial split, where some of the NIR->LLVM code still relies on linking back to the nir_to_llvm_context (which should ultimately be renamed to reflect that it's radv-specific). The idea is to get rid of these backlinks over time. Reviewed-by: Marek Olšák <marek.olsak@amd.com>
231 lines
6.1 KiB
C
231 lines
6.1 KiB
C
/*
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* Copyright © 2016 Bas Nieuwenhuizen
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#ifndef AC_NIR_TO_LLVM_H
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#define AC_NIR_TO_LLVM_H
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#include <stdbool.h>
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#include "llvm-c/Core.h"
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#include "llvm-c/TargetMachine.h"
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#include "amd_family.h"
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#include "../vulkan/radv_descriptor_set.h"
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#include "ac_shader_info.h"
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#include "shader_enums.h"
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struct ac_shader_binary;
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struct ac_shader_config;
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struct nir_shader;
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struct radv_pipeline_layout;
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struct ac_llvm_context;
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struct ac_shader_abi;
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struct ac_vs_variant_key {
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uint32_t instance_rate_inputs;
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uint32_t as_es:1;
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uint32_t as_ls:1;
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uint32_t export_prim_id:1;
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};
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struct ac_tes_variant_key {
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uint32_t as_es:1;
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uint32_t export_prim_id:1;
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};
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struct ac_tcs_variant_key {
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unsigned primitive_mode;
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unsigned input_vertices;
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};
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struct ac_fs_variant_key {
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uint32_t col_format;
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uint32_t is_int8;
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};
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union ac_shader_variant_key {
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struct ac_vs_variant_key vs;
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struct ac_fs_variant_key fs;
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struct ac_tes_variant_key tes;
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struct ac_tcs_variant_key tcs;
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};
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struct ac_nir_compiler_options {
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struct radv_pipeline_layout *layout;
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union ac_shader_variant_key key;
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bool unsafe_math;
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bool supports_spill;
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enum radeon_family family;
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enum chip_class chip_class;
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};
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struct ac_userdata_info {
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int8_t sgpr_idx;
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uint8_t num_sgprs;
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bool indirect;
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uint32_t indirect_offset;
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};
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enum ac_ud_index {
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AC_UD_SCRATCH_RING_OFFSETS = 0,
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AC_UD_PUSH_CONSTANTS = 1,
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AC_UD_INDIRECT_DESCRIPTOR_SETS = 2,
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AC_UD_SHADER_START = 3,
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AC_UD_VS_VERTEX_BUFFERS = AC_UD_SHADER_START,
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AC_UD_VS_BASE_VERTEX_START_INSTANCE,
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AC_UD_VS_LS_TCS_IN_LAYOUT,
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AC_UD_VS_MAX_UD,
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AC_UD_PS_SAMPLE_POS_OFFSET = AC_UD_SHADER_START,
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AC_UD_PS_MAX_UD,
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AC_UD_CS_GRID_SIZE = AC_UD_SHADER_START,
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AC_UD_CS_MAX_UD,
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AC_UD_GS_VS_RING_STRIDE_ENTRIES = AC_UD_SHADER_START,
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AC_UD_GS_MAX_UD,
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AC_UD_TCS_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
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AC_UD_TCS_MAX_UD,
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AC_UD_TES_OFFCHIP_LAYOUT = AC_UD_SHADER_START,
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AC_UD_TES_MAX_UD,
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AC_UD_MAX_UD = AC_UD_VS_MAX_UD,
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};
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/* descriptor index into scratch ring offsets */
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#define RING_SCRATCH 0
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#define RING_ESGS_VS 1
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#define RING_ESGS_GS 2
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#define RING_GSVS_VS 3
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#define RING_GSVS_GS 4
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#define RING_HS_TESS_FACTOR 5
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#define RING_HS_TESS_OFFCHIP 6
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#define RING_PS_SAMPLE_POSITIONS 7
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// Match MAX_SETS from radv_descriptor_set.h
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#define AC_UD_MAX_SETS MAX_SETS
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struct ac_userdata_locations {
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struct ac_userdata_info descriptor_sets[AC_UD_MAX_SETS];
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struct ac_userdata_info shader_data[AC_UD_MAX_UD];
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};
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struct ac_vs_output_info {
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uint8_t vs_output_param_offset[VARYING_SLOT_MAX];
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uint8_t clip_dist_mask;
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uint8_t cull_dist_mask;
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uint8_t param_exports;
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bool writes_pointsize;
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bool writes_layer;
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bool writes_viewport_index;
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bool export_prim_id;
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uint32_t export_mask;
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unsigned pos_exports;
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};
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struct ac_es_output_info {
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uint32_t esgs_itemsize;
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};
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struct ac_shader_variant_info {
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struct ac_userdata_locations user_sgprs_locs;
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struct ac_shader_info info;
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unsigned num_user_sgprs;
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unsigned num_input_sgprs;
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unsigned num_input_vgprs;
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bool need_indirect_descriptor_sets;
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union {
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struct {
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struct ac_vs_output_info outinfo;
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struct ac_es_output_info es_info;
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unsigned vgpr_comp_cnt;
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bool as_es;
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bool as_ls;
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uint64_t outputs_written;
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} vs;
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struct {
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unsigned num_interp;
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uint32_t input_mask;
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unsigned output_mask;
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uint32_t flat_shaded_mask;
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bool has_pcoord;
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bool can_discard;
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bool writes_z;
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bool writes_stencil;
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bool writes_sample_mask;
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bool early_fragment_test;
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bool writes_memory;
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bool force_persample;
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bool prim_id_input;
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bool layer_input;
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} fs;
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struct {
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unsigned block_size[3];
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} cs;
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struct {
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unsigned vertices_in;
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unsigned vertices_out;
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unsigned output_prim;
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unsigned invocations;
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unsigned gsvs_vertex_size;
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unsigned max_gsvs_emit_size;
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bool uses_prim_id;
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} gs;
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struct {
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bool uses_prim_id;
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unsigned tcs_vertices_out;
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/* Which outputs are actually written */
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uint64_t outputs_written;
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/* Which patch outputs are actually written */
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uint32_t patch_outputs_written;
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} tcs;
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struct {
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struct ac_vs_output_info outinfo;
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struct ac_es_output_info es_info;
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bool as_es;
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unsigned primitive_mode;
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enum gl_tess_spacing spacing;
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bool ccw;
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bool point_mode;
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bool uses_prim_id;
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} tes;
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};
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};
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void ac_compile_nir_shader(LLVMTargetMachineRef tm,
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struct ac_shader_binary *binary,
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struct ac_shader_config *config,
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struct ac_shader_variant_info *shader_info,
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struct nir_shader *nir,
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const struct ac_nir_compiler_options *options,
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bool dump_shader);
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void ac_create_gs_copy_shader(LLVMTargetMachineRef tm,
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struct nir_shader *geom_shader,
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struct ac_shader_binary *binary,
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struct ac_shader_config *config,
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struct ac_shader_variant_info *shader_info,
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const struct ac_nir_compiler_options *options,
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bool dump_shader);
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struct nir_to_llvm_context;
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void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
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struct nir_shader *nir, struct nir_to_llvm_context *nctx);
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#endif /* AC_NIR_TO_LLVM_H */
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