Files
third_party_mesa3d/src/intel/compiler
Jason Ekstrand 9e0fd49858 intel/fs/ra: Fix payload node setup for SIMD16 on Gen4-5
Since 40e1d798c6, we are now using physical register numbers for
everything which makes it all simpler.  In particular, we no longer need
the special case for setting up the payload for SIMD16 on Gen4-5.  This
fixes a pile of piglit tests on ILK and similar.

Fixes: 40e1d798c6 "intel/fs: Use ra_alloc_contig_reg_class()..."
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11221>
2021-06-07 16:52:19 +00:00
..
2021-04-30 01:51:23 -07:00