9bd8000c6c
All VkFoo structs are typedef'd to not need the struct keyword. Leaving it in there is just extra characters and breaks Vulkan's aliasing when stuff gets promoted to core versions. It's better to just never use struct for VkFoo. Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
555 lines
20 KiB
C
555 lines
20 KiB
C
/*
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* Copyright © 2015 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*/
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#include <assert.h>
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#include <stdbool.h>
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#include <string.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include "anv_private.h"
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#include "common/gen_sample_positions.h"
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#include "genxml/gen_macros.h"
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#include "genxml/genX_pack.h"
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#include "vk_util.h"
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#if GEN_GEN == 10
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/**
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* From Gen10 Workarounds page in h/w specs:
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* WaSampleOffsetIZ:
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* "Prior to the 3DSTATE_SAMPLE_PATTERN driver must ensure there are no
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* markers in the pipeline by programming a PIPE_CONTROL with stall."
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*/
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static void
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gen10_emit_wa_cs_stall_flush(struct anv_batch *batch)
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{
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anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
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pc.CommandStreamerStallEnable = true;
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pc.StallAtPixelScoreboard = true;
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}
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}
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/**
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* From Gen10 Workarounds page in h/w specs:
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* WaSampleOffsetIZ:_cs_stall_flush
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* "When 3DSTATE_SAMPLE_PATTERN is programmed, driver must then issue an
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* MI_LOAD_REGISTER_IMM command to an offset between 0x7000 and 0x7FFF(SVL)
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* after the command to ensure the state has been delivered prior to any
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* command causing a marker in the pipeline."
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*/
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static void
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gen10_emit_wa_lri_to_cache_mode_zero(struct anv_batch *batch)
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{
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/* Before changing the value of CACHE_MODE_0 register, GFX pipeline must
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* be idle; i.e., full flush is required.
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*/
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anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
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pc.DepthCacheFlushEnable = true;
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pc.DCFlushEnable = true;
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pc.RenderTargetCacheFlushEnable = true;
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pc.InstructionCacheInvalidateEnable = true;
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pc.StateCacheInvalidationEnable = true;
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pc.TextureCacheInvalidationEnable = true;
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pc.VFCacheInvalidationEnable = true;
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pc.ConstantCacheInvalidationEnable =true;
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}
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/* Write to CACHE_MODE_0 (0x7000) */
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uint32_t cache_mode_0 = 0;
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anv_pack_struct(&cache_mode_0, GENX(CACHE_MODE_0));
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anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(CACHE_MODE_0_num);
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lri.DataDWord = cache_mode_0;
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}
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}
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#endif
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static void
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genX(emit_slice_hashing_state)(struct anv_device *device,
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struct anv_batch *batch)
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{
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device->slice_hash = (struct anv_state) { 0 };
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#if GEN_GEN == 11
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const unsigned *ppipe_subslices = device->info.ppipe_subslices;
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int subslices_delta = ppipe_subslices[0] - ppipe_subslices[1];
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if (subslices_delta == 0)
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return;
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unsigned size = GENX(SLICE_HASH_TABLE_length) * 4;
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device->slice_hash =
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anv_state_pool_alloc(&device->dynamic_state_pool, size, 64);
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struct GENX(SLICE_HASH_TABLE) table0 = {
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.Entry = {
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{ 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1 },
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{ 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1 },
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{ 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0 },
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{ 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1 },
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{ 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1 },
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{ 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0 },
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{ 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1 },
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{ 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1 },
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{ 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0 },
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{ 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1 },
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{ 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1 },
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{ 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0 },
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{ 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1 },
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{ 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1 },
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{ 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0 },
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{ 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1, 1, 0, 1 }
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}
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};
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struct GENX(SLICE_HASH_TABLE) table1 = {
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.Entry = {
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{ 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0 },
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{ 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0 },
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{ 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1 },
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{ 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0 },
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{ 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0 },
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{ 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1 },
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{ 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0 },
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{ 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0 },
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{ 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1 },
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{ 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0 },
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{ 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0 },
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{ 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1 },
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{ 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0 },
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{ 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0 },
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{ 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1 },
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{ 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0 }
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}
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};
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const struct GENX(SLICE_HASH_TABLE) *table =
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subslices_delta < 0 ? &table0 : &table1;
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GENX(SLICE_HASH_TABLE_pack)(NULL, device->slice_hash.map, table);
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anv_batch_emit(batch, GENX(3DSTATE_SLICE_TABLE_STATE_POINTERS), ptr) {
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ptr.SliceHashStatePointerValid = true;
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ptr.SliceHashTableStatePointer = device->slice_hash.offset;
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}
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anv_batch_emit(batch, GENX(3DSTATE_3D_MODE), mode) {
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mode.SliceHashingTableEnable = true;
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}
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#endif
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}
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VkResult
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genX(init_device_state)(struct anv_device *device)
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{
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struct anv_batch batch;
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uint32_t cmds[64];
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batch.start = batch.next = cmds;
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batch.end = (void *) cmds + sizeof(cmds);
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anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) {
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#if GEN_GEN >= 9
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ps.MaskBits = 3;
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#endif
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ps.PipelineSelection = _3D;
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}
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#if GEN_GEN == 9
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uint32_t cache_mode_1;
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anv_pack_struct(&cache_mode_1, GENX(CACHE_MODE_1),
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.FloatBlendOptimizationEnable = true,
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.FloatBlendOptimizationEnableMask = true,
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.PartialResolveDisableInVC = true,
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.PartialResolveDisableInVCMask = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(CACHE_MODE_1_num);
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lri.DataDWord = cache_mode_1;
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}
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#endif
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anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa);
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anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) {
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rect.ClippedDrawingRectangleYMin = 0;
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rect.ClippedDrawingRectangleXMin = 0;
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rect.ClippedDrawingRectangleYMax = UINT16_MAX;
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rect.ClippedDrawingRectangleXMax = UINT16_MAX;
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rect.DrawingRectangleOriginY = 0;
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rect.DrawingRectangleOriginX = 0;
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}
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#if GEN_GEN >= 8
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anv_batch_emit(&batch, GENX(3DSTATE_WM_CHROMAKEY), ck);
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#if GEN_GEN == 10
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gen10_emit_wa_cs_stall_flush(&batch);
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#endif
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/* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
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* VkPhysicalDeviceFeatures::standardSampleLocations.
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*/
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anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) {
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GEN_SAMPLE_POS_1X(sp._1xSample);
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GEN_SAMPLE_POS_2X(sp._2xSample);
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GEN_SAMPLE_POS_4X(sp._4xSample);
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GEN_SAMPLE_POS_8X(sp._8xSample);
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#if GEN_GEN >= 9
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GEN_SAMPLE_POS_16X(sp._16xSample);
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#endif
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}
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/* The BDW+ docs describe how to use the 3DSTATE_WM_HZ_OP instruction in the
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* section titled, "Optimized Depth Buffer Clear and/or Stencil Buffer
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* Clear." It mentions that the packet overrides GPU state for the clear
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* operation and needs to be reset to 0s to clear the overrides. Depending
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* on the kernel, we may not get a context with the state for this packet
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* zeroed. Do it ourselves just in case. We've observed this to prevent a
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* number of GPU hangs on ICL.
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*/
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anv_batch_emit(&batch, GENX(3DSTATE_WM_HZ_OP), hzp);
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#endif
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#if GEN_GEN == 10
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gen10_emit_wa_lri_to_cache_mode_zero(&batch);
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#endif
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#if GEN_GEN == 11
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/* The default behavior of bit 5 "Headerless Message for Pre-emptable
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* Contexts" in SAMPLER MODE register is set to 0, which means
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* headerless sampler messages are not allowed for pre-emptable
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* contexts. Set the bit 5 to 1 to allow them.
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*/
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uint32_t sampler_mode;
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anv_pack_struct(&sampler_mode, GENX(SAMPLER_MODE),
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.HeaderlessMessageforPreemptableContexts = true,
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.HeaderlessMessageforPreemptableContextsMask = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(SAMPLER_MODE_num);
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lri.DataDWord = sampler_mode;
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}
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/* Bit 1 "Enabled Texel Offset Precision Fix" must be set in
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* HALF_SLICE_CHICKEN7 register.
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*/
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uint32_t half_slice_chicken7;
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anv_pack_struct(&half_slice_chicken7, GENX(HALF_SLICE_CHICKEN7),
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.EnabledTexelOffsetPrecisionFix = true,
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.EnabledTexelOffsetPrecisionFixMask = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(HALF_SLICE_CHICKEN7_num);
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lri.DataDWord = half_slice_chicken7;
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}
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uint32_t tccntlreg;
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anv_pack_struct(&tccntlreg, GENX(TCCNTLREG),
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.L3DataPartialWriteMergingEnable = true,
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.ColorZPartialWriteMergingEnable = true,
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.URBPartialWriteMergingEnable = true,
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.TCDisable = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(TCCNTLREG_num);
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lri.DataDWord = tccntlreg;
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}
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#endif
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genX(emit_slice_hashing_state)(device, &batch);
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#if GEN_GEN >= 11
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/* hardware specification recommends disabling repacking for
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* the compatibility with decompression mechanism in display controller.
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*/
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if (device->info.disable_ccs_repack) {
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uint32_t cache_mode_0;
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anv_pack_struct(&cache_mode_0,
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GENX(CACHE_MODE_0),
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.DisableRepackingforCompression = true,
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.DisableRepackingforCompressionMask = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(CACHE_MODE_0_num);
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lri.DataDWord = cache_mode_0;
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}
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}
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#endif
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/* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so
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* 3DSTATE_CONSTANT_XS buffer 0 is an absolute address.
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*
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* This is only safe on kernels with context isolation support.
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*/
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if (GEN_GEN >= 8 &&
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device->instance->physicalDevice.has_context_isolation) {
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UNUSED uint32_t tmp_reg;
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#if GEN_GEN >= 9
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anv_pack_struct(&tmp_reg, GENX(CS_DEBUG_MODE2),
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.CONSTANT_BUFFERAddressOffsetDisable = true,
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.CONSTANT_BUFFERAddressOffsetDisableMask = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(CS_DEBUG_MODE2_num);
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lri.DataDWord = tmp_reg;
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}
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#elif GEN_GEN == 8
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anv_pack_struct(&tmp_reg, GENX(INSTPM),
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.CONSTANT_BUFFERAddressOffsetDisable = true,
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.CONSTANT_BUFFERAddressOffsetDisableMask = true);
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anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
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lri.RegisterOffset = GENX(INSTPM_num);
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lri.DataDWord = tmp_reg;
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}
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#endif
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}
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anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
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assert(batch.next <= batch.end);
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return anv_queue_submit_simple_batch(&device->queue, &batch);
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}
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static uint32_t
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vk_to_gen_tex_filter(VkFilter filter, bool anisotropyEnable)
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{
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switch (filter) {
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default:
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assert(!"Invalid filter");
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case VK_FILTER_NEAREST:
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return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_NEAREST;
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case VK_FILTER_LINEAR:
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return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_LINEAR;
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}
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}
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static uint32_t
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vk_to_gen_max_anisotropy(float ratio)
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{
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return (anv_clamp_f(ratio, 2, 16) - 2) / 2;
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}
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static const uint32_t vk_to_gen_mipmap_mode[] = {
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[VK_SAMPLER_MIPMAP_MODE_NEAREST] = MIPFILTER_NEAREST,
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[VK_SAMPLER_MIPMAP_MODE_LINEAR] = MIPFILTER_LINEAR
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};
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static const uint32_t vk_to_gen_tex_address[] = {
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[VK_SAMPLER_ADDRESS_MODE_REPEAT] = TCM_WRAP,
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[VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT] = TCM_MIRROR,
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[VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE] = TCM_CLAMP,
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[VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE] = TCM_MIRROR_ONCE,
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[VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER] = TCM_CLAMP_BORDER,
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};
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/* Vulkan specifies the result of shadow comparisons as:
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* 1 if ref <op> texel,
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* 0 otherwise.
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*
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* The hardware does:
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* 0 if texel <op> ref,
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* 1 otherwise.
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*
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* So, these look a bit strange because there's both a negation
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* and swapping of the arguments involved.
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*/
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static const uint32_t vk_to_gen_shadow_compare_op[] = {
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[VK_COMPARE_OP_NEVER] = PREFILTEROPALWAYS,
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[VK_COMPARE_OP_LESS] = PREFILTEROPLEQUAL,
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[VK_COMPARE_OP_EQUAL] = PREFILTEROPNOTEQUAL,
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[VK_COMPARE_OP_LESS_OR_EQUAL] = PREFILTEROPLESS,
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[VK_COMPARE_OP_GREATER] = PREFILTEROPGEQUAL,
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[VK_COMPARE_OP_NOT_EQUAL] = PREFILTEROPEQUAL,
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[VK_COMPARE_OP_GREATER_OR_EQUAL] = PREFILTEROPGREATER,
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[VK_COMPARE_OP_ALWAYS] = PREFILTEROPNEVER,
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};
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#if GEN_GEN >= 9
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static const uint32_t vk_to_gen_sampler_reduction_mode[] = {
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[VK_SAMPLER_REDUCTION_MODE_WEIGHTED_AVERAGE_EXT] = STD_FILTER,
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[VK_SAMPLER_REDUCTION_MODE_MIN_EXT] = MINIMUM,
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[VK_SAMPLER_REDUCTION_MODE_MAX_EXT] = MAXIMUM,
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};
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#endif
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VkResult genX(CreateSampler)(
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VkDevice _device,
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const VkSamplerCreateInfo* pCreateInfo,
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const VkAllocationCallbacks* pAllocator,
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VkSampler* pSampler)
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{
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ANV_FROM_HANDLE(anv_device, device, _device);
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const struct anv_physical_device *pdevice =
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&device->instance->physicalDevice;
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struct anv_sampler *sampler;
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assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
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sampler = vk_zalloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
|
|
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
|
|
if (!sampler)
|
|
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
|
|
|
|
sampler->n_planes = 1;
|
|
|
|
uint32_t border_color_stride = GEN_IS_HASWELL ? 512 : 64;
|
|
uint32_t border_color_offset = device->border_colors.offset +
|
|
pCreateInfo->borderColor *
|
|
border_color_stride;
|
|
|
|
#if GEN_GEN >= 9
|
|
unsigned sampler_reduction_mode = STD_FILTER;
|
|
bool enable_sampler_reduction = false;
|
|
#endif
|
|
|
|
vk_foreach_struct(ext, pCreateInfo->pNext) {
|
|
switch (ext->sType) {
|
|
case VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_INFO: {
|
|
VkSamplerYcbcrConversionInfo *pSamplerConversion =
|
|
(VkSamplerYcbcrConversionInfo *) ext;
|
|
ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion,
|
|
pSamplerConversion->conversion);
|
|
|
|
/* Ignore conversion for non-YUV formats. This fulfills a requirement
|
|
* for clients that want to utilize same code path for images with
|
|
* external formats (VK_FORMAT_UNDEFINED) and "regular" RGBA images
|
|
* where format is known.
|
|
*/
|
|
if (conversion == NULL || !conversion->format->can_ycbcr)
|
|
break;
|
|
|
|
sampler->n_planes = conversion->format->n_planes;
|
|
sampler->conversion = conversion;
|
|
break;
|
|
}
|
|
#if GEN_GEN >= 9
|
|
case VK_STRUCTURE_TYPE_SAMPLER_REDUCTION_MODE_CREATE_INFO_EXT: {
|
|
VkSamplerReductionModeCreateInfoEXT *sampler_reduction =
|
|
(VkSamplerReductionModeCreateInfoEXT *) ext;
|
|
sampler_reduction_mode =
|
|
vk_to_gen_sampler_reduction_mode[sampler_reduction->reductionMode];
|
|
enable_sampler_reduction = true;
|
|
break;
|
|
}
|
|
#endif
|
|
default:
|
|
anv_debug_ignored_stype(ext->sType);
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (pdevice->has_bindless_samplers) {
|
|
/* If we have bindless, allocate enough samplers. We allocate 32 bytes
|
|
* for each sampler instead of 16 bytes because we want all bindless
|
|
* samplers to be 32-byte aligned so we don't have to use indirect
|
|
* sampler messages on them.
|
|
*/
|
|
sampler->bindless_state =
|
|
anv_state_pool_alloc(&device->dynamic_state_pool,
|
|
sampler->n_planes * 32, 32);
|
|
}
|
|
|
|
for (unsigned p = 0; p < sampler->n_planes; p++) {
|
|
const bool plane_has_chroma =
|
|
sampler->conversion && sampler->conversion->format->planes[p].has_chroma;
|
|
const VkFilter min_filter =
|
|
plane_has_chroma ? sampler->conversion->chroma_filter : pCreateInfo->minFilter;
|
|
const VkFilter mag_filter =
|
|
plane_has_chroma ? sampler->conversion->chroma_filter : pCreateInfo->magFilter;
|
|
const bool enable_min_filter_addr_rounding = min_filter != VK_FILTER_NEAREST;
|
|
const bool enable_mag_filter_addr_rounding = mag_filter != VK_FILTER_NEAREST;
|
|
/* From Broadwell PRM, SAMPLER_STATE:
|
|
* "Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces."
|
|
*/
|
|
const uint32_t mip_filter_mode =
|
|
(sampler->conversion &&
|
|
isl_format_is_yuv(sampler->conversion->format->planes[0].isl_format)) ?
|
|
MIPFILTER_NONE : vk_to_gen_mipmap_mode[pCreateInfo->mipmapMode];
|
|
|
|
struct GENX(SAMPLER_STATE) sampler_state = {
|
|
.SamplerDisable = false,
|
|
.TextureBorderColorMode = DX10OGL,
|
|
|
|
#if GEN_GEN >= 8
|
|
.LODPreClampMode = CLAMP_MODE_OGL,
|
|
#else
|
|
.LODPreClampEnable = CLAMP_ENABLE_OGL,
|
|
#endif
|
|
|
|
#if GEN_GEN == 8
|
|
.BaseMipLevel = 0.0,
|
|
#endif
|
|
.MipModeFilter = mip_filter_mode,
|
|
.MagModeFilter = vk_to_gen_tex_filter(mag_filter, pCreateInfo->anisotropyEnable),
|
|
.MinModeFilter = vk_to_gen_tex_filter(min_filter, pCreateInfo->anisotropyEnable),
|
|
.TextureLODBias = anv_clamp_f(pCreateInfo->mipLodBias, -16, 15.996),
|
|
.AnisotropicAlgorithm = EWAApproximation,
|
|
.MinLOD = anv_clamp_f(pCreateInfo->minLod, 0, 14),
|
|
.MaxLOD = anv_clamp_f(pCreateInfo->maxLod, 0, 14),
|
|
.ChromaKeyEnable = 0,
|
|
.ChromaKeyIndex = 0,
|
|
.ChromaKeyMode = 0,
|
|
.ShadowFunction = vk_to_gen_shadow_compare_op[pCreateInfo->compareOp],
|
|
.CubeSurfaceControlMode = OVERRIDE,
|
|
|
|
.BorderColorPointer = border_color_offset,
|
|
|
|
#if GEN_GEN >= 8
|
|
.LODClampMagnificationMode = MIPNONE,
|
|
#endif
|
|
|
|
.MaximumAnisotropy = vk_to_gen_max_anisotropy(pCreateInfo->maxAnisotropy),
|
|
.RAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
|
|
.RAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
|
|
.VAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
|
|
.VAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
|
|
.UAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
|
|
.UAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
|
|
.TrilinearFilterQuality = 0,
|
|
.NonnormalizedCoordinateEnable = pCreateInfo->unnormalizedCoordinates,
|
|
.TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeU],
|
|
.TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeV],
|
|
.TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeW],
|
|
|
|
#if GEN_GEN >= 9
|
|
.ReductionType = sampler_reduction_mode,
|
|
.ReductionTypeEnable = enable_sampler_reduction,
|
|
#endif
|
|
};
|
|
|
|
GENX(SAMPLER_STATE_pack)(NULL, sampler->state[p], &sampler_state);
|
|
|
|
if (sampler->bindless_state.map) {
|
|
memcpy(sampler->bindless_state.map + p * 32,
|
|
sampler->state[p], GENX(SAMPLER_STATE_length) * 4);
|
|
}
|
|
}
|
|
|
|
*pSampler = anv_sampler_to_handle(sampler);
|
|
|
|
return VK_SUCCESS;
|
|
}
|