Files
third_party_mesa3d/src/intel
Kenneth Graunke f274687413 genxml: Fix PIPELINE_SELECT on G45/Ironlake.
Original 965 sets bits 28:27 to 0, while G45 and later set it to 1.

Note that the G45 docs are incorrect in this regard - see the DevCTG+
note in the Ironlake PRMs.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2017-11-16 11:01:50 -08:00
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