7550f59178
Signed-off-by: Karol Herbst <git@karolherbst.de> Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24905>
70 lines
2.4 KiB
C
70 lines
2.4 KiB
C
/*
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* Copyright (C) 2020 Icecream95 <ixn@disroot.org>
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "compiler/nir/nir_builder.h"
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#include "pan_ir.h"
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/* OpenCL uses 64-bit types for some intrinsic functions, including
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* global_invocation_id(). This could be worked around during conversion to
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* MIR, except that global_invocation_id is a vec3, and the 128-bit registers
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* on Midgard can only hold a 64-bit vec2.
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* Rather than attempting to add hacky 64-bit vec3 support, convert these
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* intrinsics to 32-bit and add a cast back to 64-bit, and rely on NIR not
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* vectorizing back to vec3.
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*/
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static bool
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nir_lower_64bit_intrin_instr(nir_builder *b, nir_intrinsic_instr *intr,
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void *data)
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{
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switch (intr->intrinsic) {
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case nir_intrinsic_load_global_invocation_id:
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case nir_intrinsic_load_global_invocation_id_zero_base:
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break;
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default:
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return false;
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}
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if (intr->def.bit_size != 64)
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return false;
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b->cursor = nir_after_instr(&intr->instr);
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intr->def.bit_size = 32;
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nir_def *conv = nir_u2u64(b, &intr->def);
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nir_def_rewrite_uses_after(&intr->def, conv, conv->parent_instr);
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return true;
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}
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bool
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pan_nir_lower_64bit_intrin(nir_shader *shader)
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{
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return nir_shader_intrinsics_pass(
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shader, nir_lower_64bit_intrin_instr,
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nir_metadata_block_index | nir_metadata_dominance, NULL);
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}
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