5438b19104
This mirror the ring buffer mode we have in Anv. Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26797>
86 lines
3.7 KiB
C
86 lines
3.7 KiB
C
/*
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* Copyright © 2019 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/* GenX-specific function declarations.
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*
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* Don't include this directly, it will be included by iris_context.h.
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*
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* NOTE: This header can be included multiple times, from the same file.
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*/
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/* iris_state.c */
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void genX(init_state)(struct iris_context *ice);
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void genX(init_screen_state)(struct iris_screen *screen);
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void genX(emit_hashing_mode)(struct iris_context *ice,
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struct iris_batch *batch,
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unsigned width, unsigned height,
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unsigned scale);
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void genX(emit_urb_config)(struct iris_batch *batch,
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bool has_tess_eval,
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bool has_geometry);
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void genX(emit_depth_state_workarounds)(struct iris_context *ice,
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struct iris_batch *batch,
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const struct isl_surf *surf);
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void genX(update_pma_fix)(struct iris_context *ice,
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struct iris_batch *batch,
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bool enable);
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void genX(invalidate_aux_map_state)(struct iris_batch *batch);
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void genX(emit_breakpoint)(struct iris_batch *batch, bool emit_before_draw);
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void genX(emit_3dprimitive_was)(struct iris_batch *batch,
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const struct pipe_draw_indirect_info *indirect,
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uint32_t primitive_topology,
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uint32_t vertex_count);
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void genX(urb_workaround)(struct iris_batch *batch,
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const struct intel_urb_config *urb_cfg);
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static inline void
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genX(maybe_emit_breakpoint)(struct iris_batch *batch,
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bool emit_before_draw)
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{
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if (INTEL_DEBUG(DEBUG_DRAW_BKP))
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genX(emit_breakpoint)(batch, emit_before_draw);
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}
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/* iris_blorp.c */
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void genX(init_blorp)(struct iris_context *ice);
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/* iris_query.c */
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void genX(init_query)(struct iris_context *ice);
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void genX(math_add32_gpr0)(struct iris_context *ice,
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struct iris_batch *batch,
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uint32_t x);
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void genX(math_div32_gpr0)(struct iris_context *ice,
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struct iris_batch *batch,
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uint32_t D);
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/* iris_indirect_gen.c */
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void genX(init_screen_gen_state)(struct iris_screen *screen);
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struct iris_gen_indirect_params *
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genX(emit_indirect_generate)(struct iris_batch *batch,
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const struct pipe_draw_info *draw,
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const struct pipe_draw_indirect_info *indirect,
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const struct pipe_draw_start_count_bias *sc,
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struct iris_address *out_params_addr);
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