49d402e275
Conflicts: src/mesa/drivers/dri/intel/intel_fbo.c src/mesa/drivers/dri/intel/intel_mipmap_tree.c src/mesa/drivers/dri/intel/intel_mipmap_tree.h src/mesa/drivers/dri/intel/intel_tex_copy.c src/mesa/drivers/dri/intel/intel_tex_image.c
677 lines
19 KiB
C
677 lines
19 KiB
C
/**************************************************************************
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*
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* Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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* OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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* IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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* ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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#include "main/mtypes.h"
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#include "main/context.h"
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#include "main/enums.h"
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#include "main/texformat.h"
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#include "main/colormac.h"
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#include "intel_blit.h"
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#include "intel_buffers.h"
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#include "intel_context.h"
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#include "intel_fbo.h"
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#include "intel_reg.h"
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#include "intel_regions.h"
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#include "intel_batchbuffer.h"
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#include "intel_chipset.h"
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#define FILE_DEBUG_FLAG DEBUG_BLIT
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/**
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* Copy the back color buffer to the front color buffer.
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* Used for SwapBuffers().
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*/
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void
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intelCopyBuffer(const __DRIdrawablePrivate * dPriv,
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const drm_clip_rect_t * rect)
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{
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struct intel_context *intel;
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const intelScreenPrivate *intelScreen;
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DBG("%s\n", __FUNCTION__);
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assert(dPriv);
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intel = intelScreenContext(dPriv->driScreenPriv->private);
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if (!intel)
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return;
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intelScreen = intel->intelScreen;
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/* The LOCK_HARDWARE is required for the cliprects. Buffer offsets
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* should work regardless.
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*/
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LOCK_HARDWARE(intel);
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if (dPriv && dPriv->numClipRects) {
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struct intel_framebuffer *intel_fb = dPriv->driverPrivate;
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struct intel_region *src, *dst;
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int nbox = dPriv->numClipRects;
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drm_clip_rect_t *pbox = dPriv->pClipRects;
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int cpp;
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int src_pitch, dst_pitch;
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unsigned short src_x, src_y;
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int BR13, CMD;
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int i;
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dri_bo *aper_array[3];
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src = intel_get_rb_region(&intel_fb->Base, BUFFER_BACK_LEFT);
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dst = intel_get_rb_region(&intel_fb->Base, BUFFER_FRONT_LEFT);
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src_pitch = src->pitch * src->cpp;
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dst_pitch = dst->pitch * dst->cpp;
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cpp = src->cpp;
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ASSERT(intel_fb);
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ASSERT(intel_fb->Base.Name == 0); /* Not a user-created FBO */
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ASSERT(src);
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ASSERT(dst);
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ASSERT(src->cpp == dst->cpp);
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if (cpp == 2) {
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BR13 = (0xCC << 16) | BR13_565;
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CMD = XY_SRC_COPY_BLT_CMD;
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}
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else {
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BR13 = (0xCC << 16) | BR13_8888;
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CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
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}
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assert(src->tiling != I915_TILING_Y);
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assert(dst->tiling != I915_TILING_Y);
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#ifndef I915
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if (src->tiling != I915_TILING_NONE) {
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CMD |= XY_SRC_TILED;
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src_pitch /= 4;
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}
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if (dst->tiling != I915_TILING_NONE) {
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CMD |= XY_DST_TILED;
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dst_pitch /= 4;
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}
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#endif
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/* do space/cliprects check before going any further */
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intel_batchbuffer_require_space(intel->batch, 8 * 4,
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REFERENCES_CLIPRECTS);
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again:
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aper_array[0] = intel->batch->buf;
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aper_array[1] = dst->buffer;
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aper_array[2] = src->buffer;
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if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
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intel_batchbuffer_flush(intel->batch);
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goto again;
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}
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for (i = 0; i < nbox; i++, pbox++) {
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drm_clip_rect_t box = *pbox;
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if (rect) {
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if (!intel_intersect_cliprects(&box, &box, rect))
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continue;
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}
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if (box.x1 >= box.x2 ||
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box.y1 >= box.y2)
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continue;
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assert(box.x1 < box.x2);
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assert(box.y1 < box.y2);
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src_x = box.x1 - dPriv->x + dPriv->backX;
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src_y = box.y1 - dPriv->y + dPriv->backY;
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BEGIN_BATCH(8, REFERENCES_CLIPRECTS);
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OUT_BATCH(CMD);
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OUT_BATCH(BR13 | dst_pitch);
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OUT_BATCH((box.y1 << 16) | box.x1);
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OUT_BATCH((box.y2 << 16) | box.x2);
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OUT_RELOC(dst->buffer,
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I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
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0);
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OUT_BATCH((src_y << 16) | src_x);
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OUT_BATCH(src_pitch);
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OUT_RELOC(src->buffer,
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I915_GEM_DOMAIN_RENDER, 0,
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0);
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ADVANCE_BATCH();
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}
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/* Flush the rendering and the batch so that the results all land on the
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* screen in a timely fashion.
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*/
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intel_batchbuffer_emit_mi_flush(intel->batch);
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intel_batchbuffer_flush(intel->batch);
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}
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UNLOCK_HARDWARE(intel);
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}
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static GLuint translate_raster_op(GLenum logicop)
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{
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switch(logicop) {
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case GL_CLEAR: return 0x00;
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case GL_AND: return 0x88;
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case GL_AND_REVERSE: return 0x44;
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case GL_COPY: return 0xCC;
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case GL_AND_INVERTED: return 0x22;
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case GL_NOOP: return 0xAA;
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case GL_XOR: return 0x66;
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case GL_OR: return 0xEE;
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case GL_NOR: return 0x11;
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case GL_EQUIV: return 0x99;
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case GL_INVERT: return 0x55;
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case GL_OR_REVERSE: return 0xDD;
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case GL_COPY_INVERTED: return 0x33;
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case GL_OR_INVERTED: return 0xBB;
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case GL_NAND: return 0x77;
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case GL_SET: return 0xFF;
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default: return 0;
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}
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}
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/* Copy BitBlt
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*/
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GLboolean
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intelEmitCopyBlit(struct intel_context *intel,
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GLuint cpp,
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GLshort src_pitch,
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dri_bo *src_buffer,
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GLuint src_offset,
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uint32_t src_tiling,
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GLshort dst_pitch,
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dri_bo *dst_buffer,
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GLuint dst_offset,
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uint32_t dst_tiling,
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GLshort src_x, GLshort src_y,
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GLshort dst_x, GLshort dst_y,
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GLshort w, GLshort h,
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GLenum logic_op)
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{
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GLuint CMD, BR13, pass = 0;
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int dst_y2 = dst_y + h;
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int dst_x2 = dst_x + w;
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dri_bo *aper_array[3];
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BATCH_LOCALS;
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if (dst_tiling != I915_TILING_NONE) {
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if (dst_offset & 4095)
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return GL_FALSE;
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if (dst_tiling == I915_TILING_Y)
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return GL_FALSE;
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}
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if (src_tiling != I915_TILING_NONE) {
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if (src_offset & 4095)
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return GL_FALSE;
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if (src_tiling == I915_TILING_Y)
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return GL_FALSE;
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}
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/* do space/cliprects check before going any further */
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do {
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aper_array[0] = intel->batch->buf;
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aper_array[1] = dst_buffer;
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aper_array[2] = src_buffer;
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if (dri_bufmgr_check_aperture_space(aper_array, 3) != 0) {
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intel_batchbuffer_flush(intel->batch);
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pass++;
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} else
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break;
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} while (pass < 2);
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if (pass >= 2) {
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LOCK_HARDWARE(intel);
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dri_bo_map(dst_buffer, GL_TRUE);
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dri_bo_map(src_buffer, GL_FALSE);
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_mesa_copy_rect((GLubyte *)dst_buffer->virtual + dst_offset,
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cpp,
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dst_pitch,
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dst_x, dst_y,
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w, h,
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(GLubyte *)src_buffer->virtual + src_offset,
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src_pitch,
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src_x, src_y);
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dri_bo_unmap(src_buffer);
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dri_bo_unmap(dst_buffer);
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UNLOCK_HARDWARE(intel);
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return GL_TRUE;
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}
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intel_batchbuffer_require_space(intel->batch, 8 * 4, NO_LOOP_CLIPRECTS);
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DBG("%s src:buf(%p)/%d+%d %d,%d dst:buf(%p)/%d+%d %d,%d sz:%dx%d\n",
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__FUNCTION__,
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src_buffer, src_pitch, src_offset, src_x, src_y,
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dst_buffer, dst_pitch, dst_offset, dst_x, dst_y, w, h);
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src_pitch *= cpp;
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dst_pitch *= cpp;
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BR13 = translate_raster_op(logic_op) << 16;
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switch (cpp) {
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case 1:
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CMD = XY_SRC_COPY_BLT_CMD;
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break;
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case 2:
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BR13 |= BR13_565;
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CMD = XY_SRC_COPY_BLT_CMD;
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break;
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case 4:
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BR13 |= BR13_8888;
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CMD = XY_SRC_COPY_BLT_CMD | XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
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break;
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default:
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return GL_FALSE;
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}
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#ifndef I915
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if (dst_tiling != I915_TILING_NONE) {
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CMD |= XY_DST_TILED;
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dst_pitch /= 4;
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}
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if (src_tiling != I915_TILING_NONE) {
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CMD |= XY_SRC_TILED;
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src_pitch /= 4;
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}
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#endif
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if (dst_y2 <= dst_y || dst_x2 <= dst_x) {
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return GL_TRUE;
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}
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assert(dst_x < dst_x2);
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assert(dst_y < dst_y2);
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BEGIN_BATCH(8, NO_LOOP_CLIPRECTS);
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OUT_BATCH(CMD);
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OUT_BATCH(BR13 | (uint16_t)dst_pitch);
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OUT_BATCH((dst_y << 16) | dst_x);
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OUT_BATCH((dst_y2 << 16) | dst_x2);
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OUT_RELOC(dst_buffer,
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I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
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dst_offset);
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OUT_BATCH((src_y << 16) | src_x);
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OUT_BATCH((uint16_t)src_pitch);
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OUT_RELOC(src_buffer,
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I915_GEM_DOMAIN_RENDER, 0,
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src_offset);
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ADVANCE_BATCH();
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intel_batchbuffer_emit_mi_flush(intel->batch);
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return GL_TRUE;
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}
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/**
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* Use blitting to clear the renderbuffers named by 'flags'.
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* Note: we can't use the ctx->DrawBuffer->_ColorDrawBufferIndexes field
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* since that might include software renderbuffers or renderbuffers
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* which we're clearing with triangles.
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* \param mask bitmask of BUFFER_BIT_* values indicating buffers to clear
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*/
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void
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intelClearWithBlit(GLcontext *ctx, GLbitfield mask)
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{
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struct intel_context *intel = intel_context(ctx);
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struct gl_framebuffer *fb = ctx->DrawBuffer;
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GLuint clear_depth;
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GLbitfield skipBuffers = 0;
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unsigned int num_cliprects;
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struct drm_clip_rect *cliprects;
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int x_off, y_off;
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BATCH_LOCALS;
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/*
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* Compute values for clearing the buffers.
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*/
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clear_depth = 0;
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if (mask & BUFFER_BIT_DEPTH) {
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clear_depth = (GLuint) (fb->_DepthMax * ctx->Depth.Clear);
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}
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if (mask & BUFFER_BIT_STENCIL) {
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clear_depth |= (ctx->Stencil.Clear & 0xff) << 24;
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}
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/* If clearing both depth and stencil, skip BUFFER_BIT_STENCIL in
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* the loop below.
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*/
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if ((mask & BUFFER_BIT_DEPTH) && (mask & BUFFER_BIT_STENCIL)) {
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skipBuffers = BUFFER_BIT_STENCIL;
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}
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LOCK_HARDWARE(intel);
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intel_get_cliprects(intel, &cliprects, &num_cliprects, &x_off, &y_off);
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if (num_cliprects) {
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GLint cx, cy, cw, ch;
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drm_clip_rect_t clear;
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int i;
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/* Get clear bounds after locking */
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cx = fb->_Xmin;
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cy = fb->_Ymin;
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cw = fb->_Xmax - cx;
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ch = fb->_Ymax - cy;
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if (fb->Name == 0) {
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/* clearing a window */
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/* flip top to bottom */
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clear.x1 = cx + x_off;
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clear.y1 = intel->driDrawable->y + intel->driDrawable->h - cy - ch;
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clear.x2 = clear.x1 + cw;
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clear.y2 = clear.y1 + ch;
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}
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else {
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/* clearing FBO */
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assert(num_cliprects == 1);
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assert(cliprects == &intel->fboRect);
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clear.x1 = cx;
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clear.y1 = cy;
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clear.x2 = clear.x1 + cw;
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clear.y2 = clear.y1 + ch;
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/* no change to mask */
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}
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for (i = 0; i < num_cliprects; i++) {
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const drm_clip_rect_t *box = &cliprects[i];
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drm_clip_rect_t b;
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GLuint buf;
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GLuint clearMask = mask; /* use copy, since we modify it below */
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GLboolean all = (cw == fb->Width && ch == fb->Height);
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if (!all) {
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intel_intersect_cliprects(&b, &clear, box);
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}
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else {
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b = *box;
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}
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if (b.x1 >= b.x2 || b.y1 >= b.y2)
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continue;
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if (0)
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_mesa_printf("clear %d,%d..%d,%d, mask %x\n",
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b.x1, b.y1, b.x2, b.y2, mask);
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/* Loop over all renderbuffers */
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for (buf = 0; buf < BUFFER_COUNT && clearMask; buf++) {
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const GLbitfield bufBit = 1 << buf;
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if ((clearMask & bufBit) && !(bufBit & skipBuffers)) {
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/* OK, clear this renderbuffer */
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struct intel_renderbuffer *irb = intel_get_renderbuffer(fb, buf);
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dri_bo *write_buffer =
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intel_region_buffer(intel, irb->region,
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all ? INTEL_WRITE_FULL :
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INTEL_WRITE_PART);
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int x1 = b.x1 + irb->region->draw_x;
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int y1 = b.y1 + irb->region->draw_y;
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int x2 = b.x2 + irb->region->draw_x;
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int y2 = b.y2 + irb->region->draw_y;
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GLuint clearVal;
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GLint pitch, cpp;
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GLuint BR13, CMD;
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pitch = irb->region->pitch;
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cpp = irb->region->cpp;
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DBG("%s dst:buf(%p)/%d %d,%d sz:%dx%d\n",
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__FUNCTION__,
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irb->region->buffer, (pitch * cpp),
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x1, y1, x2 - x1, y2 - y1);
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BR13 = 0xf0 << 16;
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CMD = XY_COLOR_BLT_CMD;
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/* Setup the blit command */
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if (cpp == 4) {
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BR13 |= BR13_8888;
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if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
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if (clearMask & BUFFER_BIT_DEPTH)
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CMD |= XY_BLT_WRITE_RGB;
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if (clearMask & BUFFER_BIT_STENCIL)
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CMD |= XY_BLT_WRITE_ALPHA;
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}
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else {
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/* clearing RGBA */
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CMD |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
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}
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}
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else {
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ASSERT(cpp == 2);
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BR13 |= BR13_565;
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}
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assert(irb->region->tiling != I915_TILING_Y);
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#ifndef I915
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if (irb->region->tiling != I915_TILING_NONE) {
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CMD |= XY_DST_TILED;
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pitch /= 4;
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}
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#endif
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BR13 |= (pitch * cpp);
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if (buf == BUFFER_DEPTH || buf == BUFFER_STENCIL) {
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clearVal = clear_depth;
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}
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else {
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uint8_t clear[4];
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GLclampf *color = ctx->Color.ClearColor;
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CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]);
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CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]);
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CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]);
|
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CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]);
|
|
|
|
switch (irb->texformat->MesaFormat) {
|
|
case MESA_FORMAT_ARGB8888:
|
|
clearVal = intel->ClearColor8888;
|
|
break;
|
|
case MESA_FORMAT_RGB565:
|
|
clearVal = intel->ClearColor565;
|
|
break;
|
|
case MESA_FORMAT_ARGB4444:
|
|
clearVal = PACK_COLOR_4444(clear[3], clear[0],
|
|
clear[1], clear[2]);
|
|
break;
|
|
case MESA_FORMAT_ARGB1555:
|
|
clearVal = PACK_COLOR_1555(clear[3], clear[0],
|
|
clear[1], clear[2]);
|
|
break;
|
|
default:
|
|
_mesa_problem(ctx, "Unexpected renderbuffer format: %d\n",
|
|
irb->texformat->MesaFormat);
|
|
clearVal = 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
_mesa_debug(ctx, "hardware blit clear buf %d rb id %d\n",
|
|
buf, irb->Base.Name);
|
|
*/
|
|
|
|
assert(x1 < x2);
|
|
assert(y1 < y2);
|
|
|
|
BEGIN_BATCH(6, REFERENCES_CLIPRECTS);
|
|
OUT_BATCH(CMD);
|
|
OUT_BATCH(BR13);
|
|
OUT_BATCH((y1 << 16) | x1);
|
|
OUT_BATCH((y2 << 16) | x2);
|
|
OUT_RELOC(write_buffer,
|
|
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
|
|
0);
|
|
OUT_BATCH(clearVal);
|
|
ADVANCE_BATCH();
|
|
clearMask &= ~bufBit; /* turn off bit, for faster loop exit */
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
UNLOCK_HARDWARE(intel);
|
|
}
|
|
|
|
GLboolean
|
|
intelEmitImmediateColorExpandBlit(struct intel_context *intel,
|
|
GLuint cpp,
|
|
GLubyte *src_bits, GLuint src_size,
|
|
GLuint fg_color,
|
|
GLshort dst_pitch,
|
|
dri_bo *dst_buffer,
|
|
GLuint dst_offset,
|
|
uint32_t dst_tiling,
|
|
GLshort x, GLshort y,
|
|
GLshort w, GLshort h,
|
|
GLenum logic_op)
|
|
{
|
|
int dwords = ALIGN(src_size, 8) / 4;
|
|
uint32_t opcode, br13, blit_cmd;
|
|
|
|
if (dst_tiling != I915_TILING_NONE) {
|
|
if (dst_offset & 4095)
|
|
return GL_FALSE;
|
|
if (dst_tiling == I915_TILING_Y)
|
|
return GL_FALSE;
|
|
}
|
|
|
|
assert( logic_op - GL_CLEAR >= 0 );
|
|
assert( logic_op - GL_CLEAR < 0x10 );
|
|
assert(dst_pitch > 0);
|
|
|
|
if (w < 0 || h < 0)
|
|
return GL_TRUE;
|
|
|
|
dst_pitch *= cpp;
|
|
|
|
DBG("%s dst:buf(%p)/%d+%d %d,%d sz:%dx%d, %d bytes %d dwords\n",
|
|
__FUNCTION__,
|
|
dst_buffer, dst_pitch, dst_offset, x, y, w, h, src_size, dwords);
|
|
|
|
intel_batchbuffer_require_space( intel->batch,
|
|
(8 * 4) +
|
|
(3 * 4) +
|
|
dwords * 4,
|
|
REFERENCES_CLIPRECTS );
|
|
|
|
opcode = XY_SETUP_BLT_CMD;
|
|
if (cpp == 4)
|
|
opcode |= XY_BLT_WRITE_ALPHA | XY_BLT_WRITE_RGB;
|
|
#ifndef I915
|
|
if (dst_tiling != I915_TILING_NONE) {
|
|
opcode |= XY_DST_TILED;
|
|
dst_pitch /= 4;
|
|
}
|
|
#endif
|
|
|
|
br13 = dst_pitch | (translate_raster_op(logic_op) << 16) | (1 << 29);
|
|
if (cpp == 2)
|
|
br13 |= BR13_565;
|
|
else
|
|
br13 |= BR13_8888;
|
|
|
|
blit_cmd = XY_TEXT_IMMEDIATE_BLIT_CMD | XY_TEXT_BYTE_PACKED; /* packing? */
|
|
if (dst_tiling != I915_TILING_NONE)
|
|
blit_cmd |= XY_DST_TILED;
|
|
|
|
BEGIN_BATCH(8 + 3, REFERENCES_CLIPRECTS);
|
|
OUT_BATCH(opcode);
|
|
OUT_BATCH(br13);
|
|
OUT_BATCH((0 << 16) | 0); /* clip x1, y1 */
|
|
OUT_BATCH((100 << 16) | 100); /* clip x2, y2 */
|
|
OUT_RELOC(dst_buffer,
|
|
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,
|
|
dst_offset);
|
|
OUT_BATCH(0); /* bg */
|
|
OUT_BATCH(fg_color); /* fg */
|
|
OUT_BATCH(0); /* pattern base addr */
|
|
|
|
OUT_BATCH(blit_cmd | ((3 - 2) + dwords));
|
|
OUT_BATCH((y << 16) | x);
|
|
OUT_BATCH(((y + h) << 16) | (x + w));
|
|
ADVANCE_BATCH();
|
|
|
|
intel_batchbuffer_data( intel->batch,
|
|
src_bits,
|
|
dwords * 4,
|
|
REFERENCES_CLIPRECTS );
|
|
|
|
intel_batchbuffer_emit_mi_flush(intel->batch);
|
|
|
|
return GL_TRUE;
|
|
}
|
|
|
|
/* We don't have a memmove-type blit like some other hardware, so we'll do a
|
|
* rectangular blit covering a large space, then emit 1-scanline blit at the
|
|
* end to cover the last if we need.
|
|
*/
|
|
void
|
|
intel_emit_linear_blit(struct intel_context *intel,
|
|
drm_intel_bo *dst_bo,
|
|
unsigned int dst_offset,
|
|
drm_intel_bo *src_bo,
|
|
unsigned int src_offset,
|
|
unsigned int size)
|
|
{
|
|
GLuint pitch, height;
|
|
|
|
/* The pitch is a signed value. */
|
|
pitch = MIN2(size, (1 << 15) - 1);
|
|
height = size / pitch;
|
|
intelEmitCopyBlit(intel, 1,
|
|
pitch, src_bo, src_offset, I915_TILING_NONE,
|
|
pitch, dst_bo, dst_offset, I915_TILING_NONE,
|
|
0, 0, /* src x/y */
|
|
0, 0, /* dst x/y */
|
|
pitch, height, /* w, h */
|
|
GL_COPY);
|
|
|
|
src_offset += pitch * height;
|
|
dst_offset += pitch * height;
|
|
size -= pitch * height;
|
|
assert (size < (1 << 15));
|
|
if (size != 0) {
|
|
intelEmitCopyBlit(intel, 1,
|
|
size, src_bo, src_offset, I915_TILING_NONE,
|
|
size, dst_bo, dst_offset, I915_TILING_NONE,
|
|
0, 0, /* src x/y */
|
|
0, 0, /* dst x/y */
|
|
size, 1, /* w, h */
|
|
GL_COPY);
|
|
}
|
|
}
|