Iago Toral Quiroga 4917d38321 intel/compiler: fix first_component for 64-bit types on vertex inputs ...

Divide it by two as we do for other stages. This is because the
component layout qualifier is always in 32-bit units.

Fixes issues in a new CTS test (still WIP):
KHR-GL45.enhanced_layouts.varying_double_components

Reviewed-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>

2018-02-14 12:00:14 +01:00

..

.gitignore

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brw_cfg.cpp

intel/cfg: Represent divergent control flow paths caused by non-uniform loop execution.

2017-12-07 18:27:05 -08:00

brw_cfg.h

intel/compiler: consistently use ifndef guards over pragma once

2017-03-22 16:55:22 +00:00

brw_clip_line.c

i965: Move clip program compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_clip_point.c

i965: Move clip program compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_clip_tri.c

i965: Move clip program compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_clip_unfilled.c

i965: Move clip program compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_clip_util.c

i965: Move clip program compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_clip.h

i965: Move clip program compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_compile_clip.c

i965: Rewrite disassembly annotation code

2017-11-17 12:14:38 -08:00

brw_compile_sf.c

i965: Move SF compilation to the compiler

2017-05-26 07:58:01 -07:00

brw_compiler.c

nir: add vs_inputs_dual_locations compiler option

2018-01-30 09:08:47 +11:00

brw_compiler.h

i965: Drop render_target_start from binding table struct.

2018-01-22 10:03:52 -08:00

brw_dead_control_flow.cpp

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brw_dead_control_flow.h

intel/compiler: consistently use ifndef guards over pragma once

2017-03-22 16:55:22 +00:00

brw_disasm_info.c

i965: Move mistakenly placed line

2018-02-05 09:50:56 -08:00

brw_disasm_info.h

i965: Stop including brw_cfg.h in brw_disasm_info.h

2017-11-17 21:51:16 -08:00

brw_disasm.c

intel/compiler: fix 64bit value prints on 32bit

2018-02-10 17:59:02 +02:00

brw_eu_compact.c

i965: Rename intel_asm_annotation -> brw_disasm_info

2017-11-17 12:14:38 -08:00

brw_eu_defines.h

i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.

2017-12-30 20:30:34 -08:00

brw_eu_emit.c

i965/fs: Add/use functions to convert to 3src_align1 vstride/hstride

2018-01-11 10:11:59 -08:00

brw_eu_util.c

intel/compiler: whitespace cleanups

2017-03-13 11:16:35 +00:00

brw_eu_validate.c

i965: Rewrite disassembly annotation code

2017-11-17 12:14:38 -08:00

brw_eu.c

intel/eu: Make automatic exec sizes a configurable option

2017-11-07 10:37:52 -08:00

brw_eu.h

i965/fs: Add byte scattered read message and fs support

2017-12-06 08:57:18 +01:00

brw_fs_bank_conflicts.cpp

intel/fs/bank_conflicts: Use posix_memalign() instead of overaligned new to obtain vector storage.

2017-12-21 15:19:59 -08:00

brw_fs_builder.h

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brw_fs_cmod_propagation.cpp

intel/compiler: Don't propagate cmod into integer multiplies

2017-10-05 11:54:49 -07:00

brw_fs_combine_constants.cpp

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brw_fs_copy_propagation.cpp

intel/fs: Optimize and simplify the copy propagation dataflow logic.

2018-01-17 11:56:08 -08:00

brw_fs_cse.cpp

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brw_fs_dead_code_eliminate.cpp

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brw_fs_generator.cpp

i965: Drop render_target_start from binding table struct.

2018-01-22 10:03:52 -08:00

brw_fs_live_variables.cpp

intel/fs: Restrict live intervals to the subset possibly reachable from any definition.

2017-12-07 18:27:04 -08:00

brw_fs_live_variables.h

intel/fs: Restrict live intervals to the subset possibly reachable from any definition.

2017-12-07 18:27:04 -08:00

brw_fs_lower_conversions.cpp

i965/fs: rename lower_d2x to lower_conversions

2017-04-14 14:56:07 -07:00

brw_fs_lower_pack.cpp

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brw_fs_nir.cpp

intel/compiler: fix first_component for 64-bit types on vertex inputs

2018-02-14 12:00:14 +01:00

brw_fs_reg_allocate.cpp

intel/fs: Take into account amount of data read in spilling cost heuristic.

2017-04-24 11:01:40 -07:00

brw_fs_register_coalesce.cpp

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brw_fs_saturate_propagation.cpp

i965/fs: Handle negating immediates on MADs when propagating saturates

2017-11-21 10:13:07 -08:00

brw_fs_sel_peephole.cpp

i965/fs: Do not move MOVs writing the flag outside of control flow

2017-07-20 16:56:49 -07:00

brw_fs_surface_builder.cpp

i965/fs: Add byte scattered read message and fs support

2017-12-06 08:57:18 +01:00

brw_fs_surface_builder.h

i965/fs: Add byte scattered read message and fs support

2017-12-06 08:57:18 +01:00

brw_fs_validate.cpp

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brw_fs_visitor.cpp

intel/fs: Initialize fs_visitor::grf_used on construction.

2017-12-21 15:20:17 -08:00

brw_fs.cpp

i965/gen10: Re-enable push constants.

2018-01-26 10:07:44 -08:00

brw_fs.h

intel/fs/bank_conflicts: Don't touch Gen7 MRF hack registers.

2017-12-12 12:05:45 -08:00

brw_inst.h

i965: Add align1 ternary instruction-word support

2017-10-20 15:00:17 -07:00

brw_interpolation_map.c

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brw_ir_allocator.h

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brw_ir_fs.h

i965/fs: Remove BRW_REGISTER_TYPE_HF assert at get_exec_type

2017-12-06 08:57:18 +01:00

brw_ir_vec4.h

i965/vec4: don't do horizontal stride on some register file types

2017-04-14 14:56:09 -07:00

brw_nir_analyze_boolean_resolves.c

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brw_nir_analyze_ubo_ranges.c

intel/compiler: fix 64bit value prints on 32bit

2018-02-10 17:59:02 +02:00

brw_nir_attribute_workarounds.c

i965: Drop support for the legacy SNORM -> Float equation.

2018-01-02 16:51:42 -08:00

brw_nir_lower_cs_intrinsics.c

intel/cs: Push subgroup ID instead of base thread ID

2017-11-07 10:37:52 -08:00

brw_nir_opt_peephole_ffma.c

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brw_nir_tcs_workarounds.c

nir: Get rid of nir_shader::stage

2017-10-20 12:49:17 -07:00

brw_nir_trig_workarounds.py

intel: use a flag instead of setting PYTHONPATH

2017-09-27 09:07:28 -07:00

brw_nir.c

i965: remove unused brw_nir_lower_cs_shared()

2018-02-07 08:38:01 +11:00

brw_nir.h

i965: remove unused brw_nir_lower_cs_shared()

2018-02-07 08:38:01 +11:00

brw_packed_float.c

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brw_predicated_break.cpp

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brw_reg_type.c

i965: Add align1 ternary instruction support to conversion functions

2017-10-20 15:00:17 -07:00

brw_reg_type.h

i965: Add align1 ternary instruction support to conversion functions

2017-10-20 15:00:17 -07:00

brw_reg.h

i965: Add support for control register

2017-12-06 08:57:18 +01:00

brw_schedule_instructions.cpp

intel/fs: Teach instruction scheduler about GRF bank conflict cycles.

2017-12-07 15:56:49 -08:00

brw_shader.cpp

i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.

2017-12-30 20:30:34 -08:00

brw_shader.h

i965: Use nir_lower_atomics_to_ssbos and delete ABO compiler code.

2017-11-15 09:37:32 -08:00

brw_vec4_builder.h

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brw_vec4_cmod_propagation.cpp

intel/compiler: Don't propagate cmod into integer multiplies

2017-10-05 11:54:49 -07:00

brw_vec4_copy_propagation.cpp

i965: Support copy propagating of untyped atomic surface indexes.

2017-09-26 15:35:14 -07:00

brw_vec4_cse.cpp

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brw_vec4_dead_code_eliminate.cpp

i965/vec4/dce: improve track of partial flag register writes

2017-04-14 14:56:09 -07:00

brw_vec4_generator.cpp

i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.

2017-12-30 20:30:34 -08:00

brw_vec4_gs_nir.cpp

i965/vec4: Delete the system value infastructure

2017-05-09 15:08:07 -07:00

brw_vec4_gs_visitor.cpp

intel/compiler: Remove final_program_size from brw_compile_*

2017-10-31 23:36:54 -07:00

brw_vec4_gs_visitor.h

i965/vec4: Delete the system value infastructure

2017-05-09 15:08:07 -07:00

brw_vec4_live_variables.cpp

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brw_vec4_live_variables.h

i965/vec4: consider subregister offset in live variables

2017-04-14 14:56:08 -07:00

brw_vec4_nir.cpp

i965: Combine {VS,FS}_OPCODE_GET_BUFFER_SIZE opcodes.

2017-12-30 20:30:34 -08:00

brw_vec4_reg_allocate.cpp

i965/vec4: Return float from spill_cost_for_type()

2017-08-21 14:45:44 -07:00

brw_vec4_surface_builder.cpp

i965/vec4: Fix swizzles on atomic sources.

2017-09-26 15:35:11 -07:00

brw_vec4_surface_builder.h

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brw_vec4_tcs.cpp

intel/compiler: Remove final_program_size from brw_compile_*

2017-10-31 23:36:54 -07:00

brw_vec4_tcs.h

i965/vec4: Delete the system value infastructure

2017-05-09 15:08:07 -07:00

brw_vec4_tes.cpp

i965/vec4: Delete the system value infastructure

2017-05-09 15:08:07 -07:00

brw_vec4_tes.h

i965/vec4: Delete the system value infastructure

2017-05-09 15:08:07 -07:00

brw_vec4_visitor.cpp

i965/vec4: Handle 16-bit types at type_size_xvec4

2017-12-06 08:57:18 +01:00

brw_vec4_vs_visitor.cpp

i965: Drop support for the legacy SNORM -> Float equation.

2018-01-02 16:51:42 -08:00

brw_vec4_vs.h

i965: Drop support for the legacy SNORM -> Float equation.

2018-01-02 16:51:42 -08:00

brw_vec4.cpp

compiler: tidy up double_inputs_read uses

2018-01-30 09:08:47 +11:00

brw_vec4.h

intel/compiler: Move the destructor from vec4_visitor to backend_shader

2017-11-07 10:37:52 -08:00

brw_vue_map.c

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brw_wm_iz.cpp

nir: Embed the shader_info in the nir_shader again

2017-05-09 15:07:47 -07:00

gen6_gs_visitor.cpp

i965: Move SOL PSIZ hacks from draw time to link time.

2017-06-01 00:08:29 -07:00

gen6_gs_visitor.h

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meson.build

meson: Use dependencies for nir

2018-01-11 15:40:02 -08:00

test_eu_compact.cpp

i965: Remove CONT/BREAK from instruction compaction test

2017-08-21 14:05:23 -07:00

test_eu_validate.cpp

i965: Correct disasm_info usage in eu_validate test

2017-11-18 03:07:06 +02:00

test_fs_cmod_propagation.cpp

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test_fs_copy_propagation.cpp

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test_fs_saturate_propagation.cpp

i965/fs: Check ADD/MAD with immediates in satprop unit test

2017-11-21 10:13:07 -08:00

test_vec4_cmod_propagation.cpp

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test_vec4_copy_propagation.cpp

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test_vec4_register_coalesce.cpp

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test_vf_float_conversions.cpp

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