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third_party_mesa3d/src/intel/compiler
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Iago Toral Quiroga 44e1affaec intel/compiler: implement is_zero, is_one, is_negative_one for 8-bit/16-bit 
There are no 8-bit immediates, so assert in that case.
16-bit immediates are replicated in each word of a 32-bit immediate, so
we only need to check the lower 16-bits.

v2:
 - Fix is_zero with half-float to consider -0 as well (Jason).
 - Fix is_negative_one for word type.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-04-18 11:05:18 +02:00
..
.gitignore
…
brw_cfg.cpp
intel/cfg: Represent divergent control flow paths caused by non-uniform loop execution.
2017-12-07 18:27:05 -08:00
brw_cfg.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_clip_line.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip_point.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip_tri.c
i965: Don't emit MOVs with undefined registers for Gen4 point clipping.
2018-02-28 15:03:51 -08:00
brw_clip_unfilled.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip_util.c
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_clip.h
i965: Move clip program compilation to the compiler
2017-05-26 07:58:01 -07:00
brw_compile_clip.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_compile_sf.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_compiler.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_compiler.h
i965: Move program key debugging to the compiler.
2019-04-16 09:01:15 -07:00
brw_dead_control_flow.cpp
…
brw_dead_control_flow.h
intel/compiler: consistently use ifndef guards over pragma once
2017-03-22 16:55:22 +00:00
brw_debug_recompile.c
i965: Move program key debugging to the compiler.
2019-04-16 09:01:15 -07:00
brw_disasm_info.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_disasm_info.h
i965: Stop including brw_cfg.h in brw_disasm_info.h
2017-11-17 21:51:16 -08:00
brw_disasm.c
intel/fs: Implement nir_intrinsic_global_atomic_*
2019-02-01 16:11:00 -06:00
brw_eu_compact.c
intel/compiler: don't compact 3-src instructions with Src1Type or Src2Type bits
2019-04-18 11:05:18 +02:00
brw_eu_defines.h
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2019-02-28 16:58:20 -06:00
brw_eu_emit.c
intel/eu: force stride of 2 on NULL register for Byte instructions
2019-04-18 11:05:18 +02:00
brw_eu_util.c
intel/compiler: whitespace cleanups
2017-03-13 11:16:35 +00:00
brw_eu_validate.c
intel/eu: Add support for the SENDS[C] messages
2019-01-29 18:43:55 +00:00
brw_eu.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_eu.h
intel/compiler: Silence many unused parameter warnings in brw_eu.h
2019-03-06 08:35:31 -08:00
brw_fs_bank_conflicts.cpp
i965/fs: unspills shoudn't use grf127 as dest since Gen8+
2018-07-12 18:02:26 +02:00
brw_fs_builder.h
intel/fs: Use split sends for surface writes on gen9+
2019-01-29 18:43:55 +00:00
brw_fs_cmod_propagation.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_combine_constants.cpp
intel/compiler: generalize the combine constants pass
2019-04-18 11:05:18 +02:00
brw_fs_copy_propagation.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_cse.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_dead_code_eliminate.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_generator.cpp
intel/compiler: fix ddy for half-float in Broadwell
2019-04-18 11:05:18 +02:00
brw_fs_live_variables.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_live_variables.h
intel/fs: Restrict live intervals to the subset possibly reachable from any definition.
2017-12-07 18:27:04 -08:00
brw_fs_lower_pack.cpp
…
brw_fs_lower_regioning.cpp
intel/compiler: workaround for SIMD8 half-float MAD in gen8
2019-04-18 11:05:18 +02:00
brw_fs_nir.cpp
intel/compiler: ask for an integer type if requesting an 8-bit type
2019-04-18 11:05:18 +02:00
brw_fs_reg_allocate.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_register_coalesce.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_saturate_propagation.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_sel_peephole.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs_validate.cpp
intel: disable FS IR validation in release mode.
2018-10-15 18:10:27 -07:00
brw_fs_visitor.cpp
i965,iris,anv: Make alpha to coverage work with sample mask
2019-03-25 13:54:55 -07:00
brw_fs.cpp
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_fs.h
i965,iris,anv: Make alpha to coverage work with sample mask
2019-03-25 13:54:55 -07:00
brw_inst.h
intel/compiler: add instruction setters for Src1Type and Src2Type.
2019-04-18 11:05:18 +02:00
brw_interpolation_map.c
intel/compiler: Silence unused parameter warning in brw_interpolation_map.c
2019-03-06 08:35:36 -08:00
brw_ir_allocator.h
intel/ir: Don't allow allocating zero registers
2018-12-11 21:26:23 -06:00
brw_ir_fs.h
intel/compiler: split is_partial_write() into two variants
2019-04-18 11:05:18 +02:00
brw_ir_vec4.h
intel: Don't propagate conditional modifiers if a UD source is negated
2018-10-10 13:13:12 -05:00
brw_nir_analyze_boolean_resolves.c
nir: make nir_const_value scalar
2019-04-14 22:25:56 +02:00
brw_nir_analyze_ubo_ranges.c
intel/analyze_ubo_ranges: Use nir_src_is_const and friends
2018-11-08 10:09:25 -06:00
brw_nir_attribute_workarounds.c
i965: Drop support for the legacy SNORM -> Float equation.
2018-01-02 16:51:42 -08:00
brw_nir_lower_conversions.c
intel/compiler: add a NIR pass to lower conversions
2019-04-18 11:05:18 +02:00
brw_nir_lower_cs_intrinsics.c
intel/fs: Don't loop when lowering CS intrinsics
2019-04-08 19:29:33 -07:00
brw_nir_lower_image_load_store.c
nir/builder: Add a nir_imm_zero helper
2019-04-14 22:25:56 +02:00
brw_nir_lower_mem_access_bit_sizes.c
intel/compiler: use defined size for vector components
2019-04-03 13:59:06 +10:00
brw_nir_opt_peephole_ffma.c
intel/peephole_ffma: Fix swizzle propagation
2019-01-11 10:44:08 -06:00
brw_nir_tcs_workarounds.c
util: use C99 declaration in the for-loop set_foreach() macro
2018-10-25 12:43:18 +01:00
brw_nir_trig_workarounds.py
python: Use the print function
2018-07-06 10:04:22 -07:00
brw_nir.c
intel/compiler: activate 16-bit bit-size lowerings also for 8-bit
2019-04-18 11:05:18 +02:00
brw_nir.h
intel/compiler: add a NIR pass to lower conversions
2019-04-18 11:05:18 +02:00
brw_packed_float.c
…
brw_predicated_break.cpp
…
brw_reg_type.c
intel/compiler: add new half-float register type for 3-src instructions
2019-04-18 11:05:18 +02:00
brw_reg_type.h
intel/compiler: Add Gen11+ native float type
2018-02-28 11:15:47 -08:00
brw_reg.h
intel/compiler: Expand size of the 'nr' field
2019-01-09 16:42:41 -08:00
brw_schedule_instructions.cpp
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2019-02-28 16:58:20 -06:00
brw_shader.cpp
intel/compiler: implement is_zero, is_one, is_negative_one for 8-bit/16-bit
2019-04-18 11:05:18 +02:00
brw_shader.h
intel/nir: Take a nir_tex_instr and src index in brw_texture_offset
2019-04-14 22:25:56 +02:00
brw_vec4_builder.h
intel/compiler: Lower flrp32 on Gen11+
2018-02-28 11:15:47 -08:00
brw_vec4_cmod_propagation.cpp
intel/compiler: use correct swizzle for replacement
2019-02-27 20:06:42 +00:00
brw_vec4_copy_propagation.cpp
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2019-02-28 16:58:20 -06:00
brw_vec4_cse.cpp
i965/vec4: Allow CSE on subset VF constant loads
2018-03-08 15:26:26 -08:00
brw_vec4_dead_code_eliminate.cpp
i965/vec4/dce: Don't narrow the write mask if the flags are used
2018-12-17 13:47:06 -08:00
brw_vec4_generator.cpp
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_vec4_gs_nir.cpp
intel/vec4: Use the new nir_src_is_const and friends
2018-11-08 10:09:25 -06:00
brw_vec4_gs_visitor.cpp
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_vec4_gs_visitor.h
i965/vec4: Delete the system value infastructure
2017-05-09 15:08:07 -07:00
brw_vec4_live_variables.cpp
…
brw_vec4_live_variables.h
i965/vec4: consider subregister offset in live variables
2017-04-14 14:56:08 -07:00
brw_vec4_nir.cpp
nir: make nir_const_value scalar
2019-04-14 22:25:56 +02:00
brw_vec4_reg_allocate.cpp
intel/compiler: Prevent warnings in the following patch
2019-01-09 16:42:41 -08:00
brw_vec4_surface_builder.cpp
intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2019-02-28 16:58:20 -06:00
brw_vec4_surface_builder.h
intel/vec4: Drop dead code for handling typed surface messages
2019-02-28 16:58:20 -06:00
brw_vec4_tcs.cpp
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_vec4_tcs.h
i965/vec4: Delete the system value infastructure
2017-05-09 15:08:07 -07:00
brw_vec4_tes.cpp
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_vec4_tes.h
i965/vec4: Delete the system value infastructure
2017-05-09 15:08:07 -07:00
brw_vec4_visitor.cpp
nir/i965/freedreno/vc4: add a bindless bool to type size functions
2019-04-12 09:02:59 +02:00
brw_vec4_vs_visitor.cpp
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_vec4_vs.h
i965: Drop support for the legacy SNORM -> Float equation.
2018-01-02 16:51:42 -08:00
brw_vec4.cpp
intel/compiler: Do not reswizzle dst if instruction writes to flag register
2019-04-16 09:42:08 +00:00
brw_vec4.h
intel/compiler: Prevent warnings in the following patch
2019-01-09 16:42:41 -08:00
brw_vue_map.c
intel/common: move gen_debug to intel/dev
2019-04-10 13:15:33 -07:00
brw_wm_iz.cpp
intel/fs: Extend thread payload layout to SIMD32
2018-06-28 13:19:38 -07:00
gen6_gs_visitor.cpp
intel/compiler: Prevent warnings in the following patch
2019-01-09 16:42:41 -08:00
gen6_gs_visitor.h
…
meson.build
intel/compiler: add a NIR pass to lower conversions
2019-04-18 11:05:18 +02:00
test_eu_compact.cpp
intel/ir: Fix invalid type aliasing with undefined behavior in test_eu_compact.
2018-02-27 11:42:39 -08:00
test_eu_validate.cpp
intel: Introducing Whiskey Lake platform
2018-10-11 10:02:40 -07:00
test_fs_cmod_propagation.cpp
intel/compiler/test: Add unit test for mismatched signedness comparison
2019-02-15 11:11:02 -08:00
test_fs_copy_propagation.cpp
…
test_fs_saturate_propagation.cpp
i965/fs: Check ADD/MAD with immediates in satprop unit test
2017-11-21 10:13:07 -08:00
test_vec4_cmod_propagation.cpp
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
2018-12-17 13:47:06 -08:00
test_vec4_copy_propagation.cpp
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
2018-12-17 13:47:06 -08:00
test_vec4_dead_code_eliminate.cpp
i965/vec4/dce: Don't narrow the write mask if the flags are used
2018-12-17 13:47:06 -08:00
test_vec4_register_coalesce.cpp
i965/vec4: Silence unused parameter warnings in vec4 compiler tests
2018-12-17 13:47:06 -08:00
test_vf_float_conversions.cpp
…