192 lines
6.6 KiB
C
192 lines
6.6 KiB
C
/*
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* Copyright © 2014 Intel Corporation
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*
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* Authors:
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* Connor Abbott (cwabbott0@gmail.com)
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*
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*/
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#include "compiler/glsl/ir_uniform.h"
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#include "nir.h"
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#include "main/config.h"
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#include <assert.h>
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/*
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* replace atomic counter intrinsics that use a variable with intrinsics
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* that directly store the buffer index and byte offset
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*/
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static void
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lower_instr(nir_intrinsic_instr *instr,
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const struct gl_shader_program *shader_program,
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nir_shader *shader)
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{
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nir_intrinsic_op op;
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switch (instr->intrinsic) {
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case nir_intrinsic_atomic_counter_read_var:
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op = nir_intrinsic_atomic_counter_read;
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break;
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case nir_intrinsic_atomic_counter_inc_var:
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op = nir_intrinsic_atomic_counter_inc;
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break;
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case nir_intrinsic_atomic_counter_dec_var:
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op = nir_intrinsic_atomic_counter_dec;
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break;
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case nir_intrinsic_atomic_counter_add_var:
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op = nir_intrinsic_atomic_counter_add;
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break;
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case nir_intrinsic_atomic_counter_min_var:
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op = nir_intrinsic_atomic_counter_min;
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break;
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case nir_intrinsic_atomic_counter_max_var:
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op = nir_intrinsic_atomic_counter_max;
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break;
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case nir_intrinsic_atomic_counter_and_var:
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op = nir_intrinsic_atomic_counter_and;
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break;
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case nir_intrinsic_atomic_counter_or_var:
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op = nir_intrinsic_atomic_counter_or;
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break;
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case nir_intrinsic_atomic_counter_xor_var:
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op = nir_intrinsic_atomic_counter_xor;
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break;
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case nir_intrinsic_atomic_counter_exchange_var:
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op = nir_intrinsic_atomic_counter_exchange;
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break;
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case nir_intrinsic_atomic_counter_comp_swap_var:
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op = nir_intrinsic_atomic_counter_comp_swap;
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break;
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default:
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return;
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}
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if (instr->variables[0]->var->data.mode != nir_var_uniform &&
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instr->variables[0]->var->data.mode != nir_var_shader_storage &&
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instr->variables[0]->var->data.mode != nir_var_shared)
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return; /* atomics passed as function arguments can't be lowered */
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void *mem_ctx = ralloc_parent(instr);
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unsigned uniform_loc = instr->variables[0]->var->data.location;
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nir_intrinsic_instr *new_instr = nir_intrinsic_instr_create(mem_ctx, op);
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nir_intrinsic_set_base(new_instr,
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shader_program->data->UniformStorage[uniform_loc].opaque[shader->stage].index);
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nir_load_const_instr *offset_const =
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nir_load_const_instr_create(mem_ctx, 1, 32);
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offset_const->value.u32[0] = instr->variables[0]->var->data.offset;
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nir_instr_insert_before(&instr->instr, &offset_const->instr);
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nir_ssa_def *offset_def = &offset_const->def;
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nir_deref *tail = &instr->variables[0]->deref;
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while (tail->child != NULL) {
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nir_deref_array *deref_array = nir_deref_as_array(tail->child);
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tail = tail->child;
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unsigned child_array_elements = tail->child != NULL ?
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glsl_get_aoa_size(tail->type) : 1;
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offset_const->value.u32[0] += deref_array->base_offset *
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child_array_elements * ATOMIC_COUNTER_SIZE;
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if (deref_array->deref_array_type == nir_deref_array_type_indirect) {
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nir_load_const_instr *atomic_counter_size =
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nir_load_const_instr_create(mem_ctx, 1, 32);
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atomic_counter_size->value.u32[0] = child_array_elements * ATOMIC_COUNTER_SIZE;
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nir_instr_insert_before(&instr->instr, &atomic_counter_size->instr);
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nir_alu_instr *mul = nir_alu_instr_create(mem_ctx, nir_op_imul);
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nir_ssa_dest_init(&mul->instr, &mul->dest.dest, 1, 32, NULL);
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mul->dest.write_mask = 0x1;
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nir_src_copy(&mul->src[0].src, &deref_array->indirect, mul);
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mul->src[1].src.is_ssa = true;
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mul->src[1].src.ssa = &atomic_counter_size->def;
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nir_instr_insert_before(&instr->instr, &mul->instr);
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nir_alu_instr *add = nir_alu_instr_create(mem_ctx, nir_op_iadd);
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nir_ssa_dest_init(&add->instr, &add->dest.dest, 1, 32, NULL);
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add->dest.write_mask = 0x1;
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add->src[0].src.is_ssa = true;
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add->src[0].src.ssa = &mul->dest.dest.ssa;
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add->src[1].src.is_ssa = true;
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add->src[1].src.ssa = offset_def;
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nir_instr_insert_before(&instr->instr, &add->instr);
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offset_def = &add->dest.dest.ssa;
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}
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}
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new_instr->src[0].is_ssa = true;
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new_instr->src[0].ssa = offset_def;
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/* Copy the other sources, if any, from the original instruction to the new
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* instruction.
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*/
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for (unsigned i = 0; i < nir_intrinsic_infos[instr->intrinsic].num_srcs; i++)
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new_instr->src[i + 1] = instr->src[i];
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if (instr->dest.is_ssa) {
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nir_ssa_dest_init(&new_instr->instr, &new_instr->dest,
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instr->dest.ssa.num_components, 32, NULL);
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nir_ssa_def_rewrite_uses(&instr->dest.ssa,
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nir_src_for_ssa(&new_instr->dest.ssa));
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} else {
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nir_dest_copy(&new_instr->dest, &instr->dest, mem_ctx);
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}
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nir_instr_insert_before(&instr->instr, &new_instr->instr);
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nir_instr_remove(&instr->instr);
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}
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void
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nir_lower_atomics(nir_shader *shader,
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const struct gl_shader_program *shader_program)
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{
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nir_foreach_function(function, shader) {
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if (function->impl) {
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nir_foreach_block(block, function->impl) {
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nir_foreach_instr_safe(instr, block) {
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if (instr->type == nir_instr_type_intrinsic)
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lower_instr(nir_instr_as_intrinsic(instr),
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shader_program, shader);
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}
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}
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nir_metadata_preserve(function->impl, nir_metadata_block_index |
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nir_metadata_dominance);
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}
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}
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}
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