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Author SHA1 Message Date
Eric Engestrom
fac60c140b ci: don't run sanity in Marge pipelines 
This check is intended for the MR author; for everyone else, there's
nothing they can do if the job fails so it's pointless to run it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25920>
 2023-10-30 17:50:56 +00:00
Eric Engestrom
49395b4aa4 docs/ci: allow sanity job to be missing 
The rules of both jobs never matched, so there was always the potential
for the job to be missing, but it's about to get worse with the next
commit, so fix that now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25920>
 2023-10-30 17:50:56 +00:00
Eric Engestrom
3f64b12c1e ci: drop confusing fake rules, if and when on the list of rules strings 
These are not real rules, they are just strings that have an anchor that
can be referenced elsewhere in this file.

Having these fake bits in here is confusing, as revealed by the
reactions from the first version of this commit.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25920>
 2023-10-30 17:50:55 +00:00
Eric Engestrom
9669334b41 ci/zink+radv: add another flake on polaris 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25959>
 2023-10-30 17:19:26 +00:00
Lionel Landwerlin
e64a97694a anv: use anv_state_pool_state_address for blorp vertex buffer address 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
8d813a90d6 anv: fail pool allocation when over the maximal size 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
8fc42d83be anv: make sure pools can handle more than 2Gb 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
cc67bd48d9 anv: add max_size argument for block & state pools 
Not enforced yet.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
b30428416a anv: deal with state stream allocation failures 
In case we run out of space, all the parts of the driver that rely on
this should deal with failure. The helpers will set the batch in error
state so that it cannot be submitted by the application.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
ed83d1415c anv: rename internal heaps 
Some of the names are a bit confusing. The main change is to introduce
the "indirect_" prefix.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
Lionel Landwerlin
f9753488ec blorp: handle binding table & surface state allocation failures 
The embedding driver could be failing the allocation for whatever
reason, in which case we should skip the surface state writes.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25955>
 2023-10-30 14:47:18 +00:00
LingMan
1cc26e8b66 rusticl: Show an error message if the build is attempted with an outdated bindgen version 
Ideally the build system would fetch the correct bindgen version automatically like cargo does.
Until then, provide an error message that is hopefully more helpful than whatever cryptic error the
build runs into otherwise.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9457
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10029
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25859>
 2023-10-30 13:12:51 +00:00
Erik Faye-Lund
e350193eb5 util: remove unused lut 
This was added in 153c714f2a ("util: add softfloat functions to
operate with doubles and floats"), but never used. Let's just drop it.

Reviewed-by: Yonggang Luo <luoyonggang@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25746>
 2023-10-30 12:35:07 +00:00
Tapani Pälli
2833d1ade1 intel/dev: fix intel_device_info_is_adln check 
We cannot compare pointer, patch adds is_adl_n to devinfo for detection.

Fixes: 3cf71ddfac ("intel/dev: provide intel_device_info_is_adln helper")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25934>
 2023-10-30 11:20:41 +00:00
Jordan Justen
9bd47aabaf anv: Add more space for init_render_queue_state() batch (MTL regression) 
It may be some MTL specific code paths, but 7cdacaf493 is triggering
anvil to run out of space when initializing the render batch.

Fixes: 7cdacaf493 ("intel/xehp: Adjust TBIMR performance chicken bits.")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25949>
 2023-10-30 10:05:10 +00:00
Danylo Piliaiev
117f81585e tu/a6xx: Exclude REG_A6XX_TPL1_UNKNOWN_B602 from reg stomping 
Not used on A6XX but causes failures when set

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25918>
 2023-10-30 09:39:21 +00:00
Danylo Piliaiev
069797c708 tu/a7xx: Zero out A7XX_VPC_PRIMITIVE_CNTL_0 in 3d blits 
Same as we are doing with A6XX_PC_PRIMITIVE_CNTL_0.
No issues were seen but it should be a right thing to do.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25918>
 2023-10-30 09:39:21 +00:00
Danylo Piliaiev
cdbb8b5412 tu: Fix reading of stale (V)PC_PRIMITIVE_CNTL_0 
PC_PRIMITIVE_CNTL_0 is not set in a draw state and may be changed
by 3d blits, so we have to re-emit it a the start of a renderpass.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9941

Fixes: 7be8d0f7f4
("tu: Use common dirty tracking for PC_PRIMITIVE_CNTL_0")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25918>
 2023-10-30 09:39:21 +00:00
Samuel Pitoiset
0477346c0b aco: remove dead code in nir_intrinsic_xfb_counter_{add,sub}_amd 
This code path is only used by GFX11 now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25903>
 2023-10-30 08:51:51 +00:00
Samuel Pitoiset
d390cd7c5d ac/nir: remove dead code in nir_intrinsic_xfb_counter_{add,sub}_amd 
This code path is only used by GFX11 now.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25903>
 2023-10-30 08:51:51 +00:00
Samuel Pitoiset
5176f75e0d radv: remove unnecessary VS_PARTIAL_FLUSH for NGG streamout 
This used to be a PS_PARTIAL_FLUSH to fix synchronization issues with
NGG streamout on RDNA2 but it's no longer needed for RDNA3. It's
already synchronized in CmdEndTransformFeedbackEXT().

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25903>
 2023-10-30 08:51:51 +00:00
Samuel Pitoiset
eb47e07782 radv: remove NGG streamout support for RDNA1-2 
This was useful for experimenting it on RDNA2 and during RNDA3 bringup,
but now the support is rock solid on RDNA3 and it's useless to keep the
RADV_PERFTEST=ngg_streamout option.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25903>
 2023-10-30 08:51:51 +00:00
Samuel Pitoiset
7beddd4f5c radv: use the GPUVM fault protection status helper 
To print more useful information when a fault happens.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25855>
 2023-10-30 08:10:23 +00:00
Samuel Pitoiset
e18c4bca31 ac/debug: add a helper to print GPUVM fault protection status 
This basically prints the same info as dmesg.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25855>
 2023-10-30 08:10:22 +00:00
Samuel Pitoiset
bc09932ec3 ac/registers: allow to parse GCVM_L2_PROTECTION_FAULT_STATUS 
To have defined bitfields for this register.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25855>
 2023-10-30 08:10:22 +00:00
Samuel Pitoiset
7d96fe853e radv: fix a synchronization issue with primitives generated query on RDNA1-2 
Only RDNA1-2 are affected because RADV needs to handle the legacy vs
NGG path for this query, and the NGG results are stored with 2 extra
64-bit values.

Fixes flakes with
dEQP-VK.transform_feedback.primitives_generated_query.* since VKCTS
1.3.7.0.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25862>
 2023-10-30 07:33:06 +00:00
Iago Toral Quiroga
82bef62c17 v3d,v3dv: fix MMU error from hardware prefetch after ldunifa 
ldunifa works exactly the same as ldunif: the hw will prefetch the
next 4 bytes after a read, so if a buffer is exactly a multiple of
a page size and a shader uses ldunifa to read exactly the last 4 bytes
the prefetch will read out of bounds and spam the error on the kernel
log. Avoid that by allocating extra bytes in this scenario.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25752>
 2023-10-30 08:14:05 +01:00
Etaash Mathamsetty
830018abfa driconf: add a workaround for Rainbow Six Siege 
Acked-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25734>
 2023-10-30 06:05:17 +00:00
Julia Zhang
78edaa2a9a radeonsi: modify binning settings to improve performance 
Existing binning settings which are required for gfx10.3 and newer cause
performance drop. Keep existing settings for gfx10.3 and newer version
and follow previous rules to set values for gfx9 to improve performance
of gfx9.

Signed-off-by: Julia Zhang <julia.zhang@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25933>
 2023-10-30 12:02:53 +08:00
Karol Herbst
4f892ecc1e zink: emit MemoryAccess flags for coherent global load/stores 
Makes global load/stores coherent on a device level if requested by the
shader.

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:55 +02:00
Karol Herbst
2f34a1db58 zink: deallocate global_bindings array 
Fixes: a6e9e0f0d7 ("zink: add set_global_binding")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:55 +02:00
Karol Herbst
6afa1b3bad zink: handle denorm preserve execution modes 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:55 +02:00
Karol Herbst
049af04341 zink: validate pointer alignment in resource_from_user_memory 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:55 +02:00
Karol Herbst
5e3b7bef1e rusticl: handle failed maps gracefully 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: @LingMan <18294-LingMan@users.noreply.gitlab.freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:55 +02:00
Karol Herbst
7f08036abc rusticl/mesa: pass PIPE_BIND_LINEAR in resource_create_texture_from_user 
Host pointer allocations are all linear laid out, so just tell the drivers
in case they don't assume this implicitly.

Fixes: 71a9af4910 ("rusticl/mem: support read/write/copy ops for images")
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:28 +02:00
Karol Herbst
398fadf1cf rusticl/device: restrict const max size to 1 << 26 bytes 
Signed-off-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25937>
 2023-10-28 14:38:25 +02:00
Yiwei Zhang
38deb97d10 venus: use vk_device_memory tracked memory_type_index 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:40 +00:00
Yiwei Zhang
99b716c64d venus: use vk_device_memory tracked size 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:40 +00:00
Yiwei Zhang
73267e38c9 venus: use vk_device_memory tracked export and import handle types 
Meanwhile, we merge the export and non-external allocate paths since
export alloc will be rejected by vn_device_memory_should_suballocate.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:40 +00:00
Yiwei Zhang
a47992734a venus: use common AHB management and export impl 
vk_device_memory_create handles AHB export alloc and import tracking.
Also use common GetMemoryAndroidHardwareBufferANDROID impl.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:40 +00:00
Yiwei Zhang
6418a93510 venus: use common vk_device_memory as vn_device_memory base 
This change only updates the handle object creation to use common vk
device memory.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:39 +00:00
Yiwei Zhang
35a3a6338f venus: use common vk_image as vn_image base 
This change only switches the object base, and is to prepare for using
vk_alloc_ahardware_buffer. Large refactor via leveraging existing common
vk_image state tracking will be followed.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:39 +00:00
Yiwei Zhang
a8b2cfe877 venus: avoid modifier prop query in vn_android_get_image_builder 
AHB prop query would check the memory plane count match instead. This
reduces vn_android_get_image_builder overhead and simplifies the AHB
import api to prepare for later common vk ahb adoption.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:39 +00:00
Yiwei Zhang
7b76e1f62c venus: tiny refactor of device memory report interface 
Pass type and handle directly instead of vn_object_base to prepare for
device level objects using corresponding common vk objects.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:39 +00:00
Yiwei Zhang
bf0a5ebca8 venus: use common vk_image_usage_to_ahb_usage helper 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:39 +00:00
Yiwei Zhang
1547cf137e venus: use common vk_image_format_to_ahb_format helper 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25184>
 2023-10-28 00:28:39 +00:00
Marek Olšák
276b9b13cf radeonsi: initialize perfetto in the right place 
Compute contexts don't execute the second half of the function.

Fixes: a164e147e9 - radeonsi: Add perfetto support in radeonsi
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10043

Tested-by: Mike Lothian <mike@fireburn.co.uk>
Tested-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25873>
 2023-10-27 23:03:04 +00:00
Francisco Jerez
57decad976 intel/xehp: Enable TBIMR by default. 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493>
 2023-10-27 14:50:42 -07:00
Francisco Jerez
ed9886321c intel/xehp+: Use TBIMR tile box check in order to avoid performance regressions. 
This allows the hardware to behave as if TBIMR was disabled until a
polygon is processed which spans at least one tile.  This is a rather
heavy-handed heuristic meant to prevent regressions in heavily
geometry-bound workloads that render large numbers of tiny primitives
much smaller than a TBIMR tile.

A particularly bad example of this was observed in SoTR, where certain
draw calls with a long-running VS and a mostly trivial PS render more
triangles than pixels, filling up the URB and TBIMR batch pretty
quickly, which causes EU utilization to tank (since once the URB has
filled up the parallelism of the VS is limited by the number of
polygons that fit in a TBIMR batch at the completion of each tile
walk, which isn't a lot in relation to the total EU count of a DG2),
and causes the bottleneck to be the rate at which the tile sequencer
performs additional tile passes, each one processing a small number
(<1024 polygons) of the hundreds of thousands of triangles of the
draw call.

Enabling this heuristic seems effective at avoiding that scenario in
SoTR among other titles (e.g. Total War Warhammer 3), but it's a bit
of a compromise since one could imagine cases where TBIMR is helpful
even if the geometry doesn't pass the box check, so a better heuristic
or a driconf rule may be useful in the future.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493>
 2023-10-27 14:50:42 -07:00
Francisco Jerez
f0d24b155b intel/xehp+: Adjust TBIMR batch size based on slice count. 
This programs a TBIMR batch size equal to 128 polygons per slice in
order to match the hardware spec recommendation (BSpec 68436).  This
has been confirmed to improve performance slightly relative to the
hardware default batch size of 256 polygons.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25493>
 2023-10-27 14:50:42 -07:00