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Martin Roukala (né Peres)
f4b4bc0c2f ci/b2c: start making use of the harbor.fd.o 
A new container registry was added recently in the fd.o infrastructure.
It is located in a datacenter that does not charge for bandwidth usage,
and aims to become the canonical registry in the future. It is however
currently configured to be a partial mirror of registry.fd.o, where
only the most-downloaded container images can be found.

The address of the new registry is specified in mesa/mesa's CI
variables, which means forks will default to registry.fd.o. However,
Valve Infra DUTs do not have access to the internet, and instead use
another cache proxy hosted locally on the CI gateways. This forced
Benjamin to overwrite the registry URL from harbor.freedesktop.org to
registry.freedesktop.org in 0bd9a062e1 ("CI: Overwrite valve infra's
registry").

After adding support for the new registry in valve infra, then
deploying the update, we are now able to make use of the new container
registry. This commit simply rewrites the URL harbor.freedesktop.org
into `{{ harbor_fdo_registry }}`. This variable is set in the valve
infra to point to the `host:ip` of the service, which means changes to
the way we deploy this service can be done on the valve-infra side
without needing to make changes to every project that makes use of our
machines.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7913
Acked-by: Benjamin Tissoires <benjamin.tissoires@gmail.com>
Signed-off-by: Martin Roukala (né Peres) <martin.roukala@mupuf.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20450>
 2023-01-05 05:51:39 +00:00
Qiang Yu
d045b33599 ac/nir: handle 16bit varying streamout for legacy vs and gs copy shader 
This is for VARYING_SLOT_VARx_16BIT slots varying streamout.

OpenGL ES will store 16bit medium precision varying to these slots.
Vulkan is not allowed to streamout varying less than 32bit.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20157>
 2023-01-05 01:12:06 +00:00
Qiang Yu
7d6d63c94a ac/nir,radv: use ac_nir_gs_output_info 
We are also going to add more fields in it.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20157>
 2023-01-05 01:12:06 +00:00
Qiang Yu
cf2ea3fce9 nir/xfb: save high_16bits output info 
It is combined with slot location to identify a varying
when using VARYING_SLOT_VARx_16BIT.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Qiang Yu <yuq825@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20157>
 2023-01-05 01:12:06 +00:00
Emma Anholt
b8d9f860a0 zink: Only expose PIPE_CAP_SHADER_ATOMIC_INT64 if we can do shared and ssbos. 
Fixes: 3ac0706aa8 ("zink: export PIPE_CAP_SHADER_ATOMIC_INT64")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20506>
 2023-01-05 00:55:18 +00:00
Emma Anholt
426cb025e7 zink: Only expose PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD if we can actually add. 
Drivers may expose the ext without the add capability, if they can
load/store/exchange.

Fixes: c32f046ab6 ("zink: export PIPE_CAP_IMAGE_ATOMIC_FLOAT_ADD")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20506>
 2023-01-05 00:55:18 +00:00
Timothy Arceri
a4a1f95431 util/00-mesa-defaults: add Metal Slug XX workaround 
The game uses texture2D() in glsl 4.40 shaders, but texture2D()
was moved to compat in 4.20.

Cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20511>
 2023-01-05 00:26:36 +00:00
Felix DeGrood
c1c81137d9 hasvk: Emit CS stall on INTEL_MEASURE timestamp 
For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573 ("anv: implement u_trace support")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>
 2023-01-04 22:43:36 +00:00
Felix DeGrood
7f6beb8537 anv: Emit CS stall on INTEL_MEASURE timestamp 
For INTEL_MEASURE, ensure all prior instructions completed before
timestamp taken. Continue to support no CS flush case for Perfetto.
CS stall was dropped from pipecontrol when adding u_trace support.

Fixes: cc5843a573 ("anv: implement u_trace support")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20502>
 2023-01-04 22:43:36 +00:00
Emma Anholt
0a11cea652 ci/zink: Add trace testing on anv TGL. 
For now the restricted traces aren't available to the intel devs, so it
won't actually run for them, but I can manage that part for a bit until we
get the policy updated on the minio side (issue filed to do so).

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>
 2023-01-04 21:18:08 +00:00
Emma Anholt
a5572583e3 ci/zink: Add a manual full run of CTS+piglit on tgl. 
If we want to ship zink on anv for ChromeOS, we've got to be able to know
that the tree is green when we uprev.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>
 2023-01-04 21:18:08 +00:00
Emma Anholt
d19d0fe2eb ci/zink: Refactor a bit of test configuration yaml. 
I'm adding more zink tests shortly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>
 2023-01-04 21:18:08 +00:00
Emma Anholt
99a6f2a186 ci: Set the path to the VK drivers during HWCI_START_XORG/WESTON. 
If the test is running with zink, we want zink to be able to find the
vulkan driver.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>
 2023-01-04 21:18:08 +00:00
Emma Anholt
01b5e876a2 ci/iris: Add some recent flakes. 
APL are clearly part of the existing set, glx-swap-copy on KBL is
plausibly new but it's a flake on other drivers too.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20503>
 2023-01-04 21:18:08 +00:00
Marek Olšák
cd15e95a11 mesa: set NewVertexElements when changing IsDynamic 
Fixes: 0fbd82bdc4 - mesa: move calling _mesa_update_vao_derived_arrays into st_update_array
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7938

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20432>
 2023-01-04 20:52:20 +00:00
Jesse Natalie
a573f6a6da dzn: Handle split front/back compare/write masks for dynamic state 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>
 2023-01-04 11:12:34 -08:00
Jesse Natalie
33e2444384 dzn: For CmdBindIndexBuffer, look at the graphics pipeline instead of last used 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>
 2023-01-04 11:12:34 -08:00
Jesse Natalie
a81e832af0 dzn: Don't touch pMultisampleState if rasterizerDiscardEnable 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>
 2023-01-04 11:12:34 -08:00
Jesse Natalie
22bb768a8e dzn: Remove spammy logging during device create 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20364>
 2023-01-04 11:12:34 -08:00
Jesse Natalie
a0b9e5a93e dzn: Flip on enhanced barrier code paths based on D3D capability 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
dc9a3ed4d5 dzn: Add an "enhanced" version of CmdPipelineBarrier2 
This allows us to *much* more accurately express the app's barrier
requests. Unfortunately, there's still a few mismatches, so in those
cases we'll end up conservatively over-synchronizing/flushing.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
4fb076fc22 dzn: Add an enhanced barrier path for internal and fixup barriers 
While enhanced barriers is a *much* closer model to Vulkan's, there's
still one big mismatch: Vulkan's "transfer" concept supports clears,
copies, and resolves, while D3D's closest match only supports copies.
So when doing clears and resolves, we need to transition from the copy
layout to the correct layout, and then back.

Internal barriers are done for some meta scenarios as well as render
pass initial layout transitions. These look more or less the same as
non-enhanced, we just want to avoid mixing the two paradigms if possible.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
d50f160d0a dzn: CmdWaitForEvents needs to submit barriers too 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
2314afae9d dzn: Fix aspects used for blit barriers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
5b9aedce0e dzn: Remove unnecessary read -> read transition barriers 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
e616d33850 dzn: Respect sharing mode 
D3D's "simultaneous access" concept pretty closely matches
Vulkan's concurrent sharing mode, except that we don't
support simultaneous access for depth buffers.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
b9df7f0a27 dzn: Store valid BARRIER_ACCESS flag masks for a few objects 
A subset of total access flags are valid based on command list
type and resource flags, so store that set during object creation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
184339ba6f dzn: Store command list type in the command buffer object 
We'll want to use this for choosing queue-type-specific
layouts in the new pipeline barrier implementation.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
d7f5563907 dzn: Create all buffers in COMMON state 
Since they promote/decay, there's no point in using any
other initial state value.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Jesse Natalie
76e72ed452 dzn: Delete initial_state which is always COMMON 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20324>
 2023-01-04 18:20:26 +00:00
Karmjit Mahil
0b72ff00b1 pvr: Remove PVR_STATIC_CLEAR_.*_BIT and use VkImageAspectFlags. 
This commit removes the PVR_STATIC_CLEAR_.*_BIT used to index the
static clear templates in the device. Now we use the Vulkan flags
so no need for any conversion of the flags.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
7509e259f8 pvr: Implement color/depth/depth+stencil attachment clear. 
The depth/depth+stencil clear was already implemented. This adds
the z replication and color attachment clear branches.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
6e2ec31043 pvr: Add clear attachment programs in device. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
72151aa426 pvr: Add comments documenting large/normal clear words. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
a308d38fae pvr: Add empty clear attachment usc programs. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
821c6b9342 pvr: Implement depth/stencil/depth+stencil attachment clear. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
5611dedd78 pvr: Fix typo in 'err_free_verices_buffer'. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
603570535d pvr: Add pvr_clear_vertices_upload(). 
This function allows to easily setup and upload the vertices
required to clear a specific area. The vertices are
arranged in a triangle strip.

This will also be used in following commits implementing
vkCmdClearAttachments().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
13fc4b1780 pvr: Move static clear state into pvr_clear.c . 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
aa37415f1c pvr: Add layer count support to pvr_clear_vdm_state(). 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
4a9f23c564 pvr: Move clear VDM state into pvr_clear.h . 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
a70b724519 pvr: Add clear rta vert shader pds program. 
The rta program will be used in following commits adding support
for vkCmdClearAttachments().

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
22bad762f4 pvr: Add pvr_clear.{h,c} . 
This moves some clear related functionality into a new
pvr_clear.{h,c} just to for better organisation and allow for
easier reusability.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
821da19046 pvr: Add multi layer passthough vert shader upload in device. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Karmjit Mahil
37e8e0a494 pvr: Change "ID" to "id" in instance_ID_modifier. 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20055>
 2023-01-04 16:30:39 +00:00
Corentin Noël
305f0de7a3 ci: Remove MESA_ARM_BUILD_TAG environment variable 
Its value is already the same as MESA_IMAGE_TAG so no need to duplicate it.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20488>
 2023-01-04 16:02:02 +00:00
Corentin Noël
37d56a0576 ci: Bump crosvm and virglrenderer versions 
Update virglrenderer and crosvm to the latest version on time.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20488>
 2023-01-04 16:02:02 +00:00
Gert Wollny
234e8fd157 r600/sfn: make sure we return a non-negative number of registers 
If a shader doesn't use any register and only ssa values we might
end up with zero minimum registers, and because a unsigned is
returned that goes wrong.

Fixes: 565816dfa15214abbeef9a9d94e44f30507ca4d7
    r600/sfn: Set minimum required registers based on array allocation

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8008

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20516>
 2023-01-04 14:45:33 +00:00
Samuel Pitoiset
c3e2e71b50 radv: rework generating the PS epilog key 
Generating a PS epilog key will also be used when compiling PS epilogs
on-demand. This introduces a new helper that generates it.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20485>
 2023-01-04 13:15:03 +00:00
Samuel Pitoiset
4f6f53a18a radv: simplify removing unused color exports 
If CB_TARGET_MASK (color write mask) is 0 for a given MRT, this implies
that the color format is 0 because the driver compacts MRTs.

No fossils-db changes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20485>
 2023-01-04 13:15:03 +00:00