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Author SHA1 Message Date
Alyssa Rosenzweig
f0421099ef pan/bi: Pipe through tls_size 
So we have stack memory allocated.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
b43b1535e2 pan/bi: Implement spilling 
Now that all the helpers are in place, we can wire it up.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
e33b2976f3 pan/bi: Pack LOAD/STORE 
LOAD is the same as LOAD_UNIFORM (same instruction, I need to
deduplicate the IR), STORE is basically the same as LOAD.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
74be83d876 pan/bi: Add bi_foreach_clause_in_block_safe helper 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
2ff54cacf0 pan/bi: Factor out singleton construction from scheduler 
We'll reuse the logic in spilling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
2d0f46a181 pan/bi: Implement bi_spill_register 
Given a node to spill, insert the appropriate loads and stores to spill
it.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
82dbc4ea78 pan/bi: Add helpers for working with singletons 
Clauses with exactly one instruction (not canonical terminology to my
knowledge, but the notation is suggestive). Since these are isomorphic
to the instructions themselves, we want helpers to go between the forms.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
1db83fc75d pan/bi: Add bi_rewrite_index_src_single helper 
Ported from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
9e915fd5f7 pan/bi: Add bi_fill 
Likewise generates LOAD from tls.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
486a820bc6 pan/bi: Add bi_spill helper 
Generates STORE to TLS.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
171bf19917 pan/bi: Add spills/fills parameters 
For future shader-db integration.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
7246dd88cd pan/bi: Implement bi_choose_spill_node 
Simplified from Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
ab9abc9052 pan/bi: Add no_spill flag to IR 
Will be used to prevent double spills.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
ad8a8499c9 pan/bi: Stub spilling 
Like Midgard.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
8477678cfe pan/bi: Fix handling of small constants in bi_lookup_constant 
Streamline the logic and the bug goes away.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
82a62a6f33 pan/bi: Drop 64-bit constant support 
We don't support 64-bit clauses and don't intend to (v6 only, v7 doesn't
support them) so this is irrelevant.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
d2bfcba54d pan/mdg: Cleanup mir_rewrite_index_src_single 
Use idiomatic iterator.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
b19d9c86a8 panfrost: Drop panfrost_vt_emit_shared_memory 
Let's reuse the same routines across Midgard/Bifrost so we get proper
handling of spilling.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Alyssa Rosenzweig
e6152091ca panfrost: Use canonical characterization of tls_size 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Boris Brezillon
a33827d3d3 panfrost: Get rid of the non-native wallpering bits 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Boris Brezillon
c89f659f03 panfrost: Use native wallpapering on Bifrost 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Boris Brezillon
edd98aac3f panfrost: Add support for native wallpapering on Bifrost 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Boris Brezillon
a677e34e1f panfrost: Split panfrost_load_midg() 
It makes it easier to read and will allow re-using common bits for
the bifrost reload logic.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:23 +00:00
Boris Brezillon
8892c9cde1 panfrost: Pass the texture payload through a panfrost_ptr 
We want to be able to pass a payload allocated from the pool, so let's
change the function prototype to allow that.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Alyssa Rosenzweig
3f91d81945 panfrost: Rename gtransfer to transfer 
Now that panfrost_transfer is renamed to panfrost_ptr.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
1b3b289c5c panfrost: Rename panfrost_transfer to panfrost_ptr 
And use it in panfrost_bo to store a GPU/CPU pointer tuple.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
bf3cd28319 panfrost: Use real name for attribute's unknown field 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
6b68c821d1 panfrost: Build blit shaders on Bifrost too 
Now that the compiler has been patched to support all the instructions
used by blit shaders we can compile them unconditionally.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
69c864b0b9 panfrost: Make {midgard,bifrost}_compile_shader_nir() return a program object 
Letting the caller zero-initialize the program object is error prone,
not to mention that resources attached to the program might not be freed
by the caller. Let's simplify that by letting the compiler allocate the
panfrost_program object. Those objects should be freed with ralloc_free().

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
b83c293674 pan/bi: Add basic support for txf_ms 
We currently don't support txf_ms instructions specifying a texel offset
src.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
d33c8afe9b pan/bi: Support the case where TEXC needs 0 or 1 staging reg 
No need to add a COMBINE instruction if TEXC only needs zero or one
staging reg.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
4aff27a68a pan/bi: Add support for load_sample_id 
Sample ID is preloaded in r61.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
e2d6156742 pan/bi: Print blend descriptor source properly 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
74c158011d pan/bi: Make sure we don't print special index as a register 
index can have both a SPECIAL flag and PAN_IS_REG (bit 0) set, but we
shouln't treat the index as a register in that case. Let's bail out
early in bi_print_dest_index() when we're passed a special index
that's not a register.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
a194dcc827 panfrost: Replace unkown renderer state fields by their real names 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
7486b5d91e panfrost: Add specialized preload descriptors 
It's just easier to identify the different layouts this way.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
d769697f35 panfrost: Add the bifrost tiler internal state field 
The internal state is updated every time a tiler job is executed, and
pandecode complains that unused bits are not zero-ed when that happens.
Define the internal state (not meant to be set by the driver) to remove
those spurious errors.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
2f1947b39c panfrost: Fix tiler job injection 
When injecting a tiler job, we shouln't make it depend on the last tiler
job, but instead make the first tiler job depend on it.

Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Boris Brezillon
519643bbe0 panfrost: Adjust the renderer state definition 
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7206>
 2020-10-23 14:48:22 +00:00
Connor Abbott
f2ae8d116a freedreno/a6xx: Implement user clip/cull distances 
Also, plumb things through ir3 so that we don't lower clip planes to
discard anymore.

This seems to fix some artifacts in the neverball trace.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
 2020-10-23 11:09:18 +00:00
Connor Abbott
b4224c39e1 tu: Implement clip/cull distances 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
 2020-10-23 11:09:18 +00:00
Connor Abbott
47f825ac63 ir3: Handle clip+cull distances 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
 2020-10-23 11:09:18 +00:00
Connor Abbott
9e063b01b7 ir3: Switch tess lowering to use location 
Clip & cull distances, which are compact arrays, exposed a lot of holes
because they can take up multiple slots and partially overlap.

I wanted to eliminate our dependence on knowing the layout of the
variables, as this can get complicated with things like partially
overlapping arrays, which can happen with ARB_enhanced_layouts or with
clip/cull distance arrays. This means no longer changing the layout
based on whether the i/o is part of an array or not, and no longer
matching producer <-> consumer based on the variables. At the end of the
day we have to match things based on the user-specified location, so for
simplicity this switches the entire i/o handling to be based off the
user location rather than the driver location. This means that the
primitive map may be a little bigger, but it reduces the complexity
because we never have to build a table mapping user location to driver
location, and it reduces the amount of work done at link time in the SSO
case. It also brings us closer to what the other drivers do.

While here, I also fixed the handling of component qualifiers, which was
another thing broken with clip/cull distances.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
 2020-10-23 11:09:18 +00:00
Connor Abbott
4ca38a1995 nir/lower_clip_cull: Store array size for FS inputs 
I think the rationale for not setting the size for inputs is that
when passed between geometry stages the clip and cull distances are
supposed to be treated like any other varying. However, this isn't 100%
the case for the FS, since when it's read by the FS it's also used by
the fixed-function stage. In freedreno we setup varying locations when
compiling the FS, and then tack on VS-only outputs like gl_Position at
the end. Furthermore there's code to compact input locations based on
what's actually read. But this compaction can't happen for clip and cull
distances, because then we won't have space for components that are only
read by the clipper. So, we need to know the original number of
components for both arrays. Modify this pass so that we don't have to go
digging around for it ourselves.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6959>
 2020-10-23 11:09:18 +00:00
Tapani Pälli
cb6ce4a265 iris: fix the order of src and dst for fence memcpy 
This fixes random failures with "deqp-egl --deqp-case=*multithread*":
   iris: Failed to submit batchbuffer: No such file or directory

Fixes: 6b1a56b908 ("iris: Drop stale syncobj references in fence_server_sync")
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7289>
 2020-10-23 13:53:53 +03:00
Andrii Simiklit
d972a6ac4c nir: get rid of OOB dereferences in nir_lower_io_arrays_to_elements 
This patch fixes mesa compiler crash in i965 on shaders like the following one:
```
   in VS_OUTPUT {
      mat4 data;
   } vs_output;
   out vec4 fs_output;

   vec4 convert(in float val) {
       return vec4(val);
   }

   void main()
   {
       fs_output = vec4(0.0);
       for (int a = -1; a < 5; a++) {
           for (int b = -1; b < 5; b++) {
               fs_output += convert(vs_output.data[b][a]);
           }
       }
   }
```

Section 5.11 (Out-of-Bounds Accesses) of the GLSL 4.60 spec says:
   In the subsections described above for array, vector, matrix and
   structure accesses, any out-of-bounds access produced undefined
   behavior....
   Out-of-bounds reads return undefined values, which
   include values from other variables of the active program or zero.
   Out-of-bounds writes may be discarded or overwrite
   other variables of the active program.

GL_KHR_robustness and GL_ARB_robustness encourage us to return zero
for reads.

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Signed-off-by: Andrii Simiklit <andrii.simiklit@globallogic.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6560>
 2020-10-23 09:51:38 +00:00
Samuel Pitoiset
33c9d4bf31 radv: replace RADV_TRACE_FILE by RADV_DEBUG=hang 
The trace file will be dumped as part of the hang report into
$HOME/radv_dumps_<pid>/trace.log if a GPU hang is detected.

The old and famous RADV_TRACE_FILE envvar is now deprecated.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
 2020-10-23 07:35:00 +00:00
Samuel Pitoiset
9516f9369e radv: re-order GPU hang report dumps by usefulness 
In case the GPU recover, it's probably better to dump useful info
first.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
 2020-10-23 07:35:00 +00:00
Samuel Pitoiset
719b9b3e27 radv: dump GPU hang report logs into $HOME/radv_dumps_<pid> 
This creates a directory and save various logs (dmesg, umr,
pipeline, gpu info, etc) instead of printing stuff to stdout/stderr.

This dumps the following files when a GPU hang is detected:
- dmesg.log
- gpu_info.lo
- options.log
- pipeline.log (shaders including SPIR-V if spirv-dis found)
- registers.log
- trace.log
- vm_fault (if a VM fault is detected)
- umr_ring.log (if UMR found)
- umr_waves.log (if UMR found)

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
 2020-10-23 07:35:00 +00:00
Samuel Pitoiset
ef6d374307 radv: dump UMR ring and waves into the hang report 
Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3620
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7233>
 2020-10-23 07:35:00 +00:00