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255 Commits

Author SHA1 Message Date
Jonathan Gray
ed5d16cec1 iris: check i915 features after hw gen 
when running recent Mesa on i855 (gen 2) without amber drivers:
  error: Kernel is too old for Iris. Consider upgrading to kernel v4.16.

  libGL error: glx: failed to create dri3 screen
  libGL error: failed to load driver: iris
  error: Kernel is too old for Iris. Consider upgrading to kernel v4.16.

  libGL error: glx: failed to create dri2 screen
  libGL error: failed to load driver: iris

move the i915 feature check to after the hardware generation check
which results in:
  MESA: warning: Driver does not support the 0x3582 PCI ID.
  libGL error: glx: failed to create dri3 screen
  libGL error: failed to load driver: iris
  MESA: warning: Driver does not support the 0x3582 PCI ID.
  libGL error: glx: failed to create dri2 screen
  libGL error: failed to load driver: iris

Cc: mesa-stable
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18563>
 2022-09-21 22:38:33 +00:00
Illia Polishchuk
74658b01d2 driconf/Intel: Add lower_depth_range_rate option workaround for Homerun Clash misrendering issue 
Intel has different Z interpolation float point rounding
than other mesa gpus
For example gl_Position.z = 0.0 will be interpolated to
gl_FragCoord.z = 0.5 for all gpus

gl_FragCoord = -0.00000001 will be interpolated to
gl_FragCoord.z = 0.4999999702 for Intel
and rounded to gl_FragCoord.z = 0.5 for other gpus

Games with LEQUAL depth func will fail depth test on Intel
and will pass it on other gpus in such case

This workaround lowers translated depth range
and several gl_FragCoord.z coords with extra small difference
will be translated to the same UINT16\UINT24\UINT32
value of an integer depth buffer

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7199

Signed-off-by: Illia Polishchuk <illia.a.polishchuk@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18412>
 2022-09-19 10:08:48 +00:00
Tomeu Vizoso
79b92af9da gallium: Add PIPE_CAP_QUERY_TIMESTAMP_BITS 
For those drivers that don't make full use of the 64 bits in
pipe_query_result.u64.

Applications will make use of it via GL_QUERY_COUNTER_BITS to handle
when the value rolls over.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10770>
 2022-09-09 14:49:12 +02:00
Emma Anholt
7662a5e9d3 mesa: Remove PIPE_CAP_CS_DERIVED_SYSTEM_VALUES_SUPPORTED/lower_cs_derived. 
We have fine NIR lowering for this (already called from mesa/st), no need
for a separate GLSL pass.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18361>
 2022-09-06 17:11:14 +00:00
Kenneth Graunke
1ef43ea3c4 iris: Fix PIPE_CAP_UMA 
If we have VRAM we're not exactly a unified memory architecture, are we?

Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18123>
 2022-08-18 17:05:35 +00:00
Jordan Justen
eaf2a35a76 iris/bufmgr: Use memory info from devinfo 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17075>
 2022-06-22 00:30:49 +00:00
Emma Anholt
fa118be9ae iris: Enable PIPE_CAP_LEGACY_MATH_RULES. 
Now that TTN hooks this up to use_legacy_math_rules, we can flip the
switch and gallium nine can get the desired behavior from the hardware
instead of emitting math workarounds.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16176>
 2022-06-10 03:26:33 +00:00
Marek Olšák
ad8f9d5d58 gallium: rename PIPE_CAP_MAX_SHADER_BUFFER_SIZE -> *_UINT 
to imply the maximum of 4GB - 1.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
 2022-06-07 00:17:58 -04:00
Marek Olšák
fd6b8999d7 gallium: rename PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE->MAX_TEXEL_BUFFER_ELEMENTS_UINT 
to allow exposing 4G - 1. The "SIZE" was also a misnomer because it meant
elements. This no longer clamps the size to INT_MAX in st/mesa.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
 2022-06-07 00:17:58 -04:00
Marek Olšák
406cf871b2 gallium: rename PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE to *_BUFFER0_* 
UBOs will use a larger limit.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
 2022-06-07 00:17:57 -04:00
Emma Anholt
8c4b88ee48 gallium+glsl: Remove EmitNoSat/PIPE_CAP_VERTEX_SHADER_SATURATE 
The drivers not setting it were:

- nv30, which gets lowering using NIR's lower_fsat flag.
- r300, which gets lowering using NIR's lower_fsat flag.
- a2xx, which has was getting it optimized back to fsat anyway.

This drops the check for the cap from gallium nine.  While nine does have
a non-nir path, I think it's safe to assume that if you have SM3
texturing, you can do fsat.

Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16823>
 2022-06-07 02:38:42 +00:00
Nagappa Koppad, Basanagouda
a99e85db9e iris:Duplicate DRM fd internally instead of reuse. 
Scenario we want to avoid is double close of DRM fd in iris driver.

Signed-off-by: Nagappa Koppad, Basanagouda <basanagouda.nagappa.koppad@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6620
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16886>
 2022-06-06 20:04:28 +00:00
Timothy Arceri
26ff49038c gallium: remove PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT CAP 
This is used for the old, buggy and slow GLSL IR loop unrolling
code. All drivers have now switched to the NIR unrolling code so
here we remove the CAP.

Reviewed-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16366>
 2022-06-04 16:11:49 +00:00
Vadym Shovkoplias
55c71217ec driconf: Add a limit_trig_input_range option 
With this option enabled range of input values for fsin and fcos is
limited to [-2*pi : 2*pi] by calculating the reminder after 2*pi modulo
division. This helps to improve calculation precision for large input
arguments on Intel.

-v2: Add limit_trig_input_range option to prog_key to update shader
     cache (Lionel)

Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16388>
 2022-05-13 06:47:53 +00:00
Emma Anholt
e9b491f9b5 gallium: Remove now-unused shader caps. 
The only interesting ones here were LOWER_IF_THRESHOLD (which previously
had connected to some lowering in GLSL that was broken in the face of side
effects), and FMA (which turned GLSL IR's fma() into TGSI_OPCODE_FMA
instead of MAD).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8044>
 2022-05-05 22:25:03 +00:00
Lionel Landwerlin
acf6bf88c0 iris: use new kernel uAPI to compute video memory 
v2: Use os_get_available_system_memory() when kernel memory region
    uAPI is not available (Lionel)

Cc: 22.1 <mesa-stable>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16210>
 2022-05-02 22:57:06 +00:00
Erik Faye-Lund
7ca1253932 gallium: rename ldexp shader-cap 
This is no longer TGSI specific, so let's rename it to reflect
reality.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
 2022-04-18 20:43:18 +00:00
Erik Faye-Lund
439c212a3c gallium: rename dfracexp/dldexp shader-cap 
This is no longer TGSI specific, so let's rename it to reflect
reality.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
 2022-04-18 20:43:18 +00:00
Erik Faye-Lund
3efd6d4bfe gallium: rename dround shader-cap 
This is no longer TGSI specific, so let's rename it to reflect
reality.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
 2022-04-18 20:43:18 +00:00
Erik Faye-Lund
9b545ea691 gallium: rename continue shader-cap 
This is no longer TGSI specific, so let's rename it to reflect
reality.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15922>
 2022-04-18 20:43:18 +00:00
Yonggang Luo
b2ece67f11 util: Rename PIPE_DEBUG_TYPE to UTIL_DEBUG_TYPE 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15657>
 2022-04-01 01:52:43 +00:00
Yonggang Luo
2ca6ef22f7 util: Rename pipe_debug_callback to util_debug_callback 
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15657>
 2022-04-01 01:52:43 +00:00
Erik Faye-Lund
ab26020017 gallium: rename window-space position cap 
This cap is no longer TGSI specific, so let's rename it to reflect
reality.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15448>
 2022-03-23 08:54:06 +00:00
Erik Faye-Lund
115298b71e gallium: rename ballot cap 
This cap is no longer TGSI specific, so let's rename it to reflect
reality.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
b3ce733da9 gallium: rename clock cap 
This cap is no longer TGSI specific, so let's rename it to reflect
reality.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
7984c5884c gallium: rename group-vote cap 
This cap is no longer TGSI specific, so let's rename it to reflect
reality.

Because the name got a bit vague when removing the TGSI-bits, let's add
some more details to the name.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
a6d7ead686 gallium: rename texture query samples cap 
This isn't specific to TGSI, so let's update the name to reflect
reality.

Because the name of the opcode was TGSI specific, let's pick a new one,
based on the naming of the PIPE_CAP_TEXTURE_QUERY_LOD cap.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
2dff9bea4f gallium: rename array-components cap 
This cap is no longer TGSI specific, so let's update the name to reflect
reality.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
350329feb1 gallium: rename sysval caps 
These aren't spiecic to TGSI any more, so let's rename them to reflect
reality.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
df40de91d9 gallium: rename fine derivative cap 
This is no longer TGSI specific, so let's rename it to reflect the
reality.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
2a8e11e101 gallium: rename pixel-coord caps 
These aren't specific to TGSI, so let's rename them to reflect the
reality.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:42 +00:00
Erik Faye-Lund
89797fac56 gallium: rename layer-viewport caps 
Similar to the previous commits, these aren't TGSI specific, so let's
drop TGSI from their name.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:41 +00:00
Erik Faye-Lund
8ac7dc9cf6 gallium: rename vs instance id cap 
This cap is no longer specific to TGSI, so let's rename it and update
the documentation to reflect that.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:41 +00:00
Erik Faye-Lund
f8809fbdb8 gallium: rename pack half-float cap 
This cap no longer has anything to do with TGSI, as the lowering happens
on GLSL IR, and applies just as much to NIR drivers. So let's rename
this cap and update the docs to reflect the current situation.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Acked-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15316>
 2022-03-17 16:44:41 +00:00
Alyssa Rosenzweig
d986731da9 iris,crocus,i915g: Don't stub flush_frontbuffer 
This callback is only intended for software rasterizers, layered drivers, and
other special drivers that go through the software winsys path. Remove the
unimplemented stubs from the Intel drivers.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Dave Airlie <airlied@redhat.com> [crocus]
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15118>
 2022-02-23 19:49:54 +00:00
Kenneth Graunke
413ea503ba iris: Disable PIPE_CAP_PREFER_BACK_BUFFER_REUSE 
This cap bit only affects DRI_PRIME setups.  Since iris now uses the
blitter to perform dGPU -> iGPU copies asynchronously, it's better to
always use at least two backbuffers so the 3D engine can start rendering
the next frame during the copy.

See commit d17e752857 where this change
was made for radeonsi.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13877>
 2022-02-09 07:45:43 +00:00
Lionel Landwerlin
2e3490dd0f iris: utrace/perfetto support 
v2: Fixup gpu_id computation, use minor of /dev/dri/* % 128 since we
    don't know whether we get card0 or renderD128 for instance.
    (Lionel)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com> (v1)
Acked-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13996>
 2022-01-14 20:17:44 +00:00
Jianxun Zhang
f43c7185e0 intel: remove chipset_id 
The chipset_id should be named after i915 ioctl that's called
to get the device id. In user space this field holds pci device
id in reality. We now have a pci_device_id queried from drm
instead using the ioctl, so there is no much reason to keep
the chipset_id for the same purpose.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
 2022-01-13 03:09:36 +00:00
Jianxun Zhang
d86989bf73 intel: use PCI info to compute device uuid 
With the new input from PCI bus and device fields, we can compute
device uuids in a multi-gpu system.

Signed-off-by: Jianxun Zhang <jianxun.zhang@linux.intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13936>
 2022-01-13 03:09:36 +00:00
Jason Ekstrand
8f3c100d61 intel/fs,vec4: Drop uniform compaction and pull constant support 
The only driver using these was i965 and it's gone now.  This is all
dead code.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14056>
 2021-12-10 21:20:47 +00:00
Dave Airlie
9bb375b0be intel/compiler: drop glsl options from brw_compiler 
Only the nir options are used now, since i965 was dropped,
the glsl options come from the state tracker

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14102>
 2021-12-07 08:52:36 +00:00
Juan A. Suarez Romero
38c953e287 gallium: add new PIPE_CAP_IMAGE_STORE_FORMATTED 
This capability is enabled for drivers supporting formatless image
writing in shader.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13409>
 2021-12-03 15:32:36 +00:00
Mike Blumenkrantz
c9a47c85da gallium: rename PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER 
this is now a bitfield enum for more functionality

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11984>
 2021-11-18 07:58:29 -05:00
Paulo Zanoni
a9c1cc63c6 iris: call brw_process_intel_debug_variable() earlier 
We're currently only calling it after creating the screen and the
bufmgr. There are a few cases where Iris checks for the DEBUG_BUFMGR
bit before we call brw_process_intel_debug_variable(), which means
intel_debug is 0 and so we don't run the debug code. Today, these are
all related to the creation of the workaround bo and its mmap.

I found this in a custom branch after I converted to INTEL_DEBUG an
environment variable that I had.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13780>
 2021-11-15 23:33:18 +00:00
Jason Ekstrand
419b02c90c anv,iris: Advertise a max 3D workgroup size of 1024^3 
On GFX version 12.5+ with COMPUTE_WALKER, this is the limit based on the
size of the HW packet.  On older HW, we can technically go a bit bigger
but there's not much point.  Technically, some hardware can support a
scalar workgroup size up to 2048 but most apps don't go any bigger than
1024.

As discussed on the merge request page, the current limit assumes
SIMD32, but it is unclear if we want to encourage applications to use
SIMD32 if it may lead to additional register spilling in shader
programs. Many applications have likely tuned for a limit of 1024
based on the OpenGL minimum limit, so it might not gain much by
advertising more than 1024.

Reworks:
 * Jordan: Use MIN2 and limit total invocations as well.
 * Jordan: Add second paragraph to commit message based on merge
   request discussion.

Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13538>
 2021-11-08 23:07:42 +00:00
Lionel Landwerlin
361b3fee3c intel: move away from booleans to identify platforms 
v2: Drop changes around GFX_VERx10 == 75 (Luis)

v3: Replace
   (GFX_VERx10 < 75 && devinfo->platform != INTEL_PLATFORM_BYT)
   by
   (devinfo->platform == INTEL_PLATFORM_IVB)
   Replace
   (devinfo->ver >= 5 || devinfo->platform == INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 >= 45)
   Replace
   (devinfo->platform != INTEL_PLATFORM_G4X)
   by
   (devinfo->verx10 != 45)

v4: Fix crocus typo

v5: Rebase

v6: Add GFX3, ILK & I965 platforms (Jordan)
    Move ifdef to code expressions (Jordan)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12981>
 2021-11-08 16:48:06 +00:00
Marek Olšák
cf9afc7b0c gallium: add missing point and line CAPs 
The returned values are the same as the GL frontend.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
 2021-11-08 14:37:49 +00:00
Marek Olšák
b80dca86c3 gallium: rename PIPE_CAPF_MAX_POINT_WIDTH -> MAX_POINT_SIZE 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13676>
 2021-11-08 14:37:49 +00:00
Lionel Landwerlin
a543a94404 intel/dev: fix subslice/eu total computations with some fused configurations 
When a device has its first slice/subslice fused off, we can't use the
number of slices/subslices to iterate the mask array.

v2: Fix spelling (Marcin)
    Use size_t for iterator (Marcin)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reported-by: Matt Roper <matthew.d.roper@intel.com>
Cc: <mesa-stable@lists.freedesktop.org>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5601
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10015>
 2021-11-05 10:22:18 +00:00
Jason Ekstrand
953a4ca6fe intel: Add has_bit6_swizzle to devinfo 
There's no good reason to have this rather complex check in three
drivers.

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13636>
 2021-11-04 18:51:04 +00:00