Commit Graph

68651 Commits

Author SHA1 Message Date
Ilia Mirkin
924ee3f408 gallium: add shader cap for dldexp/dfracexp support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:52 -05:00
Ilia Mirkin
899d779cb7 gallium: add a cap to enable double rounding opcodes
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:49 -05:00
Ilia Mirkin
12dedca523 gallium: add some more double opcodes to avoid unnecessary lowering
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 19:32:35 -05:00
Dave Airlie
1759689d18 docs/GL3.txt: softpipe now supports GL_ARB_gpu_shader_fp64
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:12:00 +10:00
Dave Airlie
8c6a0ebaad st/mesa: add st fp64 support (v7.1)
This adds support to the state tracker for
ARB_gpu_shader_fp64.

The details are explained in comments
within the code.

v2 : add double to int/unsigned conversion
v3: handle fp64 consts better
v4: use DRSQ
v4.1: add d2b
v4.2: drop DDIV

v5: split out some prep patches.
v5.1: add some comments.
v5.2: more comments

v6: simplify down the double instruction
    generation loop.

v7: Merge Ilia's two cleanup patches.
v7.1: minor fixups for Ilia patch + cleanups

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:06:56 +10:00
Dave Airlie
0178358a2d mesa/st_tgsi_to_glsl: prepare add_constant for fp64
This just moves stuff around a little to make the next patch
cleaner.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:06:47 +10:00
Dave Airlie
12150a5bee st/glsl_to_tgsi: convert dst to an array
This is just prep work for fp64 support where we need
an array of 2 dst values.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 10:05:52 +10:00
Dave Airlie
c442d0961e i965: just avoid warnings with fp64
This just fills in some blanks to avoid warnings in the i965 driver.

Reviewed-by: Chris Forbes <chrisf@ijw.co.nz>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 09:44:28 +10:00
Kenneth Graunke
75f6ed617f glsl: Add compute to _mesa_shader_stage_to_string(); use unreachable.
This is basically Ian's review feedback for my patch that added
_mesa_shader_stage_to_abbrev() - it just makes both consistent again.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2015-02-19 15:15:46 -08:00
Kenneth Graunke
5cdfa839c2 i965/vec4: Print "VS" or "GS" when compiles fail, not "vec4".
This is now trivial to do right.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:46 -08:00
Kenneth Graunke
e60318fbcd i965/vec4: Replace debug_flag with debug_enabled.
backend_visitor now handles this, so we can delete the vec4_visitor
specific code.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
eeacbc1a02 i965: Make scheduler cycle estimates use the proper stage name.
Previously, the vec4 backend labeled shaders as "vec4" - now it uses the
specific names "VS" and "GS".

The FS backend now correctly prints "VS" for vertex shaders (rather than
"fs").  It also prints "FS" instead of "fs" for fragment shaders;
preserving that behavior didn't seem essential.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
2bd139e18c i965/fs: Un-hardcode DEBUG_WM, "FS", and "fragment".
These code paths can (or will) be used for other shader stages.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
7e35a81264 i965: Create backend_visitor fields for debugging messages.
We introduce three new fields in backend_visitor:
- debug_enabled: whether or not INTEL_DEBUG & DEBUG_<stage flag>
- stage_name: "vertex", "fragment", etc. for use in messages
- stage_abbrev: "VS", "FS", etc. for use in messages

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
7c891e8ddd i965: Add a function to translate MESA_SHADER_* into DEBUG_* enums.
When compiling, we have a gl_shader_stage (MESA_SHADER_*) enum, and want
to know whether debugging is enabled for that stage.  This allows us to
easily translate it into the corresponding debug flag.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
7555d1bafb glsl: Create a _mesa_shader_stage_to_abbrev() function.
This is similar to _mesa_shader_stage_to_string(), but returns "VS"
instead of "vertex".

v2: Use unreachable() and add MESA_SHADER_COMPUTE (requested by Ian).

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
231267bf01 i965/fs: Use VARYING_SLOT checks rather than strcmp().
Comparing the location field is equivalent and more efficient.

We'll also need this when we start using NIR for ARB programs, as our
NIR converter will set the location field correctly, but probably won't
use the GLSL names for these concepts.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Kenneth Graunke
a07cd42f1e i965/fs: Remove type parameter from emit_vs_system_value().
Every VS system value has type D.  We can always add this back if that
changes, but for now, it's extra typing.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2015-02-19 15:15:45 -08:00
Dave Airlie
2e9f4eadfb glsl: add lowering for double divide to rcp/mul
It looks like no hw does div anyways, so we should just
lower at the GLSL level.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:58:06 +10:00
Dave Airlie
0e82817247 softpipe/tgsi: expose doubles for softpipe.
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:52:11 +10:00
Dave Airlie
fa43e0443e tgsi: add support for flt64 constants
These act like flt32 except they take up two slots, and you
can only add 2 x flt64 constants in one slot.

The main reason they are different is we don't want to match half a flt64
constants against a flt32 constant in the matching code, we need to make
sure we treat both parts of the flt64 as an single structure.

Cleaned up printing/parsing by Ilia Mirkin <imirkin@alum.mit.edu>

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:51:49 +10:00
Dave Airlie
3cd1338534 gallium: add double opcodes and TGSI execution (v4.2)
This patch adds support for a set of double opcodes
to TGSI. It is an update of work done originally
by Michal Krol on the gallium-double-opcodes branch.

The opcodes have a hint where they came from in the
header file.

v2: add unsigned/int <-> double
v2.1:  update docs.

v3: add DRSQ (Glenn), fix review comments (Glenn).

v4: drop DDIV
v4.1: cleanups, fix some docs bugs, (Ilia)
      rework store_dest and fetch_source fns. (Ilia)
4.2: fixup float comparisons (Ilia)

This is based on code by Michael Krol <michal@vmware.com>

Roland and Glenn also reviewed earlier versions.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2015-02-20 08:49:12 +10:00
Brian Paul
14b9bf630c gallium/util: indentation fix 2015-02-19 15:36:59 -07:00
Brian Paul
21c57a697f st/mesa: add GSL_TYPE_DOUBLE, new ir_unop_* switch cases
To silence compiler warnings about unhandled switch cases.
v2: move GSL_TYPE_DOUBLE case to the "Invalid type in type_size" section,
per Ilia.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 15:36:59 -07:00
Brian Paul
2f5597787c nir: add missing GLSL_TYPE_DOUBLE case in type_size()
To silence compiler warning about unhandled switch case.
v2: move GLSL_TYPE_DOUBLE to the "not reached" section, per Ilia.

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 15:36:59 -07:00
Brian Paul
62a8883f32 st/mesa: fix sampler view reference counting bug in glDraw/CopyPixels
Use pipe_sampler_view_reference() instead of ordinary assignment.
Also add a new sanity check assertion.

Fixes piglit gl-1.0-drawpixels-color-index test crash.  But note
that the test still fails.

Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 15:36:59 -07:00
Brian Paul
89c96afe3c swrast: fix multiple color buffer writing
If a fragment program wrote to more than one color buffer, the
first fragment color got replicated to all dest buffers.  This
fixes 5 piglit FBO tests, including fbo-drawbuffers-arbfp.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45348
Cc: "10.4, 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-19 15:36:59 -07:00
Brian Paul
fbac86ad2a mesa: remove unused _math_trans_4chan()
Reviewed-by: Matt Turner <mattst88@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2015-02-19 15:36:59 -07:00
Lucas Stach
5c1aac17ad install-lib-links: don't depend on .libs directory
This snippet can be included in Makefiles that may, depending on the
project configuration, not actually build any installable libraries.

In that case we don't have anything to depend on and this part of
the makefile may be executed before the .libs directory is created,
so do not depend on it being there.

Cc: "10.3 10.4 10.5" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
2015-02-19 10:02:02 -08:00
Francisco Jerez
6c34fd20be i965/vec4: Calculate register allocation q values manually.
This fixes a regression in the running time of Piglit introduced by
commit 78e9043475, which increased the
number of register allocation classes set up by the VEC4 back-end
from 2 to 16.  The algorithm used by ra_set_finalize() to calculate
them is unnecessarily expensive, do it manually like the FS back-end
does.

Reported-by: Mark Janes <mark.a.janes@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:09:12 +02:00
Francisco Jerez
35a77a148f i965: Don't compact instructions with unmapped bits.
Some instruction bits don't have a mapping defined to any compacted
instruction field.  If they're ever set and we end up compacting the
instruction they will be forced to zero.  Avoid using compaction in such
cases.

v2: Align multiple lines of an expression to the same column.  Change
    conditional compaction of 3-source instructions to an
    assertion. (Matt)
v3: The 3-source instruction bit 105 is part of SourceIndex on CHV.
    Add assertion that reserved bit 7 is not set. (Matt)
    Document overlap with UIP and 64-bit immediate fields.
v4: Make some more unmapped bit checks assertions. (Matt)

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
6c07279e5a i965: Handle F16TO32/F32TO16 with dword src/dst consistently on both back-ends.
Due to the way it's implemented in hardware, the F16TO32/F32TO16
instructions require the source/destination register to be of some
16-bit type in Align1 mode, while they require it to be some 32-bit
type in Align16 mode (and as an undocumented feature the high 16 bits
of the destination register are zeroed out in the case of the F32TO16
instruction on Gen7).  Make their behaviour consistent so you can
specify a 32 bit register type as source or destination and get
predictable results in the most significant bits no matter what access
mode is being used.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
437d401e63 i965/gen8: Fix F32TO16 in vec4 mode if the source and destination registers alias.
We cannot zero out the destination register if it overlaps with the
source.  Use an Align1 instruction instead to zero out the high 16
bits after the conversion to half float.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
509f58740c i965/fs: Replace ud_reg_to_w() with a more general helper function.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
63d6d09a3b i965/vec4: Don't attempt to reduce swizzles of send from GRF instructions.
Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Francisco Jerez
bda7698fce i965/vec4: Fix constant propagation across different types.
If the source type differs from the original type of the constant we
need to bit-cast it before propagating, otherwise the original type
information will be lost.  If the constant was a vector float there
isn't much we can do, because the result of bit-casting the component
values of a vector float cannot itself be represented as an immediate.

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 14:06:42 +02:00
Samuel Iglesias Gonsalvez
187ace73a9 glsl: A shader cannot redefine or overload built-in functions in GLSL ES 3.00
Create a new search function to look for matching built-in functions by name
and use it for built-in function redefinition or overload in GLSL ES 3.00.

GLSL ES 3.0 spec, chapter 6.1 "Function Definitions", page 71

  "A shader cannot redefine or overload built-in functions."

While in GLSL ES 1.0 specification, chapter 8 "Built-in Functions"

  "User code can overload the built-in functions but cannot redefine them."

So this check is specific to GLSL ES 3.00.

This patch fixes the following dEQP tests:

dEQP-GLES3.functional.shaders.functions.invalid.overload_builtin_function_vertex
dEQP-GLES3.functional.shaders.functions.invalid.overload_builtin_function_fragment
dEQP-GLES3.functional.shaders.functions.invalid.redefine_builtin_function_vertex
dEQP-GLES3.functional.shaders.functions.invalid.redefine_builtin_function_fragment

No piglit regressions.

Signed-off-by: Samuel Iglesias Gonsalvez <siglesias@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2015-02-19 10:05:33 +01:00
Eduardo Lima Mitev
19252fee46 mesa: Adds check for integer internal format and num samples in glRenderbufferStorageMultisample
Per GLES3 specification, section 4.4 Framebuffer objects page 198, "If
internalformat is a signed or unsigned integer format and samples is greater
than zero, then the error INVALID_OPERATION is generated.".

Fixes 1 dEQP test:
* dEQP-GLES3.functional.negative_api.buffer.renderbuffer_storage_multisample

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 09:35:41 +01:00
Eduardo Lima Mitev
dbc160a3f8 mesa: Returns correct error values from gl(Get)SamplerParameter*() on GL-ES 3.0+
'3.8.2 Sampler Objects' section of the GL-ES 3.0 specification states:

    "An INVALID_OPERATION error is generated if sampler is not the name
    of a sampler object previously returned from a call to GenSamplers."

In desktop GL, an GL_INVALID_VALUE is returned instead.

Fixes 6 dEQP failing tests:
* dEQP-GLES3.functional.negative_api.shader.get_sampler_parameteriv
* dEQP-GLES3.functional.negative_api.shader.get_sampler_parameterfv
* dEQP-GLES3.functional.negative_api.shader.sampler_parameteri
* dEQP-GLES3.functional.negative_api.shader.sampler_parameteriv
* dEQP-GLES3.functional.negative_api.shader.sampler_parameterf
* dEQP-GLES3.functional.negative_api.shader.sampler_parameterfv

Reviewed-by: Matt Turner <mattst88@gmail.com>
2015-02-19 09:35:37 +01:00
Ilia Mirkin
e8e22cf65f glsl: remove bogus 'd' constant qualifiers
0.0 is a double anyways. Apparently my version of gcc was happy with
0.0d as well, but this is not true of all compilers.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=89218

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 01:45:54 -05:00
Ilia Mirkin
0cade4ea2b st/mesa: don't die for ETC2 formats when no driver support
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 01:41:28 -05:00
Eric Anholt
2a135c470e nir: Add an ALU op builder kind of like ir_builder.h
v2: Rebase on the nir_opcodes.h python code generation support.
v3: Use SSA values, and set an appropriate writemask on dot products.
v4: Make the arguments be SSA references as well.  This lets you stack up
    expressions in the arguments of other expressions, at the cost of
    having to insert a fmov/imov if you want to swizzle.  Also, add
    the generated file to NIR_GENERATED_FILES.
v5: Use more pythonish style for iterating the list.
v6: Infer the size of the dest from the size of the srcs, and auto-swizzle
    a single small src out to the appropriate size.
v7: Add little helpers for initializing the struct, add a typedef for the
    struct like other nir types have.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> (v6)
Reviewed-by: Connor Abbott <cwabbott0@gmail.com> (v7)
2015-02-18 22:28:42 -08:00
Ilia Mirkin
de798bb937 docs: mark ARB_gpu_shader_fp64 as done in core
No driver support... yet. But core is ready.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Ilia Mirkin
e790a3c910 glsl/tests: add DOUBLE types
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 00:28:35 -05:00
Ilia Mirkin
2e7e7b8af6 glsl: add a lowering pass for frexp/ldexp with double arguments
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2015-02-19 00:28:35 -05:00
Dave Airlie
fffbf37124 glsl: lower double optional passes (v2)
These lowering passes are optional for the backend to request, currently
the TGSI softpipe backend most likely the r600g backend would want to use
these passes as is. They aim to hit the gallium opcodes from the standard
rounding/truncation functions.

v2: also lower floor in mod_to_floor

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
e6354a2850 glsl: implement double builtin functions
This implements the bulk of the builtin functions for fp64 support.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
2e626318e0 glsl/lower_instructions: add double lowering passes
This lowers double dot product and lrp to fma.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Dave Airlie
8be5ee23de glsl: enable/disable certain lowering passes for doubles
We want to restrict some lowering passes to floats only,
and enable other for doubles.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00
Tapani Pälli
3bbaf71994 glsl: validate output types for shader stages
Patch fixes Piglit test:
   arb_gpu_shader_fp64/preprocessor/fs-output-double.frag

and adds additional validation for shader outputs.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2015-02-19 00:28:35 -05:00