Commit Graph

143 Commits

Author SHA1 Message Date
Samuel Pitoiset
ebab5c8ff4 radv: use vk_zalloc instead of vk_alloc+memset
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-11-13 11:05:35 +01:00
Samuel Pitoiset
cd64a4f705 radv: use vk_error() everywhere an error is returned
For consistency and it might help for debugging purposes.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-11-13 11:05:26 +01:00
Dave Airlie
bec716e844 radv: emit esgs ring size in one place.
This register is the same on all gpus so far, so emit it in one
place and also for the pre-gfx9 gpus set the value in the pipeline
creation.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-13 07:17:09 +00:00
Dave Airlie
031e591923 radv: move calculating vs out info regs into pipeline.
This moves some calculations of register values into the pipeline
construction, it saves looking at outinfo in the cmd buffer emit.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-13 07:16:53 +00:00
Dave Airlie
3bf8be41b8 radv: pre-calculate user_data_0 registers and store in pipeline
There's no point recalculating these the whole time on descriptor
emission, just store them at pipeline creation.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-11-06 21:44:49 +00:00
Alex Smith
de88979413 radv: Implement VK_AMD_shader_info
This allows an app to query shader statistics and get a disassembly of
a shader. RenderDoc git has support for it, so this allows you to view
shader disassembly from a capture.

When this extension is enabled on a device (or when tracing), we now
disable pipeline caching, since we don't get the shader debug info when
we retrieve cached shaders.

v2: Improvements to resource usage reporting
v3: Disassembly string must be null terminated (string_buffer's length
    does not include the terminator)
v4: Fixed LDS reporting. (Bas)

Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-29 00:28:45 +02:00
Samuel Pitoiset
b1e31c1911 radv: store the dynamic state mask into radv_dynamic_state
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-26 09:37:03 +02:00
Bas Nieuwenhuizen
61a9ef4ab1 radv: Compute ac keys from pipeline key.
The beginning of the end for the shader keys. Not entirely sure
what I'm going to replace them with for the compiler though, so this
is the first step.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-10-26 00:28:40 +02:00
Bas Nieuwenhuizen
49d035122e radv: Add single pipeline cache key.
To decouple the key used for info gathering and the cache from
whatever we pass to the compiler.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-10-26 00:28:40 +02:00
Bas Nieuwenhuizen
de38491a57 radv: Don't compute as_ls/as_es before hashing.
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-10-26 00:28:40 +02:00
Samuel Pitoiset
9711979df0 radv: print NIR before LLVM IR and disassembly
It's still printed after linking, but it makes more sense to
have SPIRV->NIR->LLVM IR->ASM.

Fixes: f0a2bbd1a4 (radv: move nir print after linking is done)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-25 11:46:53 +02:00
Timothy Arceri
767ca5bdf1 radv: enable lower to scalar nir pass
This will allow dead components of varyings to be removed.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-25 17:02:40 +11:00
Timothy Arceri
f0a2bbd1a4 radv: move nir print after linking is done
We now have linking optimisations so we want to delay dumping the
nir until after these are complete.

Fixes: 06f05040eb (radv: Link shaders)
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-24 10:41:38 +11:00
Timothy Arceri
013313cf89 radv: clone meta shaders before linking
The IR is reused in different pipeline combinations so we need
to clone it to avoid link time optimistaions messing up the
original copy.

Fixes: 06f05040eb (radv: Link shaders)

Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-24 09:27:40 +11:00
Dave Airlie
da9c3cd3ee radv/ac/nir: only emit tess factors to storage if tes reads them
Otherwise we just need to write them to the tf ring.

this seems to improve the tessellation demo on Bonarie
~2190->~2230 fps

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-23 07:10:29 +10:00
Bas Nieuwenhuizen
67648c0faa radv: Don't compile shaders when they are cached already.
When the gs_copy_shader is NULL (due to an incomplete cache), but
the main shaders are found, we still do the nir, but we shouldn't
compile the shaders again. For merged shaders we should also account
for the missing shaders.

Fixes: ce03c119ce 'radv: Add code to compile merged shaders.'
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-21 22:29:34 +02:00
Bas Nieuwenhuizen
3bf954b28e radv: Don't check for max GL GS invocations.
We specify 127 instead of 32 as the limit in vulkan.

Fixes: 6bc42855f9 'radv: enable GS on GFX9'
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-21 22:29:09 +02:00
Bas Nieuwenhuizen
73749caf0e radv: calculate and emit GFX9 GS registers to pipeline state.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:23:47 +01:00
Dave Airlie
5bc5e07d81 radv: fixup tess eval shader when combined.
This fixes some access to the tess eval shader when it's combined
with geometry on gfx9.

This is a review of Bas's commit:
radv: Prevent crashing by accessing TES for VGT reuse depth.

Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-20 06:11:10 +01:00
Bas Nieuwenhuizen
e6acc20b6a radv: Set VGT_GS_MODE properly for gfx9
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-20 05:55:11 +01:00
Dave Airlie
99281c1e8f radv: ensure correct outinfo is picked.
This struct used to rely on being in a union, it isn't anymore,
so we have to pick the correct outinfo struct now.

This should fix a regression since the union became a struct.

dEQP-VK.tessellation.geometry_interaction.point_size.vertex_set_geometry_set

Fixes: 6078a3bd51 (ac/nir: Allow ac_shader_variant_info to contain info about multiple stages.)
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-20 14:44:09 +10:00
Timothy Arceri
5549b47d7b radv: stop redundant setting of active_stages
We already set it when above in the nir compilation loop.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
2017-10-20 08:01:26 +11:00
Bas Nieuwenhuizen
b096245030 radv: Remove remaining hard coded references to VS.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:25:31 +02:00
Bas Nieuwenhuizen
91b033f4f6 radv: Update GFX9 user data regs for GS/tess.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:25:27 +02:00
Bas Nieuwenhuizen
ce03c119ce radv: Add code to compile merged shaders.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-19 22:25:23 +02:00
Alex Smith
2cccc74f56 radv: Set active_stages after getting cached shaders
Fixes: 7d45d22fdd ("radv: switch to using radv_create_shaders()")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 20:37:10 +02:00
Alex Smith
f557673237 radv: Don't free NIR shaders if tracing
Fixes a crash while generating a hang report.

Fixes: 7d45d22fdd ("radv: switch to using radv_create_shaders()")
Signed-off-by: Alex Smith <asmith@feralinteractive.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 20:37:10 +02:00
Timothy Arceri
e5e9e21e9f radv: don't create dummy fs when compiling compute stage
Fixes: d1c9f30d7f "radv: add radv_create_shaders() helper"

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 22:47:53 +11:00
Bas Nieuwenhuizen
06f05040eb radv: Link shaders.
Here we make use of NIR the linking helpers to remove unused
varyings.

Sascha Willems demo results:

computecullandlod 39 -> 41 fps
pipelines ~6100 -> ~6200 fps

Signed-off-by: Bas Nieuwenhuizen <basni@google.com>
Signed-off-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2017-10-18 09:19:35 +11:00
Timothy Arceri
dbbf10541b radv: reuse the multiple shader store & load functions for gs copy variant
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 09:19:35 +11:00
Timothy Arceri
351f9dde60 radv: remove some now unused shader compile code
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 09:19:35 +11:00
Timothy Arceri
7d45d22fdd radv: switch to using radv_create_shaders()
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 09:19:35 +11:00
Bas Nieuwenhuizen
d1c9f30d7f radv: add radv_create_shaders() helper
This is a combined shader creation helper than will help us to
create the shaders for each stage at once. This will allow us to
do some link time optimisations.

Signed-off-by: Timothy Arceri <tarceri@itsqueeze.com>
Acked-by: Dave Airlie <airlied@redhat.com>
2017-10-18 09:19:35 +11:00
Timothy Arceri
56998558f4 radv: reorder init function calls
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-18 09:19:35 +11:00
Dave Airlie
fb972ed4e5 radv: take unsafe_math and sisched into account when hashing shaders.
We want to generate different variants for sisched and unsafe_math
shader variants, so add them to the hash key.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-10-12 23:46:55 +01:00
Timothy Arceri
7664aaf331 radv: remove duplicate debug_flags field
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-12 08:52:38 +11:00
Marek Olšák
7b697c8b78 amd: move r600d_common.h into r600g
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-09 16:27:06 +02:00
Marek Olšák
76997e9133 radeonsi: shrink r600d_common.h and stop using it
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-10-09 16:27:05 +02:00
Samuel Pitoiset
7824cb4b03 radv: configure VGT_VERTEX_REUSE at pipeline creation
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-09 10:06:19 +02:00
Samuel Pitoiset
b09b43b166 radv: do not need to zero-init ds/raster states
Already done when creating the pipeline.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-09 10:06:17 +02:00
Samuel Pitoiset
6732a8369a radv: set ALPHA_TO_MASK_ENABLE at blend state init
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-09 10:05:06 +02:00
Bas Nieuwenhuizen
0c90ca7d37 radv: Make tess winding order a bit more intuitive.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-06 01:41:29 +02:00
Bas Nieuwenhuizen
c62afd094d radv: Allow setting the domain origin in tess.
Reviewed-by: Dave Airlie <airlied@redhat.com>
2017-10-06 01:41:29 +02:00
Samuel Pitoiset
a2a350a3be radv: dump NIR when a GPU hang is detected
This looks a bit ugly to me, but the existing codepath
is not terribly elegant as well.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-10-04 19:37:08 +02:00
Bas Nieuwenhuizen
bf0397b6f5 Revert "Revert "radv: fallback to an in-memory cache when no pipline cache is provided""
I tested this 10 times with
./deqp-vk --deqp-case=dEQP-VK.texture.filtering.3d.formats.r4g4b4a4*

and one full run of CTS, seems the issue is gone.

Also reduces CTS runtime by 30% or so.

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
2017-09-25 15:36:19 +02:00
Samuel Pitoiset
6f8c40734b radv: make radv_pipeline_init() static
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-25 10:46:59 +02:00
Nicholas Miell
1f25436079 radv: Implement VK_AMD_rasterization_order
Tested with AMD's Anvil OutOfOrderRasterization demo on a RX 560.

Signed-off-by: Nicholas Miell <nmiell@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-21 18:10:00 +02:00
Jason Ekstrand
fc91cbe20b spirv: Flip the tessellation winding order
It's not SPIR-V that's backwards from GLSL, it's Vulkan that's backwards
from GL.  Let's make NIR consistent with the source language and do the
flipping inside the Vulkan driver instead.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2017-09-20 17:21:06 -07:00
Samuel Pitoiset
80b8d9f7e7 radv: add radv_shader_dump_stats() helper
To dump the shader stats when a hang is detected.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
2017-09-14 10:37:57 +02:00
Dave Airlie
f2d0f587ca radv: work out a base ia_multi_vgt_param.
This just reduces the calculations a bit further.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2017-09-11 23:55:15 +01:00