Commit Graph

185773 Commits

Author SHA1 Message Date
Eric Engestrom
e9fb4d951b ci/deqp: split vk/gl/gles patches
All files are identical copies for now, but this allows changing one
without touching the others.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
2024-03-04 16:53:58 +00:00
Eric Engestrom
74bcb91a91 ci/deqp: drop zlib url patch
It's no longer necessary, and removing it now simplifies the diff later.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27473>
2024-03-04 16:53:57 +00:00
Lionel Landwerlin
f3b0330fbc anv: fix helper usage for CmdUpdateBuffer()
We created a new helper for things that don't need to be indexed from
the dynamic state pool. This allocation got missed.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 82d772fa9b ("anv: create new helper for small allocations")
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27966>
2024-03-04 16:24:24 +00:00
Oskar Viljasaar
f9acfeeb59 compiler/types: Fix glsl_dvec*_type() helpers
Commit 90e364edb0 contained a typo in the glsl_dvec4_type() helper,
instead returning a glsl_ivec4_type. As an ivec4 is 2x smaller than
a dvec4, this also broke piglit sanity on crocus/hsw.

This also fixes the dvec2 helper, though it has not been specifically
tested anywhere.

Fixes: 90e364edb0 ("compiler/types: Add a few more helpers to get builtin types")

Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27917>
2024-03-04 15:22:32 +00:00
Sathishkumar S
0fe5ad708d radeonsi/vcn: avoid hard-coding the number of jpeg instance
use the number of jpeg instances from query to create as many submission ctx

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27884>
2024-03-04 13:41:56 +00:00
Sathishkumar S
f3ab454f07 ac/gpu_info: query the number of ip instance
query the number of ip instances for VCN and JPEG

v2: use num_queues and remove new variable (Marek)
v3: remove whitespace (Leo)
v4: remove redundant print jpeg_decode (Marek)

Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27884>
2024-03-04 13:41:56 +00:00
Patrick Lerda
29df85788a r300: fix constants_remap_table memory leak
For instance, this issue is triggered with
"piglit/bin/object-namespace-pollution glBitmap program -auto -fbo":
Direct leak of 112 byte(s) in 7 object(s) allocated from:
    #0 0x7f472540e7ef in __interceptor_malloc (/usr/lib64/libasan.so.6+0xb17ef)
    #1 0x7f471a9ce18f in rc_remove_unused_constants ../src/gallium/drivers/r300/compiler/radeon_remove_constants.c:101
    #2 0x7f471a9b0836 in rc_run_compiler_passes ../src/gallium/drivers/r300/compiler/radeon_compiler.c:476
    #3 0x7f471a9b0ad5 in rc_run_compiler ../src/gallium/drivers/r300/compiler/radeon_compiler.c:498
    #4 0x7f471a9ec862 in r3xx_compile_fragment_program ../src/gallium/drivers/r300/compiler/r3xx_fragprog.c:172
    #5 0x7f471a9e1ab2 in r300_translate_fragment_shader ../src/gallium/drivers/r300/r300_fs.c:516
    #6 0x7f471a9e6303 in r300_pick_fragment_shader ../src/gallium/drivers/r300/r300_fs.c:591
    #7 0x7f471a9544fe in r300_create_fs_state ../src/gallium/drivers/r300/r300_state.c:1073
    #8 0x7f4718f2ebe5 in st_create_fp_variant ../src/mesa/state_tracker/st_program.c:1070
    #9 0x7f4718f374b5 in st_get_fp_variant ../src/mesa/state_tracker/st_program.c:1116
    #10 0x7f4718f38273 in st_precompile_shader_variant ../src/mesa/state_tracker/st_program.c:1281
    #11 0x7f4718f38273 in st_finalize_program ../src/mesa/state_tracker/st_program.c:1345
    #12 0x7f4718f389e9 in st_program_string_notify ../src/mesa/state_tracker/st_program.c:1378
    #13 0x7f47199d9f99 in set_program_string ../src/mesa/main/arbprogram.c:413

Fixes: 1c2c4ddbd1 ("r300g: copy the compiler from r300c")
Signed-off-by: Patrick Lerda <patrick9876@free.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27957>
2024-03-04 13:00:00 +00:00
Eric Engestrom
dfc9656425 softpipe: update expectations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27951>
2024-03-04 12:01:04 +00:00
David Heidelberg
31ef5b203f ci: re-enable Collabora farm after maintenance
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27949>
2024-03-04 11:40:35 +01:00
Eric Engestrom
1e8642ebbe zink+radv: update navi31 expectations (one test fixed)
Fixed by some commit between 0c95d39309 and 3d38c9597f.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27947>
2024-03-04 09:26:58 +00:00
Corentin Noël
b6962bbfc8 zink: Return early if the file descriptor could not have been duplicated/acquired
Do not continue and call drmIoctl on an invalid file descriptor.

Fix defect reported by Coverity Scan.

Argument cannot be negative

The negative argument will be interpreted as a very large unsigned value.

CID: 1544377
Cc: mesa-stable
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27788>
2024-03-04 09:10:29 +00:00
Corentin Noël
da2f393dda venus: enable VK_EXT_attachment_feedback_loop_layout
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27886>
2024-03-04 08:52:07 +00:00
Corentin Noël
6746c3483b venus: sync protocol for VK_EXT_attachment_feedback_loop_layout
Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27886>
2024-03-04 08:52:07 +00:00
Corentin Noël
bc11e6ee8d glsl: Ensure that we are dealing with ir_variable and ir_rvalue
Use the built-in function from ir_instruction to make sure that we are actually
not casting to anther type by mistake.

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27114>
2024-03-04 08:03:55 +00:00
Erik Faye-Lund
d795bd380a glsl: Make error_value a real ir_rvalue type
It exposes a type so let it be a real ir_rvalue instead of abusing ir_type_unset.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27114>
2024-03-04 08:03:55 +00:00
Samuel Pitoiset
a38e7f127a radv: preserve streamout_buffers user SGPR for VS/TES + GS compiled separately
Otherwise, VS or TES could overwrite it but it needs to be preserved
if GS reads it.

This fixes the remaining NGG streamout bug on RDNA3 with VKCTS and ESO.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27914>
2024-03-04 07:38:06 +00:00
Timothy Arceri
eefd836ebc glsl: make use of nir recursion detection
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27841>
2024-03-04 05:40:55 +00:00
Timothy Arceri
38eb850883 glsl: move function inlining out of glsl_to_nir()
This will allow us to do more of the function linking work in nir
in the future.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27841>
2024-03-04 05:40:55 +00:00
Timothy Arceri
f7a664754f glsl: add nir version of function recursion detection
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27841>
2024-03-04 05:40:55 +00:00
Timothy Arceri
eecd7504a8 glsl: add missing define to linker_util.h
Avoids compiler warning in files that use linker_util.h but not
the set util.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27841>
2024-03-04 05:40:55 +00:00
Timothy Arceri
edf242f825 nir: add some nir_parameter fields
These will be used in future to do more validation on functions as
the glsl nir linker is expanded. The first use is in the following
patch.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27841>
2024-03-04 05:40:55 +00:00
Saleemkhan Jamadar
4ed4058910 radeonsi/vcn: set jpeg reg version for gfx 1151
select appropriate jpeg reg version for gfx 1151

Co-authored-by: Alan Liu <haoping.liu@amd.com>
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27811>
2024-03-04 04:43:53 +00:00
Yifan Zhang
4ed8931164 radv: initialize video decoder for GFX11.5.1
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27811>
2024-03-04 04:43:53 +00:00
Yifan Zhang
8446604dd4 amd: Add code to enable gfx11.5.1
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27811>
2024-03-04 04:43:53 +00:00
Vignesh Raman
e4d8b4592f ci: disable Collabora's farm due to maintenance
Planned downtime in the farm as follows:
* Start: 2024-03-04 08:00 UTC
* End: 2024-03-04 14:00 UTC

Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27915>
2024-03-04 03:16:11 +00:00
Timothy Arceri
39052dabf9 glsl: don't inline functions in glsl ir
Everthing is now in place for nir and glsl to nir to handle this
stuff for us.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27108>
2024-03-04 11:31:21 +11:00
Timothy Arceri
c6c150b4cd glsl_to_nir: support conversion of opaque function params
Here we can assume anything that is not an input is bindless.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27108>
2024-03-04 11:31:21 +11:00
Timothy Arceri
de7574f70a glsl_to_nir: support conversion of struct/array function returns
This adds support for array and struct function returns in the glsl
to nir pass allowing us to avoid extra calls to the glsl IR
optimisation loop.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27108>
2024-03-04 11:31:20 +11:00
Timothy Arceri
fac9b1c594 glsl_to_nir: support conversion of struct/array function params
This adds support for array and struct function params in the glsl
to nir pass allowing us to avoid extra calls to the glsl IR
optimisation loop.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27108>
2024-03-04 11:31:20 +11:00
Timothy Arceri
7afce96b80 glsl_to_nir: merge function param handling
Here we remove the special handling for input params that was hard
to work with and unite it with the output and inout params.

Here a mediump test needs to be updated to what is a more expected
outcome anyway.

We also need to update the code that inserts software f64 to the
new way input params are handled.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27108>
2024-03-04 11:31:20 +11:00
Eric Engestrom
5a852bd24c radeonsi/ci: add vangogh piglit flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27941>
2024-03-03 20:34:59 +00:00
Eric Engestrom
176f9b2fbe r300/ci: add flakes
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27940>
2024-03-03 19:45:25 +00:00
Eric Engestrom
7ba43413b9 zink+anv: update expectations
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27937>
2024-03-02 20:57:11 +00:00
Eric Engestrom
59cccade3a freedreno/ci: add another a618 flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27935>
2024-03-02 15:48:15 +00:00
Eric Engestrom
f703aac4ee rpi3/ci: update expectations for vc4-rpi3-gl-piglit-full:arm32 2/4
This job very often hangs (hence why it's split into 4), but it managed
to finish once and failed because this test is now skipped instead of
failing:
https://gitlab.freedesktop.org/mesa/mesa/-/jobs/55772960

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27934>
2024-03-02 15:24:22 +00:00
Eric Engestrom
7016538cf0 panfrost/ci: skip dEQP-GLES31.functional.copy_image.non_compressed.* on t760 as they hang
e.g. https://gitlab.freedesktop.org/mesa/mesa/-/jobs/55771063

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27933>
2024-03-02 13:33:08 +00:00
Eric Engestrom
e5bbf4975f iris/ci: add pbuffer flakes for amly, same as apl and glk
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27932>
2024-03-02 13:08:24 +00:00
Eric Engestrom
3328e9cf0f r300/ci: add another tex-miplevel-selection flake
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27930>
2024-03-02 12:44:07 +00:00
Eric Engestrom
4be5cb2ccb r300/ci: group tex-miplevel-selection flakes together
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27930>
2024-03-02 12:43:50 +00:00
Kenneth Graunke
63d2aa4eb6 intel/brw: Mark FIND[_LAST]_LIVE_CHANNEL as not writing the flag
brw_lower_find_live_channel doesn't actually write a flag register,
but elk_find_live_channel notes that the flag was used on Gfx7.

This allows more CSE on FIND[_LAST]_LIVE_CHANNEL.

shader-db and fossil-db on Alchemist show minor reductions in cycles
and instruction count, a few minor increases, but it doesn't seem to
be a large effect in either direction.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27862>
2024-03-01 17:18:30 -08:00
Anton Bambura
2ece531e33 docs/panfrost: Document Mali-T600 support
Signed-off-by: Anton Bambura <jenneron@postmarketos.org>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27519>
2024-03-01 23:26:57 +00:00
Anton Bambura
0129b3ff79 panfrost: Enable Mali-T600
It works since !27515

Signed-off-by: Anton Bambura <jenneron@postmarketos.org>
Acked-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27519>
2024-03-01 23:26:57 +00:00
Caio Oliveira
337641cfcc intel/compiler: Fix SIMD lowering when instruction needs a larger SIMD
When lower_simd_width() encounters an instruction that needs a larger
SIMD, for example SHADER_OPCODE_TXS_LOGICAL in Gfx4 needs at least
SIMD16.  In this case the builder needs to be at least as large as
max_width, otherwise the group() setup will assert.

Turns out this did not assert before "by accident", since it was
relying on the default fs_visitor builder that had a dispatch width of 64,
a bogus placeholder value, expected not to be used.

However, when we changed the code to remove that builder (and the bogus
value), we created a new builder in the pass shader dispatch_width --
which work fine except in the case where we want to "lower" the SIMD above
the shader dispatch width.  The fix is to also consider the already
calculated max_width when creating the builder.

Fixes: 5b8ec015f2 ("intel/compiler: Don't use fs_visitor::bld in remaining places")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10338
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27782>
2024-03-01 22:54:57 +00:00
Kenneth Graunke
ad37622a8f intel/brw: Delete legacy texture opcodes
We first generate the logical opcodes, and these days fully lower to
SHADER_OPCODE_SEND.  In the past, we lowered to a non-logical variant
and handled that in the generator.  These days, we were just using the
non-logical opcodes as an awkward intermediate opcode change during
the lowering...which isn't really necessary at all.

This patch eliminates them by using the original logical opcodes.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27908>
2024-03-01 22:19:51 +00:00
Kenneth Graunke
19248f48eb intel/brw: Allow CSE on TXF_CMS_W_GFX12_LOGICAL
This was missed when adding the new XeHP variant of the opcode.

Fixes: 261dd6c8 ("intel/compiler: Add new variant for TXF_CMS_W")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27908>
2024-03-01 22:19:51 +00:00
Kenneth Graunke
45a5e4c0c4 intel/brw: Delete SHADER_OPCODE_TXF_UMS
Nothing seems to generate this anymore.  I guess we always use CMS.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27908>
2024-03-01 22:19:51 +00:00
Kenneth Graunke
601ef12467 intel/brw: Delete SHADER_OPCODE_TXF_CMS[_LOGICAL]
We always use the wide variant (_W) on hardware this compiler supports.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27908>
2024-03-01 22:19:50 +00:00
Kenneth Graunke
494eee1337 intel/brw: Change unit tests to use TEX_LOGICAL instead of TEX
We're not really doing any fancy texturing here, just emitting a TEX
instruction that writes multiple destination registers.  I plan to
remove the non-logical TEX instruction in the next commit, so we swap
these over to use the logical version instead.  It should work just as
well for the purposes of the test.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27908>
2024-03-01 22:19:50 +00:00
Roland Scheidegger
e03e593143 auxiliary/rtasm: fix unaligned stores
Unaliged stores are unspecified behavior according to C rules, hence
address sanitizers may complain. Even though this worked fine in
practice (it's almost impossible here for the compiler to do something
"wrong" even if it assumes the store is aligned, given such stores work
just fine on x86), we should follow the rules.
The widely accepted solution for this (it may be somewhat surprising
you can't actually do unaligned assignments explicitly somehow in C)
nowadays is to just use memcpy(). The compiler should figure out (at
least with optimizations enabled) it's just a trivial store and
optimize it back to a single cpu instruction, while still satisfying
asan. (I've verified that even in debug builds the memcpy() is actually
optimized away anyway, I suspect there's some compiler flags somewhere
forcing this behavior.)

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10208

Reviewed-by: Jose Fonseca <jose.fonseca@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27896>
2024-03-01 21:44:52 +00:00
Friedrich Vock
e7d78a7b87 vulkan/runtime: Allow more than 8 DRM devices
Some people seem to have systems with more than 8 GPUs installed at
once. 256 is the maximum number of devices returned by libdrm, so using
this seems like a good choice for now.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27901>
2024-03-01 21:18:44 +00:00