Commit Graph

143366 Commits

Author SHA1 Message Date
Tapani Pälli
e47b72e931 crocus: take a reference to memobj bo in crocus_resource_from_memobj
This is the same fix as commit 2d87ea3166 for iris driver.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10609>
2021-08-09 05:38:50 +03:00
Emma Anholt
13677a9092 i915g: Reapply clang-format.
Missed this in 2008ec8a43 ("i915g: Fix writemasking of SEQ/SNE/SSG.")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12250>
2021-08-09 04:40:21 +00:00
Emma Anholt
01e9824997 i915g: Use the devmaster quadratic approximation for sin/cos.
11 instructions, but now processes up to 4 channels at once (since TGSI
splits to scalar for these math ops) while being higher accuracy.
Previously we used 6 instructions per channel, but it didn't look like a
sine wave.  i915c managed it in 9 instructions per scalar channel, thanks
to avoiding an extra mov we do for the fabs (should be fixable), and
avoiding an extra MUL (maybe just needs reassociation of our immediates?).
But, the ALU count win from doing 4 channels at once will be way more
important for making sure that programs compile than those 2 ALU ops, plus
now we do it in NIR instead of assembly.

Closes: #4981
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12250>
2021-08-09 04:40:21 +00:00
Dmitry Baryshkov
f800b9182b freedreno/regs: add bit to control continuous clock with 7nm PHYs
7nm PHYs need another special bit set in DSI_LANE_CTRL to enable
continuous DSI clock. Document this bit.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11219>
2021-08-08 20:15:42 +00:00
Filip Gawin
fd9310f885 docs: make most important part of bugs.rst easier to find
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12124>
2021-08-08 19:53:15 +00:00
Antonio Caggiano
a694541709 pps: Restore documentation
Restore part of the perfetto documentation deleted by mistake.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11846>
2021-08-08 19:48:38 +00:00
Thong Thai
3cafe333e9 frontends/va/postproc: Keep track of deinterlacing method being used
When transcoding a video, the context used by decode/postproc process
might be different from that of the encoder, but we encoder needs to
know if deinterlacing was used.

Fixes: c5088b4972 ("gallium: Fix VAAPI postproc blit")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12251>
2021-08-08 14:06:54 +00:00
Thong Thai
5dace8e0fb gallium/util: add half texel offset param to util_compute_blit
Fixes an issue where the video image is blurry after blitting.

Fixes: c5088b4972 ("gallium: Fix VAAPI postproc blit")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12251>
2021-08-08 14:06:54 +00:00
Thong Thai
675508dd81 gallium/auxiliary/vl: Add additional deinterlace enum and tracking
Add additional deinterlace enums and a deinterlace field to the
vl_compositor struct, so we can keep track of which deinterlacing
algorithm is currently being used, if any.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12251>
2021-08-08 14:06:54 +00:00
Bas Nieuwenhuizen
30a359d633 util/fossilize_db: Add extra flock mutex.
The flock is per-fd, not per thread, and we do it outside of the main mutex. This was
done to avoid having to wait in the mutex, but we can get a case where one ends up running
the body with the flock unlocked.

Fix this by adding a mutex that doesn't need to be locked for reads.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
2021-08-08 13:34:42 +02:00
Bas Nieuwenhuizen
75266ee44a util/fossilize_db: Unlock the cache file if the entry already exists.
Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
2021-08-08 13:34:39 +02:00
Bas Nieuwenhuizen
1c4dce1aa7 util/fossilize_db: Use uint64_t for file size.
For those 32-bit systems with 4G of cache.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
2021-08-08 13:34:35 +02:00
Bas Nieuwenhuizen
d2d642cc01 util/fossilize_db: Only allocate entries after full read.
Should void leaking entries on read failure.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
96bfefe8d1 util/fossilize_db: Be conservative about header length check for locking.
Don't anticipate seeing any partial written headers but just in case we
should probably wait on the lock to make sure whatever header was being
written is finished being written.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
3091277052 util/fossilize_db: Flush files after header write.
We should probably flush before we unlock the file again.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
57ca07455c util/fossilize_db: Reset file position to parsed_offset on cache_offset read failure.
Otherwise we might restart reading from the middle of the entry.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
3c51a3aa95 util/fossilize_db: Update parsed_offset correctly.
If things went perfectly parsed_offset was never updated for the
final entry and we'd seek_set to the start of the last entry. Is
fun when appending to the file next.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
2021-08-07 20:06:31 +00:00
Vinson Lee
87efa1ee22 spirv_to_dxil: Fix missing-prototypes build error.
../src/microsoft/spirv_to_dxil/spirv_to_dxil.c: At top level:
../src/microsoft/spirv_to_dxil/spirv_to_dxil.c:200:1: error: no previous prototype for ‘spirv_to_dxil_get_version’ [-Werror=missing-prototypes]
  200 | spirv_to_dxil_get_version()
      | ^~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: 92b0cf8e77 ("spirv_to_dxil: expose version number")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12264>
2021-08-07 11:11:31 -07:00
Emma Anholt
e5311eae0c ci/freedreno: Add jobs to manually do a full VK on freedreno.
Building toward scheduled nightly runs, add a button to do a full VK run
when you think you're changing test expectations.

Be gentle with the play button on this, 4 people doing this at once
would block marge for everyone else for a while.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
2021-08-06 20:03:02 +00:00
Emma Anholt
2af172e826 ci/freedreno: Skip the slow dEQP-VK.ubo.random.all_shared_buffer.48 in CI.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
2021-08-06 20:03:02 +00:00
Emma Anholt
71b38ef036 ci/freedreno: Clean up and fill out the tess timeout annotations.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
2021-08-06 20:03:02 +00:00
Emma Anholt
9c3b72e1b5 ci/freedreno: Generalize the spirv_ids_abuse skips.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
2021-08-06 20:03:02 +00:00
Emma Anholt
fd29117551 ci/freedreno: Organize, fill out, and document our VK xfails.
This is the full set of xfails for 1.2.7.0 currently.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
2021-08-06 20:03:02 +00:00
Chia-I Wu
da000ea2ef venus: free queues after vkDestroyDevice is emitted
Otherwise, another thread might reuse their object ids for other
objects.  For example,

  T1: free queue with object id X
  T2: reuse id X
  T2: emit vkCreateFoo with id X
  T1: emit vkDestroyDevice

virglrenderer happily accepts that which leads to double frees of the
queue: once when X is updated to point to another object and once when
vkDestroyDevice is executed.  virglrenderer should be fixed to catch
such invalid object id reuse as well.

Fixes
dEQP-VK.api.object_management.multithreaded_shared_resources.device_group.

Fixes: ddd7533055 ("venus: initial support for queue/fence/semaphore")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12252>
2021-08-06 19:48:49 +00:00
Rob Clark
4e28dfe58e freedreno: Device matching based on chip_id
Add support for device matching based on chip_id instead of gpu_id, to
handle newer GPUs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
a1c4f11f4c freedreno: Make chip_id 64b
In the UABI it is already 64b, but userspace ignored the upper 32b.  But
it looks like we will start needing the upper 32b.  So before we start
actually *using* chip_id, lets make sure everything is treating it as
64b.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
7806843866 freedreno/all: Introduce fd_dev_id
Move away from using gpu_id as the primary means to identify which
adreno we are running on, as future GPUs (starting with 7c3) stop
providing a gpu_id as a new naming scheme is introduced.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
7ba6100c2a freedreno/ir3/lower_io_offsets: Drop gpu_id param
It was unused.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
cc72eeb077 freedreno/ir3: Reduce use of compiler->gpu_id
For the same reason as previous patch.  Mostly we only care about the
generation, so convert things to use compiler->gen instead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
f92877b7b8 freedreno: Reduce use of screen->gpu_id
Newer GPU's are moving away from using gpu_id, including the code
landing upstream for "7c Gen 3".  But most of the places in the gallium
driver where we were looking at gpu_id, we only cared about the major
generation.  So convert those to use screen->gen instead.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
f100acd0c5 freedreno: Drop device_id
This wasn't actually used for anything.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Rob Clark
7a11cc42e7 freedreno: Move generated device table to .h
We only need it in a single .c file, so we can make the device table
static.  Also rename the struct for device table entries, as I want
to re-use the name 'fd_dev_id'

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
2021-08-06 18:51:50 +00:00
Mike Blumenkrantz
2f665e52e1 nine: enable tc
Acked-by: <Axel Davy davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11866>
2021-08-06 18:40:32 +00:00
Mike Blumenkrantz
740752d232 nine: track bound sampler count to optimize unbinds
Acked-by: Marek Olšák <marek.olsak@amd.com>

Reviewed-by: <Axel Davy davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11865>
2021-08-06 17:12:54 +00:00
Mike Blumenkrantz
7a170230f1 nine: update bound sampler mask directly during texture updates
Reviewed-by: <Axel Davy davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11865>
2021-08-06 17:12:54 +00:00
Mike Blumenkrantz
9205a45da5 nine: split enabled/dummy texture binds into separate iterators
this removes a conditional from the loops

Reviewed-by: <Axel Davy davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11865>
2021-08-06 17:12:54 +00:00
Mike Blumenkrantz
26d1886a7c nine: optimize texture binds a bit
this can just iterate over the mask of active textures instead of always
iterating over and rebinding all textures

Acked-by: Marek Olšák <marek.olsak@amd.com>

Reviewed-by: <Axel Davy davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11865>
2021-08-06 17:12:54 +00:00
Matt Turner
0165fde82c tu: Raise maxDescriptorSetUpdateAfterBindUniformBuffersDynamic to 16
... and reduce maxDescriptorSetUpdateAfterBindStorageBuffersDynamic from 12 to
8.

MAX_DYNAMIC_BUFFERS is MAX_DYNAMIC_UNIFORM_BUFFERS +
MAX_DYNAMIC_STORAGE_BUFFERS. We set

maxDescriptorSetUniformBuffersDynamic = MAX_DYNAMIC_UNIFORM_BUFFERS
maxDescriptorSetStorageBuffersDynamic = MAX_DYNAMIC_STORAGE_BUFFERS
maxDescriptorSetUpdateAfterBindUniformBuffersDynamic = MAX_DYNAMIC_BUFFERS / 2
maxDescriptorSetUpdateAfterBindStorageBuffersDynamic = MAX_DYNAMIC_BUFFERS / 2

The CTS test checks that

maxDescriptorSetUpdateAfterBindUniformBuffersDynamic
	- is at least 8; and
	- is at least maxDescriptorSetUniformBuffersDynamic
maxDescriptorSetUpdateAfterBindStorageBuffersDynamic
	- is at least 4; and
	- and is at least maxDescriptorSetStorageBuffersDynamic

Prior to this patch maxDescriptorSetUpdateAfterBindUniformBuffersDynamic was 12
but maxDescriptorSetUniformBuffersDynamic was 16, thus causing the CTS failure
in
  dEQP-VK.api.info.vulkan1p2_limits_validation.ext_descriptor_indexing

By raising maxDescriptorSetUpdateAfterBindUniformBuffersDynamic to the same
value as maxDescriptorSetUniformBuffersDynamic, we bring the limits into the
appropriate ranges. We do the same thing for
maxDescriptorSetUpdateAfterBindStorageBuffersDynamic by assigning it the same
value as maxDescriptorSetStorageBuffersDynamic.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12193>
2021-08-06 16:46:55 +00:00
Gert Wollny
799710be88 mesa: Add EXT_texture_mirror_clamp_to_edge to extension table
This is the OpenGL ES version of ARB_texture_mirror_clamp_to_edge.

v2: fix TexParameter validation (Erik)
v3: Use modernized extension test (Erik)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10325>
2021-08-06 15:57:42 +00:00
Gert Wollny
757bc6d37a mesa: Add support for EXT_clear_texture
This extension implements a subset of ARB_clear_texture (i.e.
only the features that are not available in OpenGL ES have been
dropped).

v2: Move call declarations from function to offsets  (Emil)

v3: Update llvmpipe and softpipe expectations

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10325>
2021-08-06 15:57:42 +00:00
Erik Faye-Lund
028a83d9ad lavapipe: remove duplicate xfail with typo
Seems there's a rogue "time" in here, causing it to look like a new
failure. But if we remove that and resort the list, we'll see that this
failure was already listed.

Fixes: dfccbdff98 ("ci: update to VK-GL-CTS 1.2.7.0")
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12233>
2021-08-06 15:37:34 +00:00
Mike Blumenkrantz
201d46b894 nine: set CSO_NO_USER_VERTEX_BUFFERS for main cso context
this skips vbuf for radeonsi and saves some cpu

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11884>
2021-08-06 15:23:40 +00:00
Mike Blumenkrantz
d20b0c87bc nine: don't memset sampler state during conversion
this ends up having pretty huge overhead

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Axel Davy <davyaxel0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11887>
2021-08-06 15:12:54 +00:00
Connor Abbott
e9d2d3ae17 ir3: Document RA-related register flags better
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12216>
2021-08-06 14:51:53 +00:00
Simon Zeni
f7ee7112ec gbm: add GBM_FORMAT_R16
Signed-off-by: Simon Zeni <simon@bl4ckb0ne.ca>
Reviewed-by: Simon Ser <contact@emersion.fr>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12101>
2021-08-06 13:38:00 +00:00
Timur Kristóf
74181ffcc5 radv: Write RSRC2_GS for NGGC when pipeline is dirty but not emitted.
The radv_emit_ngg_culling_state function won't write the
SPI_SHADER_PGM_RSRC2_GS register when it knows in advance that
radv_emit_graphics_pipeline will overwrite it anyway.

However, there is an unhandled case:

radv_emit_graphics_pipeline will not emit anything (including this
register) when the pipeline is already emitted. Hence, improve
the check in radv_emit_ngg_culling_state to consider this.

Fixes: 9a95f5487f
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12237>
2021-08-06 12:18:37 +02:00
Pierre-Eric Pelloux-Prayer
41e093fc98 st/pbo: add a fast pbo download code-path
Based on the glReadPixels code.

pbobench piglit benchmark reports identical/similar results on about 50% of
the test cases. The other test cases get a 2x-50x speedup.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5084
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1030
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12096>
2021-08-06 09:07:32 +02:00
Pierre-Eric Pelloux-Prayer
d2845cfcc4 st/pbo: set nir_tex_instr::is_array field
Otherwise the layer argument won't be used.

Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download shaders. ")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12096>
2021-08-06 09:07:32 +02:00
Pierre-Eric Pelloux-Prayer
ff7e339f1f st/pbo: only use x coord when reading a PIPE_TEXTURE_1D
This fixes the following NIR validation error in the
st/pbo download FS:

	vec2 32 ssa_14 = mov ssa_4.xy
	vec2 32 ssa_15 = f2i32 ssa_14
	vec1 32 ssa_16 = deref_var &tex (uniform sampler1D)
	vec4 32 ssa_17 = (float32)txf ssa_16 (texture_deref), ssa_16 (sampler_deref), ssa_15 (coord)
error: nir_src_num_components(instr->src[i].src) == instr->coord_components (../src/compiler/nir/nir_validate.c:839)

With this change, the FS becomes:

	vec4 32 ssa_2 = intrinsic load_frag_coord () ()
	vec1 32 ssa_3 = f2i32 ssa_2.x
	[...]
	vec1 32 ssa_9 = deref_var &tex (uniform sampler1D)
	vec4 32 ssa_10 = (float32)txf ssa_9 (texture_deref), ssa_9 (sampler_deref), ssa_3 (coord), ssa_0 (lod)

Fixes: a01ad311 ("st/mesa: Add NIR versions of the PBO upload/download shaders. ")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12096>
2021-08-06 09:07:32 +02:00
Dave Airlie
78b4e417d4 gallivm: handle fisfinite/fisnormal
lower one, do the other.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12207>
2021-08-06 14:28:10 +10:00