Commit Graph

129 Commits

Author SHA1 Message Date
Timothy Arceri
75b47dda0c gallium/util: replace pipe_mutex_init() with mtx_init()
pipe_mutex_init() was made unnecessary with fd33a6bcd7.

Replace was done using:
find ./src -type f -exec sed -i -- \
's:pipe_mutex_init(\([^)]*\)):(void) mtx_init(\&\1, mtx_plain):g' {} \;

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-03-07 08:52:07 +11:00
Marek Olšák
4a883966c1 gallium: remove PIPE_CAP_USER_INDEX_BUFFERS
all drivers support it

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
Tested-by: Brian Paul <brianp@vmware.com>  (VMware driver only)
2017-02-25 00:03:09 +01:00
Eric Anholt
a0b6841838 vc4: Drop VS inputs to 8.
In the hardware we only get to declare 8 vertex elements (GLES2's
minimum), so we should be exposing that number here.  Fixes an assertion
failure in piglit texrect-many, at the expense of various GL 2.0-ish
minmax tests now complaining that our count is too low.
2017-02-10 14:17:04 -08:00
Ilia Mirkin
b090033087 gallium: add separate PIPE_CAP_INT64_DIVMOD
Nouveau does not currently have logic to implement this as a library
function. Even though such a library could be written, there's no big
advantage to do it that way for now given that int64 is a very uncommon
use-case. Allow a driver to expose INT64 without supporting division and
modulo operations.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-02-09 12:57:21 -05:00
Nicolai Hähnle
a020cb3a72 gallium: turn PIPE_SHADER_CAP_DOUBLES into a screen capability
Make the cap consistent with PIPE_CAP_INT64.

Aside from the hypothetical case of using draw for vertex shaders (and
actually caring about doubles...), every implementation supports doubles
either nowhere or everywhere.

Also, st/mesa didn't even check the cap correctly in all supported
shader stages.

While at it, add a missing LLVM version check for 64-bit integers in
radeonsi. This is conservative: judging by the log, LLVM 3.8 might be
sufficient, but there are probably bugs that have been fixed since then.

v2: fix clover (Marek)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-02-02 16:53:42 +01:00
Eric Anholt
0079df0b2d vc4: Flip the switch to run the GLSL compiler optimization loop once.
This has almost no effect on shader-db:

total instructions in shared programs: 92572 -> 92611 (0.04%)
instructions in affected programs:     4486 -> 4525 (0.87%)

Looking at 2 of the 7 different shaders that were hurt (all of which were
in mupen64), they all appear to be just differences in order of
instructions at the NIR level.

The advantage is that this should significantly reduce time in the compiler.
2017-01-28 19:35:20 -08:00
Dave Airlie
f804506d4d gallium: Add integer 64 capability
v1.1: move to using a normal CAP. (Marek)

v2: fill in the cap everywhere

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2017-01-27 10:19:25 +01:00
Ilia Mirkin
6e40938fbc gallium: add PIPE_CAP_TGSI_MUL_ZERO_WINS
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Axel Davy <axel.davy@ens.fr>
2017-01-23 20:36:47 -05:00
Ilia Mirkin
ee3ebe68f9 gallium: add PIPE_CAP_TGSI_FS_FBFETCH
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2017-01-16 21:13:09 -05:00
Marek Olšák
e51baeb6c1 gallium: add PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY
Drivers with good compilers don't need aggressive optimizations before TGSI.

Reviewed-by: Eric Anholt <eric@anholt.net>
2017-01-05 13:07:12 +01:00
Rob Clark
026a7223a6 gallium: support for native fence fd's
This enables gallium support for EGL_ANDROID_native_fence_sync, for
drivers which support PIPE_CAP_NATIVE_FENCE_FD.

Signed-off-by: Rob Clark <robclark@freedesktop.org>
2016-12-01 20:16:31 -05:00
Nicolai Hähnle
611166b8ed gallium: add PIPE_CAP_TGSI_CAN_READ_OUTPUTS
Drivers that support this benefit by saving one lowering pass in the
GLSL-to-TGSI conversion.

radeonsi already supports this because all outputs are stored in temporary
variables before the export (except for TCS outputs, which have always
been readable in TGSI anyway due to their special semantics).

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-11-30 09:09:50 +01:00
Eric Anholt
7f27ad5597 vc4: Try compiling our FSes in multithreaded mode on new kernels.
Multithreaded fragment shaders let us hide texturing latency by a
hyperthreading-style switch to another fragment shader.  This gets us up
to 20% framerate improvements on glmark2 tests.
2016-11-16 19:45:01 -08:00
Eric Anholt
45c022f2b0 vc4: Add support for ETC1 textures if the kernel is new enough.
The kernel changes for exposing the param have now been merged, so we can
expose it here.
2016-11-16 19:45:01 -08:00
Marek Olšák
72217d4335 gallium: add PIPE_SHADER_CAP_LOWER_IF_THRESHOLD
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
2016-11-15 20:23:40 +01:00
Eric Anholt
80157466cd vc4: Add miptree/texture state support for ETC1 compressed textures.
The format isn't flagged as enabled at runtime yet, because we need kernel
validation support.
2016-11-03 18:42:58 -07:00
Ilia Mirkin
3fdeb7c983 gallium: add PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS
This allows the driver to signal that it can't handle random
interleaving of attributes across buffers. This is required for
ARB_transform_feedback3, and it's initialized to whatever the previous
value of PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME was except for nv50 where
it is disabled. Note that the proprietary drivers never expose
ARB_transform_feedback3 on any GT21x's (where nouveau previously did),
and after some effort I was unable to get it to work.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-22 12:02:35 -04:00
Eric Anholt
78087676c9 vc4: Restructure the simulator mode.
Rather than having simulator mode changes scattered around vc4_bufmgr.c
and vc4_screen.c, make vc4_bufmgr.c just call a vc4_simulator_ioctl, which
then dispatches to a corresponding implementation.

This will give the simulator support a centralized place to do tricks like
storing most BOs directly in simulator memory rather than copying in and
out.

This leaves special casing of mmaping BOs and execution, because of the
winsys mapping.
2016-10-21 14:12:22 -07:00
Nicolai Hähnle
700a571f89 gallium: add PIPE_CAP_TGSI_ARRAY_COMPONENTS
This is a screen cap because drivers are expected to support it either
for all shader types or for none of them.

Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-10-12 18:50:10 +02:00
Eric Anholt
06cc3dfda4 vc4: Fix simulator when more than one vc4_screen is opened.
We would assertion fail in setting up the simulator the second time
around.  This at least postpones the assertion failure until we've closed
all of the first set of screens and started opening a new set.
2016-10-06 18:09:24 -07:00
Nicolai Hähnle
2a83036fe2 vc4: use the new parent/child pools for transfers
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-10-05 15:42:20 +02:00
Marek Olšák
5981ab5445 gallium: remove PIPE_BIND_TRANSFER_READ/WRITE
not used in any useful way

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-09-08 22:51:33 +02:00
Ilia Mirkin
9515d651f9 gallium: add a cap to expose whether driver supports mixed color/zs bits
Some hardware can't render to color/depth buffers of mixed bitness. When
that happens a fallback has to happen, but this allows the driver to
express that this isn't an optimal scenario. The purpose of this is to
remove such fbconfigs from the GLX/EGL config list.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-08-23 18:30:49 -04:00
Eric Anholt
47e3cc7557 vc4: Tell state_tracker that we would prefer NIR.
Before this series, the code generation path was:

GLSL IR -> TGSI -> NIR -> NIR clone -> QIR -> QPU

Now it's (generally)

GLSL IR -> NIR -> NIR clone -> QIR -> QPU
2016-08-22 12:11:08 -07:00
Eric Anholt
9f95690959 vc4: Fix leak of the bo_handles table. 2016-08-03 10:25:08 -07:00
Rob Herring
9ace2c1355 vc4: add hash table look-up for exported dmabufs
It is necessary to reuse existing BOs when dmabufs are imported. There
are 2 cases that need to be handled. dmabufs can be created/exported and
imported by the same process and can be imported multiple times.
Copying other drivers, add a hash table to track exported BOs so the
BOs get reused.

v2: Whitespace fixup (by anholt)

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
2016-07-26 13:47:50 -07:00
Eric Anholt
d2b4b16589 vc4: Return V3D version details in the GL renderer info.
This is as close as we get to a name for the 3D blocks.
2016-07-20 16:15:15 -07:00
Eric Anholt
d81934cded vc4: Check the V3D version reported by the kernel.
We don't want to bring up an old userspace driver on a kernel for
newer hardware.  We'll also want to look at the other ident fields in
the future.
2016-07-20 16:15:15 -07:00
Eric Anholt
83b8ca58e1 vc4: Detect and report kernel support for branching. 2016-07-20 16:15:15 -07:00
Józef Kucia
3cd28fe3de gallium: add a cap for VIEWPORT_SUBPIXEL_BITS (v2)
This allows Gallium drivers to advertise the subpixel precision
for floating point viewports bounds.

v2:
  - Set ViewportSubpixelBits in st_init_limits.

Signed-off-by: Józef Kucia <joseph.kucia@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
2016-07-20 12:45:31 +02:00
Eric Anholt
219b75deb9 vc4: Turn on control flow support in the simulator environment.
We can't merge the non-simulator support until we merge the kernel side and
get a new libdrm release.
2016-07-15 13:54:00 -07:00
Eric Anholt
ab1d40b84a vc4: Add a flag in the screen to track control flow support.
For now it's still always false, but I need it in place for kernel
backwards compat support as I extend the backend for control flow.
2016-07-12 17:42:40 -07:00
Eric Anholt
c65a00eaff vc4: Close our screen's fd on screen close.
We're passed in a freshly dup()ed fd on screen create, so we should close
it on exit.  Debugged by Hugh Cole-Baker.
2016-07-12 15:46:09 -07:00
Axel Davy
59a692916c gallium: Add a cap for offset_units_unscaled
D3D9 has a different behaviour for depth bias.

For OGL/D3D1X, the depth bias unit is the
minimal resolvable value for the depth buffer,
which depends on the format (and has different
behaviour for float depth buffers).

For D3D9, the depth bias unit is 1.0f.

Signed-off-by: Axel Davy <axel.davy@ens.fr>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-06-25 10:16:15 +02:00
Ilia Mirkin
07fcb06fe0 gallium: add PIPE_CAP_MAX_WINDOW_RECTANGLES to all drivers
This says how many window rectangles are supported by the
implementation, although it may not exceed PIPE_MAX_WINDOW_RECTANGLES.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-06-18 13:38:29 -04:00
Ilia Mirkin
edfa7a4b25 gallium: add PIPE_CAP_TGSI_VOTE for when the VOTE ops are allowed
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-06-06 20:49:29 -04:00
Stanimir Varbanov
e382bc649b gallium: push offset down to driver
Push offset down to drivers when importing dmabuf. This is needed
to more fully support EGL_EXT_image_dma_buf_import when a non-zero
offset is specified.

Tesing has been done for freedreno, and compile tested following
gallium drivers:
nouveau,svga,virgl,r600,r300,radeonsi,swrast,i915,ilo

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2016-05-30 10:26:35 +01:00
Kenneth Graunke
70048eb1e3 gallium: Add a pipe cap for whether primitive restart works for patches.
Some hardware supports primitive restart on patch primitives, and other
hardware does not.  Modern GL and ES include a query for this feature;
adding a capability bit will allow us to answer it.

As far as I know, AMD hardware does not support this feature, while
NVIDIA and Intel hardware does.  However, most Gallium drivers do not
appear to support tessellation shaders yet.  So, I've enabled it for
nvc0 and disabled it everywhere else.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-05-23 16:44:11 -07:00
Eric Anholt
18260d0582 vc4: Add support for vertex color clamping in the rasterizer.
This gets us precompile of vertex shaders at the state tracker level as
well.
2016-05-17 18:09:58 -07:00
Eric Anholt
734fe41092 vc4: Mark the driver as supporting fragment color clamping in rast.
We always clamp fragment colors, since they're always 8-bit unorm, so
there's no need to have us compile separate shaders based on
GL_ARB_color_buffer_float.  This gives us precompilation of fragment
programs to the vc4_shader_state_create() level.
2016-05-17 18:07:39 -07:00
Eric Anholt
8835eb689b vc4: Enable sharing shaders across contexts.
This allows the same pipe_shader_state to be referenced from multiple
contexts.  Since our pipe_shader_state is treated as immutable (other than
the variant number) within the driver, this is no problem.
2016-05-17 18:07:39 -07:00
Tobias Klausmann
2be258ea18 gallium: Add a pipe cap for arb_cull_distance
This lets us safely enable or disable the extension as needed

Signed-off-by: Tobias Klausmann <tobias.johannes.klausmann@mni.thm.de>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-05-14 08:28:17 +10:00
Eric Anholt
1410403e1e vc4: Fix tests for format supported with nr_samples == 1.
This was a bug from the MSAA enabling.  Tests for surfaces with
nr_samples==1 instead of 0 (generally GL renderbuffers) would incorrectly
fail out.

Fixes the ARB_framebuffer_sRGB piglit tests other than srgb_conformance.

Cc: "11.1 11.2" <mesa-stable@lists.freedesktop.org>
2016-04-22 11:27:11 -07:00
Bas Nieuwenhuizen
70dcd841f7 gallium: Add capability for ARB_robust_buffer_access_behavior.
Signed-off-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
2016-04-12 20:53:06 +02:00
Edward O'Callaghan
4bc9130fba gallium: Add PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT
Add PIPE_CAP to determine if the GL extension
'GL_ARB_framebuffer_no_attachments' shall be
supported.

The driver is required to support 'PIPE_FORMAT_NONE'
via its 'is_format_supported()' callback in order
to determine the MSAA modes the hardware supports so
that values requested from the application using
'GL_ARB_framebuffer_no_attachments' may be quantized
to what the hardware expects.

V.2:
 Fix doc for a more detailed description of the PIPE_CAP
 and the corresponding GL constant.

V.3:
 Renamed and repurposed once again.

V.4:
 Remove CAP from cap_mapping array.

[airlied: fix damaged whitespace]

Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
2016-04-07 11:56:44 +10:00
Marek Olšák
dcb2b77823 gallium: add CAPs returning PCI device location
Reviewed-by: Brian Paul <brianp@vmware.com>
2016-03-09 15:02:28 +01:00
Ilia Mirkin
9fbfa1abb2 gallium: add PIPE_SHADER_CAP_MAX_SHADER_IMAGES
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
2016-02-15 22:22:33 -05:00
Samuel Pitoiset
5e09ac78e5 gallium: add PIPE_SHADER_CAP_SUPPORTED_IRS
This cap indicates the supported representations of programs. It should
be a mask of pipe_shader_ir bits. It will allow to enable
ARB_compute_shader if the underlying driver supports TGSI.

Changes from v2:
 - improve description of PIPE_SHADER_CAP_SUPPORTED_IRS

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-13 15:51:17 +01:00
Marek Olšák
d2e4c9e737 gallium: add interface for querying memory usage and sizes (v2)
If you're worried about the duplication of some CAPs, we can remove them
later.

v2: add fields for memory eviction stats

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
2016-02-05 17:29:38 +01:00
Ilia Mirkin
f9e6f46335 gallium: add PIPE_CAP_QUERY_BUFFER_OBJECT
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2016-02-04 21:21:30 -05:00