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Author SHA1 Message Date
Alyssa Rosenzweig
db5c1ae8fd pan/bi: Add fexp2_fast packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
c3eebfeb11 pan/bi: Pack FMA_MSCALE 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
0cb703984e pan/bi: Structify FMA_MSCALE 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
4570c34fc7 pan/bi: Add _MSCALE flag for FMA/ADD 
So we can bias by exponents.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
d3643cdd81 pan/bi: Add log2_help packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
6039d51e32 pan/bi: Pack ADD_FREXPM 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
ffa9f6a789 pan/bi: Add bi_pack_fma_2src helper 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
9904ed170a pan/bi: Add frexp_log packing 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:35 -04:00
Alyssa Rosenzweig
e067fd7b00 pan/bi: Add log_frexpe op to IR 
As part of BI_FREXP

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
40befaa965 pan/bi: Add FLOG2_U op to disassembler 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
62c8c3445e pan/bi: Add op for ADD_FREXPM 
Used in log2. Needs a new class as well due to scheduling silliness.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
cc61156626 pan/bi: Add special op for exp2 
Needs some extra help but basically exp2_fast

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
af01378dce pan/bi: Add BI_TABLE for fast table accesses 
Used to implement SPECIAL ops. Separate class since they are faster
which means you can pair them with actual work on FMA.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
83d961b0c2 pan/bi: Disable FMA scheduling for CONVERT 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Alyssa Rosenzweig
86c0ea383d pan/bi: Add disasm for ADD.i8 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4615>
 2020-04-17 16:25:34 -04:00
Jason Ekstrand
f5deed138a spirv,nir: Move the SPIR-V vector insert code to NIR 
This also makes spirv_to_nir a bit simpler because the new
nir_vector_insert helper automatically handles a constant component
selector like nir_vector_extract does.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
Jason Ekstrand
feca439697 spirv: Call nir_builder directly for vector_extract 
The nir_builder helper already handles checking if the component
selector is an immediate and returns an undef in the OOB case.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
Jason Ekstrand
acaccff4d3 nir/builder: Handle any bit-size selector in nir_extract 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
Jason Ekstrand
4b160c6776 spirv: Error if OpCompositeInsert/Extract has OOB indices 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
Jason Ekstrand
c478f8ad6c spirv,nir: Add a better vector_insert 
The old one in spirv_to_nir was besel'ing the whole vector for every
component.  If we think about this as a vector operation, we can do it
way more efficiently.

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
Jason Ekstrand
380bf556bf spirv: Handle OOB vector extract operations 
We use vtn_vector_extract to handle vector component level derefs.  This
makes us gracefully handle the case where your vector component is OOB
and give you an undef.  The SPIR-V working group is still working out
whether or not this is technically legal but it's very little code for
us to handle it so we may as well.

Cc: mesa-stable@lists.freedesktop.org
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4495>
 2020-04-17 19:21:44 +00:00
D Scott Phillips
dc3a17997b util/sparse_array: don't stomp head's counter on pop operations 
By temporarily storing the new_head by a uint32_t, we wipe out the
counter section of the head pointer.

Fixes: e4f01eca ("util: Add a free list structure for use with util_sparse_array")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rafael Antognolli <rafael.antognolli@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4612>
 2020-04-17 18:41:40 +00:00
Danylo Piliaiev
d684fb37bf st/mesa: Update shader info of ffvp/ARB_vp after translation to NIR 
We must update stp->Base.info after translation and before
st_prepare_vertex_program is called, because inputs_read
may become outdated after NIR optimization passes.

For ffvp/ARB_vp inputs_read is populated based on declared
attributes without taking their usage into consideration.
When creating shader variants we expect that their inputs_read
would match the base ones for input mapping to work properly.

Cc: <mesa-stable@lists.freedesktop.org>
Fixes: 8a0dd0af3f
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2758
Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4598>
 2020-04-17 20:16:15 +03:00
Samuel Pitoiset
c4ca9e66dd aco: fix exporting the viewport index if the fragment shader needs it 
It's like the layer, it has to be exported via the pos and also
as a varying if the fragment shader reads it.

Fixes dEQP-VK.draw.shader_viewport_index.fragment_shader_*

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4564>
 2020-04-17 16:23:24 +00:00
Samuel Pitoiset
b424d49ac0 radv/llvm: fix exporting the viewport index if the fragment shader needs it 
It's like the layer, it has to be exported via the pos and also
as a varying if the fragment shader reads it.

Fixes dEQP-VK.draw.shader_viewport_index.fragment_shader_*

Cc: <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4564>
 2020-04-17 16:23:24 +00:00
Samuel Pitoiset
19aa68ae31 radv: set missing SHARED_VGPR_CNT for NGG VS and ACO 
shuffle is implemented with shared VGPRs with ACO and Wave64.

Fixes dEQP-VK.subgroups.shuffle.framebuffer.subgroupshuffle*_vertex
with Wave64.

Fixes: c24d9522da ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4595>
 2020-04-17 16:11:17 +00:00
Samuel Pitoiset
fd6e44236c radv: fix geometry shader primitives query with ACO on GFX10 
Fixes
dEQP-VK.query_pool.statistics_query.*.geometry_shader_primitives.*.

Fixes: c24d9522da ("radv: Enable ACO for NGG VS/TES, but disable NGG for ACO GS.")
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4593>
 2020-04-17 17:39:16 +02:00
Ian Romanick
f7d620f47d intel/compiler: Fixup operands in fs_builder::emit() that takes array 
The versions that take a specific number of operands will do various
fixups depending on the platform and the opcode.  However, the version
that takes an array of sources did not.  This makes all version operate
similarly.

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
 2020-04-17 08:21:47 -07:00
Ian Romanick
39ad0c2af8 intel/compiler: CSEL can do saturate 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
 2020-04-17 08:21:46 -07:00
Ian Romanick
5afaa407c1 intel/compiler: Only GE and L modifiers are commutative for SEL 
Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
 2020-04-17 08:21:43 -07:00
Ian Romanick
a80e44902f intel/compiler: Silence unused parameter warning in update_inst_scoreboard 
src/intel/compiler/brw_fs_scoreboard.cpp: In function ‘void {anonymous}::update_inst_scoreboard(const fs_visitor*, const ordered_address*, const fs_inst*, unsigned int, {anonymous}::scoreboard&)’:
src/intel/compiler/brw_fs_scoreboard.cpp:793:45: warning: unused parameter ‘shader’ [-Wunused-parameter]
  793 |    update_inst_scoreboard(const fs_visitor *shader, const ordered_address *jps,
      |                           ~~~~~~~~~~~~~~~~~~^~~~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
 2020-04-17 08:21:42 -07:00
Ian Romanick
c836295dfd intel/compiler: Silence unused parameter warning in fs_live_variables::setup_one_read 
src/intel/compiler/brw_fs_live_variables.cpp: In member function ‘void brw::fs_live_variables::setup_one_read(brw::fs_live_variables::block_data*, fs_inst*, int, const fs_reg&)’:
src/intel/compiler/brw_fs_live_variables.cpp:56:67: warning: unused parameter ‘inst’ [-Wunused-parameter]
   56 | fs_live_variables::setup_one_read(struct block_data *bd, fs_inst *inst,
      |                                                          ~~~~~~~~~^~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
 2020-04-17 08:21:40 -07:00
Ian Romanick
62f70a353f intel/compiler: Silence unused parameter warnings in vec4_tcs_visitor 
In file included from src/intel/compiler/brw_vec4_tcs.cpp:31:
src/intel/compiler/brw_vec4_tcs.h: In member function ‘virtual void brw::vec4_tcs_visitor::emit_urb_write_header(int)’:
src/intel/compiler/brw_vec4_tcs.h:74:43: warning: unused parameter ‘mrf’ [-Wunused-parameter]
   74 |    virtual void emit_urb_write_header(int mrf) {}
      |                                       ~~~~^~~
src/intel/compiler/brw_vec4_tcs.h: In member function ‘virtual brw::vec4_instruction* brw::vec4_tcs_visitor::emit_urb_write_opcode(bool)’:
src/intel/compiler/brw_vec4_tcs.h:75:57: warning: unused parameter ‘complete’ [-Wunused-parameter]
   75 |    virtual vec4_instruction *emit_urb_write_opcode(bool complete) { return NULL; }
      |                                                    ~~~~~^~~~~~~~

Reviewed-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4582>
 2020-04-17 08:21:37 -07:00
Jason Ekstrand
030e5ceac4 intel/blorp: Delete an unused enum 
This was lying around from back when BLORP write to fs_visitor directly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4606>
 2020-04-17 15:01:10 +00:00
Jason Ekstrand
d0d039a4d3 anv: Emit pushed UBO bounds checking code in the back-end compiler 
This commit fixes performance regressions introduced by e03f965280
in which we started bounds checking our push constants.  This added a
LOT of shader code to shaders which use the robustBufferAccess feature
and led to substantial spilling.  The checking we just added to the FS
back-end is far more efficient for two reasons:

 1. It can be done at a whole register granularity rather than per-
    scalar and so we emit one SIMD8 SEL per 32B GRF rather than one
    SIMD16 SEL (executed as two SELs) for each component loaded.

 2. Because we do it with NoMask instructions, we can do it on whole
    pushed GRFs without splatting them out to SIMD8 or SIME16 values.
    This means that robust buffer access no longer explodes our register
    pressure for no good reason.

As a tiny side-benefit, we're now using can use AND instead of SEL which
means no need for the flag and better scheduling.

Vulkan pipeline database results on ICL:

    Instructions in all programs: 293586059 -> 238009118 (-18.9%)
    SENDs in all programs: 13568515 -> 13568515 (+0.0%)
    Loops in all programs: 149720 -> 149720 (+0.0%)
    Cycles in all programs: 88499234498 -> 84348917496 (-4.7%)
    Spills in all programs: 1229018 -> 184339 (-85.0%)
    Fills in all programs: 1348397 -> 246061 (-81.8%)

This also improves the performance of a few apps:

 - Shadow of the Tomb Raider: +4%
 - Witcher 3: +3.5%
 - UE4 Shooter demo: +2%

Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4447>
 2020-04-17 14:48:06 +00:00
Jason Ekstrand
eb5a10ff63 intel/cfg: Add first/last_block helpers 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4447>
 2020-04-17 14:48:06 +00:00
Connor Abbott
64e3b8d66b tu: Use tu_cs_add_entries() with non-render-pass secondaries 
Even though vkCmdRenderPassBegin() isn't allowed inside a secondary
command buffer, vkCmdDispatch() is, and we emit an IB with compute
dispatches, which means that if the secondary command buffer records a
vkCmdDispatch() then we'll have an IB inside an IB, which is illegal.
Fixes hangs in e.g.
dEQP-VK.api.command_buffers.record_simul_use_secondary_one_primary.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4605>
 2020-04-17 14:11:07 +00:00
Ilia Mirkin
ac0b8d58b9 mesa: add interaction between compute derivatives and variable local sizes 
This is an added interaction in NV_compute_shader_derivatives added in
Sep 2019.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4583>
 2020-04-17 13:51:11 +00:00
Karol Herbst
8c949b2aa6 st/mesa: properly guard fallback_copy_texsubimage aginst failed maps 
Fixes random crashes in some packed_pixel GLES CTS tests

Signed-off-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4592>
 2020-04-17 11:50:21 +00:00
Pierre-Eric Pelloux-Prayer
8521acd660 radeonsi: don't assume ctx is always a threaded_context 
Fixes: dcb1e8fef8 ("radeonsi: use thread_context::bytes_mapped_limit")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4587>
 2020-04-17 11:36:20 +02:00
Daniel Stone
791134658e Revert "CI: Disable Windows/VS2019 builds" 
DNS is now fixed.

This reverts commit 460b8b1758d953b2b820443615d73ccdb1455b5e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4591>
 2020-04-16 22:40:24 +00:00
Ilia Mirkin
2f009c4b49 docs: update for recently-added nvc0 features 
Also sort while we're at it.

And add NV_pixel_buffer_object.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4599>
 2020-04-16 15:58:37 -04:00
Ilia Mirkin
6ae214ac2e nv50,nvc0: update with latest caps 
One notable change is that DRAW_INFO_START_WITH_USER_INDICES is enabled.
An audit of the code indicates that it should work, and a number of
piglit tests exercising glMultiDrawElements continue to function.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4520>
 2020-04-16 18:19:27 +00:00
Jason Ekstrand
029471c3c4 intel/batch_decoder: Stop printing to stdout 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
 2020-04-16 17:26:16 +00:00
Jason Ekstrand
b8acf9a3d4 anv: Report correct SLM size 
Fixes: d787a2d0 "anv: Implement VK_KHR_pipeline_executable_properties"
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
 2020-04-16 17:26:16 +00:00
Jason Ekstrand
e003104605 intel: Add _const versions of prog_data cast helpers 
Reviewed-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4597>
 2020-04-16 17:26:16 +00:00
Jason Ekstrand
9b17d7caac nir: Add some sanity assertions in opt_large_constants 
We make some assumptions in opt_large_constants such as the size_align
function returning the obvious sizes for vectors.  Now that we've got
the deref_size lying around, we may as well assert it's consistent with
our assumptions.  In particular, we now assert that it really claims
booleans are 32-bit.  If anyone's driver ever decides to be clever and
change this, we'll now catch the breakage earlier.

Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4468>
 2020-04-16 17:00:13 +00:00
Jason Ekstrand
33eb43349e nir: Add an alignment to nir_intrinsic_load_constant 
In f1883cc73d we tried to pass through alignments from load_constant
intrinsics when rewriting them to load_ubo in iris.  However, those
intrinsics don't have ALIGN_MUL or ALIGN_OFFSET indices.  It's easy
enough to add them.  We just call the size/align function on the vector
type at the end of our deref chain and use the alignment returned from
there.  It's possible we could do better by walking the whole deref
chain but this should be good enough.

Fixes: f1883cc73d "iris: Set alignments on cbuf0 and constant reads"
Closes: #2739
Reviewed-by: Eric Anholt <eric@anholt.net>
Tested-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4468>
 2020-04-16 17:00:13 +00:00
Jan Vesely
8cbeb13704 clover: Check if the detected clang libraries are usable 
clang-cpp.so is broken in LLVM-9 and doesn't exist in LLVM<9,
however meson will find and try to use system libraries in these cases.

v2: Use helper variable to dedpulicate test code
    Move second test inside the condition to avoid testing good clang-cpp twice
v3: Check for cross compilation
v4: style fixes

Fixes: ff1a3a00cb
Signed-off-by: Jan Vesely <jano.vesely@gmail.com>
Tested-by: Karol Herbst <kherbst@redhat.com>
Acked-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4457>
 2020-04-16 16:29:44 +00:00
Rhys Perry
839c886b34 aco: add missing scc clobber to nir_op_unpack_32_2x16_split_y 
The ISA doc is inconsistent whether this instruction writes SCC. It does.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4552>
 2020-04-16 17:04:53 +01:00