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Author SHA1 Message Date
Samuel Pitoiset
21c8a95e34 radv: remove unnecessary FIXME about custom sample locations 
VK_EXT_sample_locations is disabled on GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12247>
 2021-08-09 11:40:13 +00:00
Rhys Perry
d764de6460 nir/tests: add tests for umod/imod/irem optimizations 
Both nir_opt_algebraic and nir_opt_idiv_const have optimizations for
umod/imod/irem by constants.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
e008eb1224 nir: fix signed overflow for iadd constant folding 
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
b627b9fcec nir/idiv_const: optimize imod/irem 
fossil-db changes (Sienna Cichlid):
Totals from 223 (0.15% of 150170) affected shaders:
CodeSize: 384564 -> 370824 (-3.57%)
Instrs: 74518 -> 71961 (-3.43%)
Latency: 351620 -> 344640 (-1.99%)
InvThroughput: 80122 -> 74846 (-6.58%)
VClause: 919 -> 920 (+0.11%)
SClause: 2879 -> 2877 (-0.07%); split: -0.10%, +0.03%
Copies: 3099 -> 3103 (+0.13%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
96168301f9 nir/idiv_const: improve idiv(n, INT_MIN) 
This lowering is smaller and -INT64_MIN is probably UB (signed overflow).

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
4e2b94331b nir/algebraic: improve irem by power-of-two optimization 
Requires one less instruction.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
2bb49e4587 nir/search: don't consider INT_MIN a negative power-of-two 
ineg(INT_MIN)/iabs(INT_MIN) won't work as expected.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
b009467b81 nir/algebraic: add optimizations for imul(a, INT_MIN) 
is_pos_power_of_two would catch this, but nir_op_imul has signed sources,
so is_neg_power_of_two catches it instead, which creates a useless
nir_op_ineg.

fossil-db (Sienna Cichlid):
Totals from 1014 (0.68% of 150170) affected shaders:
CodeSize: 3592296 -> 3592288 (-0.00%); split: -0.00%, +0.00%
Instrs: 671211 -> 670426 (-0.12%)
Latency: 5268917 -> 5268479 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 2187349 -> 2187343 (-0.00%); split: -0.00%, +0.00%
VClause: 8634 -> 8636 (+0.02%)
Copies: 97585 -> 97604 (+0.02%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
65cd5a0f22 nir/algebraic: don't optimize umod/imod/irem if lower_bitops=true 
Match the udiv/idiv/imul by power-of-two optimizations.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Rhys Perry
ec4b425f59 nir/algebraic: fix imod by negative power-of-two 
If "a" is a multiple of "b", then the result would have been "b" instead
of 0.

No fossil-db changes.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Fixes: 0ef5f3552f ("nir: add strength reduction pattern for imod/irem with pow2 divisor.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12039>
 2021-08-09 11:00:39 +00:00
Samuel Pitoiset
1db36422b9 radv: fix initializing the DS clear metadata value for separate aspects 
We shouldn't overwrite the clear value of the other aspect (in case
separate depth/stencil layouts are used).

Found by inspection.

Cc: 21.2 mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12222>
 2021-08-09 10:41:39 +00:00
Pierre-Eric Pelloux-Prayer
9fe8ae3fcd radeonsi: don't create an infinite number of variants 
If a shader has code like this:

   uniform float timestamp;
   ...
   if (timestamp > 0.0)
      do_something()

And timestamp is modified each frame, we'll end up generating a new
variant per frame.

This commit introduces a hard limit on the number of variants we generate
for a single shader.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5121
Fixes: b7501184b9 ("radeonsi: implement inlinable uniforms")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12138>
 2021-08-09 10:26:54 +00:00
Pierre-Eric Pelloux-Prayer
20055a307d radeonsi: add -t option to the test script 
This allows to easily run a subset of the tests without having
to figure out which test suite(s) they belong to.

dEQP cannot use this option because currently "deqp-runner suite"
don't have it.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12215>
 2021-08-09 10:11:58 +00:00
Pierre-Eric Pelloux-Prayer
4a69667cdd radeonsi: fix test script's output 
This line was dropped in the last refactoring. We need
to clearly state to the user if the new results are
different to the expected ones.

Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12215>
 2021-08-09 10:11:58 +00:00
Samuel Pitoiset
ade66c1aeb radv: allow DCC MSAA fast clears if a FCE is needed 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12180>
 2021-08-09 09:27:52 +00:00
Samuel Pitoiset
f136838d1e radv: perform a FCE for MSAA images that might have been fast-cleared 
FMASK_DECOMPRESS can't eliminate DCC fast clears. This will allow to
enable DCC MSAA fast clears that require a FCE.

Only supported on GFX10+.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12180>
 2021-08-09 09:27:52 +00:00
Samuel Pitoiset
3cfa3187cb radv: rework DCC, FMASK and FCE decompress path 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12180>
 2021-08-09 09:27:52 +00:00
Erik Faye-Lund
2f06642b06 gallivm: remove code to force nearest s/t interpolation 
These two bits were added in 2012, but never got wired up. Let's cut our
losses, and remove them again. 9 years unused seems sufficient.

While we're at it, remove reduction_mode from the hacks-section, because
this isn't a hack at all, rather normal state.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12240>
 2021-08-09 06:42:59 +00:00
Erik Faye-Lund
7d3ab96f39 lavapipe: lower mipmapPrecisionBits to 4 
Through some exhaustive searching, I've found that our log2 approximation
is precise to around 3.5 bits. And the squaring step should increase the
result with one bit, leaving us with 4.5 bits of precision.

Reporting the right mipmap precision fixes a few CTS-tests.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12238>
 2021-08-09 06:27:10 +00:00
Tapani Pälli
5e80cdbf8e anv: allow stencil memory export 
This commit reverts 58e9371141 as now iris driver can import stencil.
This makes ext_external_objects-vk-stencil-display pass and X-Plane 11
vulkan rendering backend to work with anv + iris.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Eleni Maria Stea <elene.mst@gmail.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10609>
 2021-08-09 05:38:50 +03:00
Tapani Pälli
e08370dc37 anv: disable aux for exportable images without modifiers 
This makes import easier on different gfx generations and we don't
have to lock down on a certain aux layout just yet.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10609>
 2021-08-09 05:38:50 +03:00
Tapani Pälli
d75502be33 iris: handle depth-stencil import with a wrapper function 
This is similar to u_transfer_helper wrap but implemented in
the driver as the layout between drivers can vary.

v2: remove else, simplify (Rohan, Eleni)
v3: add hiz surface support when importing depth buffer
v4: use iris_resource_configure_aux_offsets for setting
    aux offsets for depth
v5: introduce helper for configuring imported memobj aux
    offsets and utilize that
v6: simplify, remove aux support for now
v7: cleanups, fix offset calculation (Nanley)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10609>
 2021-08-09 05:38:50 +03:00
Tapani Pälli
5f7df5df0d crocus: disable depth and d+s formats with memory objects 
This is similar to i965 commit ba11f673a2, we set depth and
d+s formats unsupported for now.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10609>
 2021-08-09 05:38:50 +03:00
Tapani Pälli
e47b72e931 crocus: take a reference to memobj bo in crocus_resource_from_memobj 
This is the same fix as commit 2d87ea3166 for iris driver.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10609>
 2021-08-09 05:38:50 +03:00
Emma Anholt
13677a9092 i915g: Reapply clang-format. 
Missed this in 2008ec8a43 ("i915g: Fix writemasking of SEQ/SNE/SSG.")

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12250>
 2021-08-09 04:40:21 +00:00
Emma Anholt
01e9824997 i915g: Use the devmaster quadratic approximation for sin/cos. 
11 instructions, but now processes up to 4 channels at once (since TGSI
splits to scalar for these math ops) while being higher accuracy.
Previously we used 6 instructions per channel, but it didn't look like a
sine wave.  i915c managed it in 9 instructions per scalar channel, thanks
to avoiding an extra mov we do for the fabs (should be fixable), and
avoiding an extra MUL (maybe just needs reassociation of our immediates?).
But, the ALU count win from doing 4 channels at once will be way more
important for making sure that programs compile than those 2 ALU ops, plus
now we do it in NIR instead of assembly.

Closes: #4981
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12250>
 2021-08-09 04:40:21 +00:00
Dmitry Baryshkov
f800b9182b freedreno/regs: add bit to control continuous clock with 7nm PHYs 
7nm PHYs need another special bit set in DSI_LANE_CTRL to enable
continuous DSI clock. Document this bit.

Signed-off-by: Dmitry Baryshkov <dbaryshkov@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11219>
 2021-08-08 20:15:42 +00:00
Filip Gawin
fd9310f885 docs: make most important part of bugs.rst easier to find 
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12124>
 2021-08-08 19:53:15 +00:00
Antonio Caggiano
a694541709 pps: Restore documentation 
Restore part of the perfetto documentation deleted by mistake.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11846>
 2021-08-08 19:48:38 +00:00
Thong Thai
3cafe333e9 frontends/va/postproc: Keep track of deinterlacing method being used 
When transcoding a video, the context used by decode/postproc process
might be different from that of the encoder, but we encoder needs to
know if deinterlacing was used.

Fixes: c5088b4972 ("gallium: Fix VAAPI postproc blit")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12251>
 2021-08-08 14:06:54 +00:00
Thong Thai
5dace8e0fb gallium/util: add half texel offset param to util_compute_blit 
Fixes an issue where the video image is blurry after blitting.

Fixes: c5088b4972 ("gallium: Fix VAAPI postproc blit")
Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12251>
 2021-08-08 14:06:54 +00:00
Thong Thai
675508dd81 gallium/auxiliary/vl: Add additional deinterlace enum and tracking 
Add additional deinterlace enums and a deinterlace field to the
vl_compositor struct, so we can keep track of which deinterlacing
algorithm is currently being used, if any.

Signed-off-by: Thong Thai <thong.thai@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12251>
 2021-08-08 14:06:54 +00:00
Bas Nieuwenhuizen
30a359d633 util/fossilize_db: Add extra flock mutex. 
The flock is per-fd, not per thread, and we do it outside of the main mutex. This was
done to avoid having to wait in the mutex, but we can get a case where one ends up running
the body with the flock unlocked.

Fix this by adding a mutex that doesn't need to be locked for reads.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
 2021-08-08 13:34:42 +02:00
Bas Nieuwenhuizen
75266ee44a util/fossilize_db: Unlock the cache file if the entry already exists. 
Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
 2021-08-08 13:34:39 +02:00
Bas Nieuwenhuizen
1c4dce1aa7 util/fossilize_db: Use uint64_t for file size. 
For those 32-bit systems with 4G of cache.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12266>
 2021-08-08 13:34:35 +02:00
Bas Nieuwenhuizen
d2d642cc01 util/fossilize_db: Only allocate entries after full read. 
Should void leaking entries on read failure.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
 2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
96bfefe8d1 util/fossilize_db: Be conservative about header length check for locking. 
Don't anticipate seeing any partial written headers but just in case we
should probably wait on the lock to make sure whatever header was being
written is finished being written.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
 2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
3091277052 util/fossilize_db: Flush files after header write. 
We should probably flush before we unlock the file again.

Fixes: 4f0f8133a3 "util/fossilize_db: Do not lock the fossilize db permanently."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
 2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
57ca07455c util/fossilize_db: Reset file position to parsed_offset on cache_offset read failure. 
Otherwise we might restart reading from the middle of the entry.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
 2021-08-07 20:06:31 +00:00
Bas Nieuwenhuizen
3c51a3aa95 util/fossilize_db: Update parsed_offset correctly. 
If things went perfectly parsed_offset was never updated for the
final entry and we'd seek_set to the start of the last entry. Is
fun when appending to the file next.

Fixes: 2ec1bff0f3 "util/fossilize_db: Split out reading the index."
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12204>
 2021-08-07 20:06:31 +00:00
Vinson Lee
87efa1ee22 spirv_to_dxil: Fix missing-prototypes build error. 
../src/microsoft/spirv_to_dxil/spirv_to_dxil.c: At top level:
../src/microsoft/spirv_to_dxil/spirv_to_dxil.c:200:1: error: no previous prototype for ‘spirv_to_dxil_get_version’ [-Werror=missing-prototypes]
  200 | spirv_to_dxil_get_version()
      | ^~~~~~~~~~~~~~~~~~~~~~~~~

Fixes: 92b0cf8e77 ("spirv_to_dxil: expose version number")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12264>
 2021-08-07 11:11:31 -07:00
Emma Anholt
e5311eae0c ci/freedreno: Add jobs to manually do a full VK on freedreno. 
Building toward scheduled nightly runs, add a button to do a full VK run
when you think you're changing test expectations.

Be gentle with the play button on this, 4 people doing this at once
would block marge for everyone else for a while.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
 2021-08-06 20:03:02 +00:00
Emma Anholt
2af172e826 ci/freedreno: Skip the slow dEQP-VK.ubo.random.all_shared_buffer.48 in CI. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
 2021-08-06 20:03:02 +00:00
Emma Anholt
71b38ef036 ci/freedreno: Clean up and fill out the tess timeout annotations. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
 2021-08-06 20:03:02 +00:00
Emma Anholt
9c3b72e1b5 ci/freedreno: Generalize the spirv_ids_abuse skips. 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
 2021-08-06 20:03:02 +00:00
Emma Anholt
fd29117551 ci/freedreno: Organize, fill out, and document our VK xfails. 
This is the full set of xfails for 1.2.7.0 currently.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12150>
 2021-08-06 20:03:02 +00:00
Chia-I Wu
da000ea2ef venus: free queues after vkDestroyDevice is emitted 
Otherwise, another thread might reuse their object ids for other
objects.  For example,

  T1: free queue with object id X
  T2: reuse id X
  T2: emit vkCreateFoo with id X
  T1: emit vkDestroyDevice

virglrenderer happily accepts that which leads to double frees of the
queue: once when X is updated to point to another object and once when
vkDestroyDevice is executed.  virglrenderer should be fixed to catch
such invalid object id reuse as well.

Fixes
dEQP-VK.api.object_management.multithreaded_shared_resources.device_group.

Fixes: ddd7533055 ("venus: initial support for queue/fence/semaphore")
Signed-off-by: Chia-I Wu <olvaffe@gmail.com>
Reviewed-by: Ryan Neph <ryanneph@google.com>
Reviewed-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12252>
 2021-08-06 19:48:49 +00:00
Rob Clark
4e28dfe58e freedreno: Device matching based on chip_id 
Add support for device matching based on chip_id instead of gpu_id, to
handle newer GPUs

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
 2021-08-06 18:51:50 +00:00
Rob Clark
a1c4f11f4c freedreno: Make chip_id 64b 
In the UABI it is already 64b, but userspace ignored the upper 32b.  But
it looks like we will start needing the upper 32b.  So before we start
actually *using* chip_id, lets make sure everything is treating it as
64b.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
 2021-08-06 18:51:50 +00:00
Rob Clark
7806843866 freedreno/all: Introduce fd_dev_id 
Move away from using gpu_id as the primary means to identify which
adreno we are running on, as future GPUs (starting with 7c3) stop
providing a gpu_id as a new naming scheme is introduced.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/12159>
 2021-08-06 18:51:50 +00:00