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Author SHA1 Message Date
Daniel Stone
3dcb6a0f23 egl/x11: Downgrade warning to info 
This warning is emitted 10,074 times during a virpipe-on-gl job. Let's
emit it zero times.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31591>
 2024-10-10 20:52:02 +00:00
David Heidelberg
ace38d8432 ci: restrict number of maximum threads 
This makes LTO non-abusive to the servers.

Suggested-by: psykose <alice@ayaya.dev>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28684>
 2024-10-10 19:19:54 +00:00
David Heidelberg
afab416be4 ci: enable IPO/LTO only for nightly builds 
1. nightly takes a long, the extra few minutes for linking don't matter
2. nightly will run faster, since where it's CPU dependent it's at least +5% perf
3. it may reveal some painful areas of common code or driver.
4. for some jobs (not enabled yet, it generates ugly errors, disable
   there

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28684>
 2024-10-10 19:19:54 +00:00
David Heidelberg
2630e3e47a ci/fedora: when doing non-LTO build, we need C_ARGS too 
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28684>
 2024-10-10 19:19:54 +00:00
Karol Herbst
9cdf897c5e rusticl: allow asahi to be enabled by default 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31589>
 2024-10-10 18:24:31 +00:00
Karol Herbst
767695b2c4 asahi: implement get_cl_cts_version 
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31589>
 2024-10-10 18:24:31 +00:00
Jose Maria Casanova Crespo
687ed3fcaa v3d: initialize job local key with the 8 color buffer available in v7.1+ 
Fixes: 9e90d95508 ("v3d,v3dv: support up to 8 render targets in v7.1+")

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31582>
 2024-10-10 16:44:58 +00:00
Samuel Pitoiset
583b93f7a2 radv: rename 'gfx' to 'main' in the DGC path 
It can be confusing because the main DGC IB can be executed either on
GFX or ACE compute queues.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31583>
 2024-10-10 15:52:51 +00:00
Rhys Perry
33eb2d7fe4 aco: skip uniformization of certain merge phis 
If a source is a VGPR, then skip if it's safe. This fixes the regressions
from the previous commit.

fossil-db (navi31):
Totals from 5118 (6.45% of 79395) affected shaders:
MaxWaves: 159560 -> 159520 (-0.03%); split: +0.01%, -0.03%
Instrs: 2165351 -> 2138456 (-1.24%); split: -1.26%, +0.02%
CodeSize: 11260340 -> 11152460 (-0.96%); split: -0.98%, +0.02%
VGPRs: 218124 -> 225144 (+3.22%); split: -0.13%, +3.35%
Latency: 11059208 -> 11116102 (+0.51%); split: -0.18%, +0.69%
InvThroughput: 1252148 -> 1230193 (-1.75%); split: -1.77%, +0.01%
VClause: 39513 -> 39518 (+0.01%); split: -0.48%, +0.49%
SClause: 59434 -> 59378 (-0.09%); split: -0.11%, +0.02%
Copies: 165997 -> 156172 (-5.92%); split: -6.68%, +0.76%
PreSGPRs: 181203 -> 181094 (-0.06%)
PreVGPRs: 139393 -> 139731 (+0.24%)
VALU: 1244301 -> 1220769 (-1.89%); split: -1.91%, +0.02%
SALU: 200240 -> 199567 (-0.34%); split: -0.34%, +0.00%

fossil-db (navi21):
Totals from 35520 (44.74% of 79395) affected shaders:
MaxWaves: 951870 -> 951830 (-0.00%)
Instrs: 20229388 -> 20227776 (-0.01%); split: -0.01%, +0.00%
CodeSize: 105379916 -> 105513740 (+0.13%); split: -0.01%, +0.13%
VGPRs: 1375232 -> 1375400 (+0.01%)
Latency: 81046435 -> 81013986 (-0.04%); split: -0.04%, +0.00%
InvThroughput: 15269166 -> 15273295 (+0.03%); split: -0.01%, +0.04%
VClause: 354314 -> 354310 (-0.00%); split: -0.00%, +0.00%
SClause: 417049 -> 417047 (-0.00%); split: -0.00%, +0.00%
Copies: 1699445 -> 1699488 (+0.00%); split: -0.01%, +0.01%
Branches: 591274 -> 591269 (-0.00%); split: -0.00%, +0.00%
PreSGPRs: 1371062 -> 1370567 (-0.04%)
PreVGPRs: 1100716 -> 1100953 (+0.02%)
VALU: 11076189 -> 11075167 (-0.01%); split: -0.01%, +0.00%
SALU: 3648002 -> 3647378 (-0.02%); split: -0.02%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30211>
 2024-10-10 14:59:27 +00:00
Rhys Perry
ce33ffd03a aco: ensure phis uniformized by divergence analysis are SGPR 
Otherwise, they might not actually be uniform when divergence analysis
claimed they are.

fossil-db (navi31):
Totals from 5118 (6.45% of 79395) affected shaders:
MaxWaves: 159520 -> 159560 (+0.03%); split: +0.03%, -0.01%
Instrs: 2138456 -> 2165351 (+1.26%); split: -0.02%, +1.28%
CodeSize: 11152460 -> 11260340 (+0.97%); split: -0.02%, +0.98%
VGPRs: 225144 -> 218124 (-3.12%); split: -3.25%, +0.13%
Latency: 11116102 -> 11059208 (-0.51%); split: -0.69%, +0.18%
InvThroughput: 1230193 -> 1252148 (+1.78%); split: -0.01%, +1.80%
VClause: 39518 -> 39513 (-0.01%); split: -0.49%, +0.48%
SClause: 59378 -> 59434 (+0.09%); split: -0.02%, +0.11%
Copies: 156172 -> 165997 (+6.29%); split: -0.81%, +7.10%
PreSGPRs: 181094 -> 181203 (+0.06%)
PreVGPRs: 139731 -> 139393 (-0.24%)
VALU: 1220769 -> 1244301 (+1.93%); split: -0.02%, +1.95%
SALU: 199567 -> 200240 (+0.34%); split: -0.00%, +0.34%

fossil-db (navi21):
Totals from 35520 (44.74% of 79395) affected shaders:
MaxWaves: 951830 -> 951870 (+0.00%)
Instrs: 20227773 -> 20229388 (+0.01%); split: -0.00%, +0.01%
CodeSize: 105513724 -> 105379916 (-0.13%); split: -0.13%, +0.01%
VGPRs: 1375400 -> 1375232 (-0.01%)
Latency: 81013985 -> 81046435 (+0.04%); split: -0.00%, +0.04%
InvThroughput: 15273291 -> 15269166 (-0.03%); split: -0.04%, +0.01%
VClause: 354310 -> 354314 (+0.00%); split: -0.00%, +0.00%
SClause: 417047 -> 417049 (+0.00%); split: -0.00%, +0.00%
Copies: 1699486 -> 1699445 (-0.00%); split: -0.01%, +0.01%
Branches: 591269 -> 591274 (+0.00%); split: -0.00%, +0.00%
PreSGPRs: 1370567 -> 1371062 (+0.04%)
PreVGPRs: 1100953 -> 1100716 (-0.02%)
VALU: 11075164 -> 11076189 (+0.01%); split: -0.00%, +0.01%
SALU: 3647378 -> 3648002 (+0.02%); split: -0.00%, +0.02%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30211>
 2024-10-10 14:59:26 +00:00
Rhys Perry
67ad7359ff nir/divergence_analysis: disable phi undef optimization by default 
If the backend does not implement this too, or some other future transform
modifiess the phi so that this isn't the case (replace the phi with a
bcsel or replace undef with zero), then it will not actually be uniform.

This keeps it enabled to some degree for RADV/ACO.

fossil-db (navi31):
Totals from 76 (0.10% of 79395) affected shaders:
Instrs: 195008 -> 195282 (+0.14%)
CodeSize: 1012592 -> 1015884 (+0.33%)
Latency: 3892826 -> 3898843 (+0.15%); split: -0.00%, +0.15%
InvThroughput: 460681 -> 460964 (+0.06%)
Copies: 13508 -> 13516 (+0.06%)
Branches: 5244 -> 5412 (+3.20%)
PreVGPRs: 5092 -> 5096 (+0.08%)
VALU: 116177 -> 116197 (+0.02%)
SALU: 23449 -> 23785 (+1.43%)

fossil-db (navi21):
Totals from 76 (0.10% of 79395) affected shaders:
Instrs: 164471 -> 164981 (+0.31%)
CodeSize: 883988 -> 888420 (+0.50%)
Latency: 4074287 -> 4082043 (+0.19%)
InvThroughput: 783783 -> 784276 (+0.06%); split: -0.00%, +0.06%
Branches: 5262 -> 5430 (+3.19%)
PreVGPRs: 5100 -> 5104 (+0.08%)
VALU: 116375 -> 116381 (+0.01%)
SALU: 23589 -> 23925 (+1.42%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30211>
 2024-10-10 14:59:26 +00:00
Samuel Pitoiset
2643c48700 radv/amdgpu: remove unused code about external IBs in the submit path 
Now that everything is chained, the driver no longer uses external IBs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
 2024-10-10 14:08:39 +00:00
Samuel Pitoiset
d686ba36a9 radv/amdgpu: simplify cs_execute_ib() 
It's only used for executing IB2 on GFX.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
 2024-10-10 14:08:39 +00:00
Samuel Pitoiset
c1b2cb6ef7 radv: implement IB chaining for DGC when it's executed on compute 
The IB2 packet is only supported on the graphics queue. To execute DGC
IB on compute, the previous solution was to submit it separately
without any chaining. Though this solution was incomplete because it's
easy to reach the maximum number of IBs per submit when there is a lot
of ExecuteIndirect() calls.

To fix that, the proposed solution is to implement DGC IB chaining when
it's executed on the compute only. The idea is to add a trailer that is
added at the beginning of the DGC IB (to know the offset). This trailer
is used to chain back back the DGC IB to a normal CS, it's patched at
execution time. Patching is fine because it's not allowed to execute
the same DGC IB concurrently and the entire solution relies on that.

When the DGC IB is executed on graphics, the trailer isn't patched and
it only contains NOPs padding. Performance should be mostly similar.

This fixes
dEQP-VK.dgc.nv.compute.misc.execute_many_*_primary_cmd_compute_queue.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
 2024-10-10 14:08:39 +00:00
Samuel Pitoiset
303a456aa5 radv: add PKT3_INDIRECT_BUFFER_BYTES in the DGC path 
To avoid using a magic number.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30809>
 2024-10-10 14:08:39 +00:00
Samuel Pitoiset
056b638588 radv: add a helper to bind the color output state 
Instead of duplicating almost the same code chunk in three different
locations.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31566>
 2024-10-10 13:19:22 +00:00
Samuel Pitoiset
39745dd7cf radv: move radv_compact_spi_shader_col_format() to radv_cmd_buffer.c 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31566>
 2024-10-10 13:19:22 +00:00
Zan Dobersek
61ad069a21 freedreno: sanitize device names for config name usage 
Names used in libconfig's configuration files only allow alphanumerics,
underscores, dashes and asterisks. Freedreno device names, used as names
in fdperf.cfg, can also contain other characters, currently spaces and
plus characters. Not accounting for those makes it impossible to store
fdperf configuration across separate runs.

Once the Freedreno device name is retrieved, it's now sanitized for use
in fdperf.cfg. Unsupported characters are converted to underscores.

Signed-off-by: Zan Dobersek <zdobersek@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31577>
 2024-10-10 11:48:45 +00:00
Daniel Stone
d741a6766e ci/{b2c,swrast,layered}: Strip unnecessary things from runtime containers 
Bring it up to parity with the LAVA and bare-metal containers by
stripping things we don't need at runtime. There is a lot of stuff we
don't need in container images we only use to execute tests, including
but not limited to the system Mesa which can only cause problems. Call
the same strip-rootfs we already run for LAVA to make sure that this
doesn't happen, as well as slimming down the container image.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
3e7c9aad8a ci/virgl: Fix library path 
We need to set $LD_LIBRARY_PATH so we can find GL/Vulkan at all, and
$LIBGL_DRIVERS_PATH so Xvfb will pick up the correct DRI modules.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
4e3e84c240 ci/zink: Fix library path 
We need to set $LD_LIBRARY_PATH so we can find GL at all, and
$LIBGL_DRIVERS_PATH so Xvfb will pick up the correct DRI modules.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
61f5178f6e ci/swrast: Archive Xvfb logs 
If anything goes wrong, it's useful to have actual output, as opposed to
guessing from the void.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
8b594d29b6 ci/swrast: Fix library paths for llvmpipe/softpipe 
We need to set $LIBGL_DRIVERS_PATH so Xvfb will pick up the correct DRI
modules. We were setting $LD_LIBRARY_PATH, but llvmpipe was getting it
wrong, so Weston was picking up the host GLES, which we're about to no
longer install.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
a3560fabc6 ci/kernel: Make download-prebuilt-kernel safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
560d43b75e ci/skqp: Don't hardcode LLVM version 
Use our ${LLVM_VERSION} instead.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
5aceba599b ci/skqp: Reorder some things 
Declare all our variables first, so we can use them fearlessly.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
1dd728a3d8 ci/skqp: Make build-skqp safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
0fc65e437a ci/deqp-runner: Make build-deqp-runner safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
fef3170cae ci/angle: Make build-angle safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
7b56710e77 ci/vkd3d: Make Proton build safe for set -u 
The version hadn't been used in years now, so was always just an empty
string.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
6f0457dddb ci/vulkan: Make build-vulkan-validation safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
51dc1ff706 ci/libclc: Make build-libclc safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
ed9c67997a ci/wine: Make build-wine safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
2382b3ea8d ci/windows: Make build-directx-headers safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
d14b27b7fe ci/libdrm: Make build-libdrm safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
c3171bfd6a ci/wayland: Make build-wayland safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
7824cc1265 ci/crosvm: Make build-crosvm safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
4c52663e4a ci/va: Make build-va-tools safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
41774fde2f ci/apitrace: Make build-apitrace safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
ef05facc5e ci/deqp: Make build-deqp safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:57 +00:00
Daniel Stone
a7824caa8b ci/piglit: Make build-piglit safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:56 +00:00
Daniel Stone
4ae2d97c36 ci: Make setup-test-env safe for set -u 
Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31281>
 2024-10-10 11:05:56 +00:00
Tapani Pälli
e4fcbe8d6f anv: set StackIDControlOverride_RTGlobals for 2 workarounds 
GFX_VER block matches both workarounds and while these workarounds are
almost about the same cause, other one applies only for LNL and other
one for BMG, need to check for both.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31571>
 2024-10-10 10:20:56 +00:00
Tapani Pälli
b8fc0288af intel/dev: update mesa_defs.json from workaround database 
Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31571>
 2024-10-10 10:20:56 +00:00
Erik Faye-Lund
aa517f7eb3 mesa: clean up setup of MaxAddressRegs constant 
This value is only ever read for vertex or fragment shaders, so let's
make sure it's zero otherwise.

While we're at it, make the state-tracker not overwrite MaxAddressRegs
to the same value as it already is.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31538>
 2024-10-10 09:36:43 +00:00
Erik Faye-Lund
12eba85544 mesa: remove superfluous "native" limits and stats 
We don't ever set these to anything else than the same as the non-native
counterparts. Let's drop the members in the first place, and use the
non-native version instead.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31538>
 2024-10-10 09:36:43 +00:00
Erik Faye-Lund
cf71e5534b i915: do not calculate native instructions 
This isn't wired up anywhere, so let's just drop it.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31538>
 2024-10-10 09:36:43 +00:00
David Rosca
3c5fe03b92 radeonsi/vcn: Add support for VCN5 dpb tier2 
Co-authored-by: Ruijing Dong <ruijing.dong@amd.com>
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00
David Rosca
1e1f078099 radeonsi/vcn: Add support for VCN5 AV1 compound 
Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00
David Rosca
05f7589fec radeonsi/vcn: Fix coded size in sequence header on VCN5 
Introduce coded_width/coded_height for values used in headers
and change it to aligned size on VCN4 to reflect the actual coded size.
VCN5 doesn't have this limitation and can code any size.

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31520>
 2024-10-10 09:02:21 +00:00