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Author SHA1 Message Date
Marek Olšák
8e9968e3a1 radeonsi: remove returns from si_emit_global_shader_pointers 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
98eee7dee3 amd: replace SI_BIG_ENDIAN with UTIL_ARCH_BIG_ENDIAN 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
e0c8b24e22 amd/registers: unify VRS combiner definition names between gfx103 and gfx11 
use gfx11 names

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
091268944d amd,radeonsi: remove unused LLVM functions 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
d8b17b1752 radeonsi: disable Smart Access Memory because CPU access has large overhead 
It will be remove completely in the next commit.

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8176

Cc: mesa-stable

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
d61cd39026 radeonsi: replace si_screen::has_out_of_order_rast with the radeon_info field 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
5b85fa6031 radeonsi/gfx11: ignore alpha_is_on_msb because the hw ignores it 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:24 +00:00
Marek Olšák
52f5b7a970 radeonsi: set PA_SU_VTX_CNTL consecutively with PA_CL_GB_VERT_CLIP_ADJ 
because they are all next to each other.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
429f43f088 radeonsi: use SPI_SHADER_USER_DATA_HS_0 definition instead of LS_0 
The value is the same, but LS_0 is for gfx9 only, and HS_0 is for everything
except gfx9.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
6dcd60206a radeonsi: remove no-op setting of THDS_PER_SUBGRP 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
742c9f411b radeonsi: change si_shader::ctx_reg to a nameless union for better readability 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
3e9863f496 radeonsi: move a few DB_SHADER_CONTROL states into si_shader_ps 
They can be set si_shader_ps.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
ee83ba5771 radeonsi/gfx11: set CB_COLORi_INFO.MAX_COMP_FRAG on GFX1103_R2 
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
c54635a033 radeonsi/gfx11: don't set non-existent VGT_STRMOUT_BUFFER_CONFIG 
Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
31438fbab5 radeonsi/gfx11: fix the CU_EN clear mask for RSRC4_GS 
Fixes: 9fecac091f - radeonsi/gfx11: scattered register deltas

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
34c01cf718 amd: bump AMD_MAX_SE and change the CU mask type to 16 bits 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
63b21e3066 amd: add missing gfx11 register definitions 
Fixes: caa09f66ae - amd: add chip identification for gfx1100-1103

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
ac0e83375a amd: fix LOD_BIAS on gfx6-9 and adjust the lod bias CAP 
Fixes: e673bb4ae4 - amd,util: fix how lod bias is converted to fixed-point

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
98328a71dc radeonsi: fix COMPAT_MODE on gfx8-9 
It was set in the wrong dword.

Fixes: e673bb4ae4 ("amd,util: fix how lod bias is converted to fixed-point")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Marek Olšák
fb70d8cf9c Revert "radeonsi/ci: Update stoney test expectations" 
This reverts commit 53cc509288.

This MR fixes it.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21525>
 2023-02-24 21:27:23 +00:00
Faith Ekstrand
96c832c47e spirv: Always emit deref_buffer_array_length intrinsics 
All the drivers have been converted to setting this option now except
imagination and they don't support SSBOs yet.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3993
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
fbeb81d812 v3dv: Set spirv_options::use_deref_buffer_array_length 
It'll get lowered to get_ssbo_size by nir_lower_explicit_io() so the
driver should never notice this change.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
1386e1476a lavapipe: Set spirv_options::use_deref_buffer_array_length 
It'll get lowered to get_ssbo_size by nir_lower_explicit_io() so the
driver should never notice this change.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
85634a70ec turnip: Set spirv_options::use_deref_buffer_array_length 
It'll get lowered to get_ssbo_size by nir_lower_explicit_io() so the
driver should never notice this change.

Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
00218ab73f panvk: Drop our manual SSBO size handling 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
7594a64ebe hasvk: Drop our manual SSBO size handling 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
a1c82fa42f anv: Drop our manual SSBO size handling 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Faith Ekstrand
e41753cf17 nir/lower_io: Handle buffer_array_length for more address modes 
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21446>
 2023-02-24 20:37:10 +00:00
Sil Vilerino
ee129301a9 frontend/va: Remove duplicate code in format support checking/reporting. 
In config.c there are multiple copies of the code checking for VA_FORMAT_RT_*, this can lead
to confusion and is hard to maintain without knowing to change the code in all the places.

This commit extracts out the duplicated code into a function that checks format support
for a given profile and entrypoint, then this function is called from several places that
had the copies of this code in vlVaCreateConfig/vlVaGetConfigAttributes.

Please also note that after this change, all entrypoints/profiles will be checked for all
formats in the pipe_screen: YUV420/YUV420_10/YUV422/RGB32/YUV400/YUV444

Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Tested-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21466>
 2023-02-24 13:46:38 -05:00
Sil Vilerino
1a6865eae3 frontend/va: Add format support checks for VA_RT_FORMAT_* in VaCreateConfig/VaGetConfigAttributes 
Before this change some formats like YUV420, YUV422 and RGB32 are hardcoded as supported
in VaCreateConfig/VaGetConfigAttributes. This is not always the case, different gallium
drivers and hardware will support different formats. The frontend should delegate the support
check call by using the is_video_format_supported(...) function from pipe_screen.

Acked-by: Ruijing Dong <ruijing.dong@amd.com>
Tested-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21466>
 2023-02-24 13:37:51 -05:00
Roland Scheidegger
a4fa489002 lavapipe, nir: Fix wrong array index scaling in nir_collect_src_uniforms 
The scaling needs to be ubo * MAX_INLINABLE_UNIFORMS, not
ubo * PIPE_MAX_CONSTANT_BUFFERS, otherwise accesses beyond buffer size
will result for ubo >= 4 (and we'd also access the wrong values later
for other non-zero ubo indices).

Fixes: a7696a4d98 ("lavapipe: Fix bad array index scale factor in lvp_inline_uniforms pass")
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21506>
 2023-02-24 16:13:55 +00:00
Gert Wollny
b6303d33ec r600/sfn: Fix readport cylce map 
This is currently of no consequence, because the bank swizzle
codes are only used to check legal ALU group configuration
and the bank swizzles are not yet allocated to the instruictions
here.

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21516>
 2023-02-24 15:59:03 +00:00
Gert Wollny
b5b7ca0ad3 r600/sfn: be more conservative with channel use in multi-slot ops 
The current approach to check the bank swizzle doesn't allow to
re-evaluate bank-swizzle for instructions that where emitted
earlier, so we might end up with impossile constellations when we
allow three uses of the same channel

Fixes: edabd5cd84
  r600/sfn: check used channels when evaluating allowed mask

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8350

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21516>
 2023-02-24 15:59:03 +00:00
Konstantin Seurer
e2fa9ba9c6 radv: Use indirect header filling for compact builds 
Sets the accel struct size fields to the correct values which should
allow for more compaction.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
40e9efa2de radv/bvh: Add a shader for filling the header 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
c83ea20683 radv/bvh: Move the size header field up 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
b0fd43f1f7 radv: Move the geometry infos before the BVH 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
0800450cb9 radv: Use compact encoding 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
07c1b23022 radv/bvh: Implement compact encoding 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
71ccc8d600 radv: Add a build config for compact builds 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
da4f498f6f radv/bvh/encoder: Move dst_node initialization into the loop 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
2792d012d2 radv/bvh/encode: Introduce is_root_node 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
2c0e158ae2 radv/bvh/encode: Move bvh_offset NULL check to the top of the loop 
NULL nodes don't have to be encoded and they also don't carry over any
information to their children.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
4e87a01b93 radv/bvh: Replace is_final_tree with bvh_offset 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konstantin Seurer
688f598237 radv/bvh/encode: Use the node type for identifying internal nodes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/20818>
 2023-02-24 15:14:40 +00:00
Konrad Dybcio
6d93f4f867 freedreno: Add A2xx REG_A2XX_RBBM_PM_OVERRIDE2 bitfields 
Required for good-looking kernel code

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21480>
 2023-02-24 14:48:27 +00:00
Konrad Dybcio
891a8bfb2d freedreno: Add A2xx perf counter reg values 
Required for good-looking kernel code

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
[rob: fixup CI expectations]

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21480>
 2023-02-24 14:48:27 +00:00
Karmjit Mahil
9e2572903b pvr: Remove component_alignment 
We don't support output register subdivision so no need to keep
track of how many bytes have been allocated within the output regs.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
 2023-02-24 14:36:36 +00:00
Karmjit Mahil
0244719a12 pvr: Remove unused msaa_mode field 
Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
 2023-02-24 14:36:36 +00:00
Karmjit Mahil
ca04882117 pvr: Setup SPM EOT state 
On entering SPM we need to store the tile data for the current
render into the scratch buffer so we need to setup an EOT program
to do so.

Signed-off-by: Karmjit Mahil <Karmjit.Mahil@imgtec.com>
Reviewed-by: Frank Binns <frank.binns@imgtec.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21386>
 2023-02-24 14:36:36 +00:00