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Author SHA1 Message Date
Lionel Landwerlin
0d6f050b46 nir: add intrinsics for ray queries 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
 2021-12-04 20:46:35 +00:00
Lionel Landwerlin
0800ec2c77 nir: add a new access flag to allow access in helper invocations 
v2: Add nir_print support

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
 2021-12-04 20:46:35 +00:00
Lionel Landwerlin
54489b3c09 nir/print: printout ACCESS_STREAM_CACHE_POLICY 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
 2021-12-04 20:46:35 +00:00
Lionel Landwerlin
f98984ad13 nir/lower_io: include the variable access in the lowered intrinsic 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
 2021-12-04 20:46:35 +00:00
Lionel Landwerlin
7661237a31 intel/nir: preserve access value when duping intrinsic 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 6339aba775 ("intel/compiler: Lower SSBO and shared loads/stores in NIR")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13718>
 2021-12-04 20:46:35 +00:00
Yonggang Luo
6e7ffa760f vulkan: Open registry XML files as UTF-8 
"C:\CI-Tools\msys64\mingw64\bin/python3.EXE" "../../src/vulkan/util/gen_enum_to_str.py" "--xml" "../../src/vulkan/registry/vk.xml" "--outdir" "C:/work/xemu/xemu-opengl/mesa/build/windows-mingw64/src/vulkan/util"
Traceback (most recent call last):
  File "C:\work\xemu\xemu-opengl\mesa\src\vulkan\util\gen_enum_to_str.py", line 473, in <module>
    main()
  File "C:\work\xemu\xemu-opengl\mesa\src\vulkan\util\gen_enum_to_str.py", line 462, in main
    f.write(template.render(
UnicodeEncodeError: 'gbk' codec can't encode character '\xa9' in position 107: illegal multibyte sequence

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14015>
 2021-12-05 03:28:38 +08:00
Yiwei Zhang
8665910a63 venus: move bo allocation for mappable memory to vn_MapMemory 
This change defers the bo allocation for non-external mappable memory
direct allocation.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
 2021-12-04 01:48:16 +00:00
Yiwei Zhang
19d6b497fb venus: track memory type property flags in vn_device_memory 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
 2021-12-04 01:48:16 +00:00
Yiwei Zhang
86b3a4e6aa venus: defer roundtrip waiting to vkFreeMemory time 
bo allocations for the below cases are after device memory allocation:

1. direct non-external mappable memory allocation
2. pool grow
3. exportable memory allocation

For (1) and (2), the bo is for mapping, which is a pure kernel operation
to happen later. So roundtrip waiting can be deferred until free memory.

For (3), the bo is for either fd export or mapping, which are both pure
kernel operations. So roundtrip waiting can also be deferred until free
memory.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
 2021-12-04 01:48:16 +00:00
Yiwei Zhang
9fa3e3df9e venus: simplify device memory pool alloc and refcount 
The behavior we stick to is that the base_bo is always created for pool
memory so that to keep it alive during suballocates and frees.

This CL does the below:
1. rename pool_alloc to pool_suballocate and align the api interface
2. rename simple_alloc to pool_grow_alloc to make it pool specific
3. refactor pool_free and simple_free into a pair of pool_ref and
   pool_unref to simplify that vkFreeMemory is only called after the
   pool bo gets destroyed.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
 2021-12-04 01:48:16 +00:00
Yiwei Zhang
e019780626 venus: refactor vn_device_memory_simple_alloc 
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13874>
 2021-12-04 01:48:16 +00:00
Ilia Mirkin
eb28ac0f88 nv50: don't claim support for format-less stores 
This is not supported, nor is there any need to support it -- ES 3.1
doesn't need it, and we're in no danger of supporting
ARB_shader_image_load_store (among other things, it requires frag
images).

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14050>
 2021-12-04 01:34:17 +00:00
Ilia Mirkin
03acfa4aac nv50,nvc0: add new caps to list 
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14050>
 2021-12-04 01:34:17 +00:00
Marcin Ślusarz
bd2c11dfa8 intel/compiler: Load draw_id from XP0 in Task/Mesh shaders 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Marcin Ślusarz
b717872e08 intel/compiler: Get mesh_global_addr from the Inline Parameter for Task/Mesh 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Marcin Ślusarz
28e0c63a4c intel/compiler: extract brw_nir_load_global_const out of rt code 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
1f438eb033 intel/compiler: Implement Mesh Output 
Use the same URB access helpers that were added for Task Output.  The
Arrayed I/O (per-primitive and per-vertex) is handled by applying the
pitch from the MUE layout into the NIR intrinsics and including the
non-arrayed offset on top of it.  After that, the index src can be
used directly for lowering.

Because we keep around the non-arrayed offset AND the pitch is
aligned, we can identify cases where the access is indirect but
guaranteed to be aligned, and dispatch a single message.  Added a TODO
to explore that later.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
70ace2bbcd intel/compiler: Implement Task Output and Mesh Input 
Implement the output written by the task *workgroup* and available to
all the mesh *workgroups* dispatched from that task.  We currently
ignore any layout annotations (since they are not really testable) and
produce a (packed) layout ourselves.

The URB messages are only SIMD8, so for larger SIMDs, the functions
will produce multiple messages.  Making this lowering here instead of
the generic lower_simd_width() since it is not just a matter of
zip/unzip, e.g. the offset must be adjusted.

Indirect writes/reads are implemented by handling one component at a
time and using the PER_SLOT variant of the messages.

Note that VK_NV_mesh_shader allows reading outputs, so add support for
that as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
171bdd2ec6 intel/compiler: Lower Task/Mesh local_invocation_{id,index} 
The Invocation index is provided by the payload, so we can skip the
usual math done to get to it.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
db23c41537 intel/compiler: Add backend compiler basics for Task/Mesh 
Task/Mesh stages are CS-like stages, and include many
builtins (e.g. workgroup ID/index) and intrinsics (e.g. workgroup
memory primitives) originally present only in CS.

This commit add two new stages (task and mesh) that 'inherit' from CS
by embedding a brw_cs_prog_data in their own prog_data structure, so
that CS functionality can be easily reused.  They also currently use
the same helpers to select the SIMD variant to use -- that was
recently added for CS.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
827cf65a26 intel/compiler: Export brw_nir_lower_simd 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
09dd05a219 intel/compiler: Make MUE available when setting up FS URB access 
Allows to assert its existence for per-primitive variables and will
later be useful to implement the "more than 16 attributes" case for
Mesh.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
79e5e353e4 intel/compiler: Add structs to hold TUE/MUE 
Used to specify the layout of 'Task URB Entry' and 'Mesh URB Entry'.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
fcc1ccf541 intel/compiler: Don't lower Mesh/Task I/O to temporaries 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
18e1c9c542 intel/compiler: Don't stage Task/Mesh outputs in registers 
Since the outputs are shared among the whole workgroup, these can't be
staged in registers as they will not be always visible for all the
invocations (to read/flush).  If they ever need to be staged, we
should use SLM for that.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
be89ea3231 intel/compiler: Handle per-primitive inputs in FS 
In Fragment Shader, regular inputs are laid out in the thread payload
in a one dword per each half-GRF, that gives room for having the two
delta dwords needed for interpolation.

Per-primitive inputs are laid out before the regular inputs, and since
there's no need to have delta information, they are packed.  So
half-GRF will be fully filled with 4 dwords of input.

When num_per_primitive_inputs is zero (the default case), behavior
should be the same as before.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
7938c38778 intel/compiler: Properly lower WorkgroupId for Task/Mesh 
Task/Mesh currently only support a single dimension (both in NV API
and HW), so make Y and Z be zero.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Caio Oliveira
76f55d7556 intel: Add INTEL_DEBUG=task,mesh 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/13661>
 2021-12-04 00:41:46 +00:00
Dylan Baker
ea8fa10edd mesa: move common/dri into gallium 
There are no other consumers, so we can just move this into gallium and
out of mesa.

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
01b44d66b1 mesa: Merge libmesa_gallium and libmesa_common 
Since we don't have libmesa_classic anymore, we don't nee to split
these, and can save a target/ar invocation by not having two targets.
Plus it's just conceptually simpler

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
e030d5ba8a mesa: Delete libmesa_classic 
We no longer have any classic drivers, so we no longer need
libmesa_classic

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
bc2d3e7b5f mesa/main/tests: remove dispatch sanity 
Thsi test uses a bunch of the classic infastructure, which is about to
be deleted. Since gallium will be the sole user, it will likely be
refactored out anyway.

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
a63760f01a include/pci_ids: Move PCI ids supported by both i965 and iris to iris 
As crocus won't support any of these (BDW+) they should go into iris.
This also allows us to remove the "prefer_iris" option, as iris is now
the only option

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
bf97868062 mesa/dri: remove mega driver stub 
As it is now unused.

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
cdde031ac2 classic/i965: Remove driver 
Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
0cad451f00 classic/i915: Remove driver 
This is only going to be supported in the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
f464871932 classic/nouveau: Remove driver 
This will now only be available in the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
184a690fca classic/r200: Delete driver 
This will now only be available on the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
4d45b280bf classic/r100: Delete driver 
This is now only going to be available in the Amber branch

Reviewed-by: Emma Anholt <emma@anholt.net>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Adam Jackson
76791db088 mesa/x11: Remove the swrast-classic-based fake libGL 
If you want this you will almost certainly be happier with the gallium
version, giving you llvmpipe instead of swrast-classic.

Reviewed-by: Emma Anholt <emma@anholt.net>
Reviewed-by: Dylan Baker <dylan@pnwbakers.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Dylan Baker
901e0d6a11 mesa/tests: ensure that util_cpu_detect has been called 
I think that this test was passing in some cases because of loader side
effects, that stop happening after classic is removed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10153>
 2021-12-03 23:53:06 +00:00
Ilia Mirkin
268fc8e5c1 gitlab-ci: detect a3xx gpu hang recovery failure 
But don't bail immediately, instead print out some more lines after the
hang, hopefully catching info about the cause of the hang.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14033>
 2021-12-03 23:26:27 +00:00
Ilia Mirkin
eb0b08ea1a gitlab-ci: serial close can leave an active read 
So instead cancel the read first, and then close. Make sure the
serial-reading properly detects this cancelled condition under all
circumstances and exits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14033>
 2021-12-03 23:26:27 +00:00
Jesse Natalie
1abd6375c9 d3d12: Handle depth readback on drivers that require full-resource copies for depth 
Reviewed-by: Bill Kristiansen <billkris@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14051>
 2021-12-03 23:08:37 +00:00
Timur Kristóf
f28adc711f nir: Print task and mesh shader I/O variable names. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14007>
 2021-12-03 21:34:45 +00:00
Ilia Mirkin
a7180bd4a6 freedreno/a5xx: enable OES_gpu_shader5 
This extension is controlled by the ESSL feature level. Bump it up since
all parts of OES_gpu_shader5 should be supported.

This also avoids lowering all of the "advanced" functions (which should
probably not be lowered in the first place since they're part of ES
3.1...)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14035>
 2021-12-03 20:04:17 +00:00
Timur Kristóf
078f9d9eeb radv: Use util_widen_mask. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>
 2021-12-03 18:29:13 +00:00
Timur Kristóf
c3eebc860a aco: Use util_widen_mask. 
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>
 2021-12-03 18:29:13 +00:00
Timur Kristóf
6cde424945 util: Add util_widen_mask function. 
Widens the given bit mask by a multiplier, meaning that it will
replicate each bit by that amount.
For example: 0b101 widened by 2 will become: 0b110011

This is typically used in shader I/O to transform a 64-bit
writemask to a 32-bit writemask.

Moving this function here because it is used in multiple places.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14005>
 2021-12-03 18:29:13 +00:00
Timur Kristóf
7e66da89f8 nir: Fix sorting per-primitive outputs. 
Fixes: 59860d4873
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14006>
 2021-12-03 17:06:47 +00:00