Commit Graph

194467 Commits

Author SHA1 Message Date
Dylan Baker
d6c1bda9eb docs: update sha sums for 24.2.2
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31065>
2024-09-06 18:19:24 +00:00
Dylan Baker
b489dc4918 docs: add release notes for 24.2.2
Conflicts:
	docs/relnotes.rst

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31065>
2024-09-06 18:19:24 +00:00
Mike Blumenkrantz
b6f201b173 meson: require dri3 modifiers
the year is 2024 and we have the technology

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Reviewed-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31044>
2024-09-06 17:34:17 +00:00
Tapani Pälli
0489df9a51 glsl: set a version to standalone compiler context
Upcoming more strict context vs glsl version checks will fail otherwise.
Since standalone compiler requires ARB_ES3_2_compatibility that requires
GL 4.5 we simply set that as the context version.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31061>
2024-09-06 14:32:33 +00:00
Tapani Pälli
62799fcdd5 iris: initialize pixel struct to zero when setting clear color
Otherwise we can end up with uninitialized values, this fixes following
valgrind warning:

==71705== Uninitialised byte(s) found during client check request
==71705==    at 0x73B6DB8: util_bitpack_uint (bitpack_helpers.h:55)
==71705==    by 0x73B6DB8: GFX11_PIPE_CONTROL_pack (gen11_pack.h:19885)
==71705==    by 0x73B6DB8: iris_emit_raw_pipe_control (iris_state.c:10022)
==71705==    by 0x6F93386: iris_emit_pipe_control_write (iris_pipe_control.c:97)
==71705==    by 0x6FBCCAA: iris_resource_update_indirect_color (iris_resolve.c:1241)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30990>
2024-09-06 13:19:04 +00:00
Tapani Pälli
39a1f53890 anv: initialize pixel struct to zero when setting clear color
Otherwise we can end up with uninitialized values, this fixes following
valgrind warning:

==31283== Uninitialised byte(s) found during client check request
==31283==    at 0x503E4DE: anv_batch_bo_finish (anv_batch_chain.c:345)
==31283==    by 0x504220A: anv_cmd_buffer_end_batch_buffer (anv_batch_chain.c:1103)
==31283==    by 0x55A0E4F: end_command_buffer (genX_cmd_buffer.c:3455)
==31283==    by 0x55A0E82: gfx11_EndCommandBuffer (genX_cmd_buffer.c:3466)
==31283==    by 0x11233A: ??? (in /usr/bin/vkcube)
==31283==    by 0x10BDEE: ??? (in /usr/bin/vkcube)
==31283==    by 0x49B5149: (below main) (in /usr/lib64/libc.so.6)
==31283==  Address 0xc10c4d8 is 1,240 bytes inside a block of size 8,192 client-defined
==31283==    at 0x5036EF6: anv_bo_pool_alloc (anv_allocator.c:1284)
==31283==    by 0x503E0E1: anv_batch_bo_create (anv_batch_chain.c:262)
==31283==    by 0x5040D3F: anv_cmd_buffer_init_batch_bo_chain (anv_batch_chain.c:868)
==31283==    by 0x504F9C1: anv_create_cmd_buffer (anv_cmd_buffer.c:147)
==31283==    by 0x6B718C4: vk_common_AllocateCommandBuffers (vk_command_pool.c:206)
==31283==    by 0x4FB06B2: vkAllocateCommandBuffers (trampoline.c:1996)
==31283==    by 0x111E6B: ??? (in /usr/bin/vkcube)
==31283==    by 0x10BDEE: ??? (in /usr/bin/vkcube)
==31283==    by 0x49B5149: (below main) (in /usr/lib64/libc.so.6)

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30990>
2024-09-06 13:19:04 +00:00
Danylo Piliaiev
3886a3014d tu: Fix ZPASS_DONE having stale value with generic clear+early frag test
If the next renderpass uses the same depth attachment, clears it
with generic clear - ZPASS_DONE may somehow read stale values that
are apparently invalidated by CCU_INVALIDATE_DEPTH.

Fixes:
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_2_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_alpha_to_coverage_samples_4_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_2_maintenance5
 dEQP-VK.fragment_operations.early_fragment.sample_count_early_fragment_tests_depth_samples_4_maintenance5

When running them with TU_DEBUG=sysmem

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30858>
2024-09-06 10:01:49 +00:00
Georg Lehmann
6ac576ceb0 radv/ci: update trace checksums
Single pixel differences that are indistinguishable to my eyes.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
2024-09-06 09:16:21 +00:00
Timur Kristóf
6e000d2817 radv: Determine linked I/O info after nir_opt_varyings.
This makes it possible to not allocate I/O space
(such as LDS or VRAM) for I/O slots that were eliminated
by nir_opt_varyings.

Fossil DB stats on Rembrandt:

Totals from 896 (1.13% of 79395) affected shaders:
MaxWaves: 19452 -> 19488 (+0.19%)
Instrs: 443693 -> 443711 (+0.00%); split: -0.01%, +0.01%
CodeSize: 2331788 -> 2330904 (-0.04%); split: -0.04%, +0.01%
VGPRs: 43088 -> 42992 (-0.22%)
Inputs: 10344 -> 9198 (-11.08%)
Outputs: 7991 -> 6845 (-14.34%)
LDS: 3537408 -> 3184128 (-9.99%)
Latency: 1636786 -> 1636899 (+0.01%); split: -0.01%, +0.01%
InvThroughput: 359066 -> 358825 (-0.07%); split: -0.08%, +0.01%
VClause: 12106 -> 12109 (+0.02%); split: -0.02%, +0.05%
SClause: 6770 -> 6766 (-0.06%); split: -0.07%, +0.01%
Copies: 26532 -> 26540 (+0.03%); split: -0.02%, +0.05%
PreVGPRs: 32345 -> 32342 (-0.01%); split: -0.01%, +0.00%
VALU: 288476 -> 288501 (+0.01%); split: -0.00%, +0.01%
SALU: 44527 -> 44530 (+0.01%); split: -0.00%, +0.01%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
2024-09-06 09:16:21 +00:00
Timur Kristóf
17f6ab28cc radv: Add new linking step and use nir_opt_varyings.
The nir_opt_varyings pass is the new NIR solution for shader
linking, with new features including better I/O compaction,
packing 16-bit I/O, inter-stage code motion and more.

Fossil DB stats on Rembrandt:

Totals from 34585 (43.56% of 79395) affected shaders:
MaxWaves: 873362 -> 873260 (-0.01%); split: +0.11%, -0.12%
Instrs: 21543639 -> 21526956 (-0.08%); split: -0.27%, +0.19%
CodeSize: 115077568 -> 115015536 (-0.05%); split: -0.25%, +0.20%
VGPRs: 1465152 -> 1464192 (-0.07%); split: -0.29%, +0.22%
Inputs: 161776 -> 158711 (-1.89%); split: -1.90%, +0.00%
Outputs: 46532551993 -> 46532548680 (-0.00%); split: -0.00%, +0.00%
LDS: 70597120 -> 70794752 (+0.28%); split: -0.04%, +0.32%
Latency: 162963576 -> 162785055 (-0.11%); split: -0.25%, +0.14%
InvThroughput: 37356298 -> 37261700 (-0.25%); split: -0.37%, +0.12%
VClause: 427827 -> 427105 (-0.17%); split: -0.35%, +0.18%
SClause: 669989 -> 668623 (-0.20%); split: -0.36%, +0.15%
Copies: 1582166 -> 1582592 (+0.03%); split: -0.36%, +0.39%
Branches: 523203 -> 523789 (+0.11%); split: -0.04%, +0.15%
PreSGPRs: 1272992 -> 1273228 (+0.02%); split: -0.05%, +0.07%
PreVGPRs: 1164295 -> 1161623 (-0.23%); split: -0.43%, +0.20%
VALU: 13733432 -> 13714109 (-0.14%); split: -0.35%, +0.21%
SALU: 2828974 -> 2831841 (+0.10%); split: -0.12%, +0.22%
VMEM: 748396 -> 748500 (+0.01%); split: -0.16%, +0.18%
SMEM: 1263487 -> 1263329 (-0.01%); split: -0.03%, +0.02%

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
2024-09-06 09:16:21 +00:00
Timur Kristóf
fcb2c62b63 radv: Add NIR XFB IO intrinsic info to legacy stages not just NGG.
Some NIR passes (such as nir_opt_varyings) rely on having the
XFB info in explicit I/O intrinsics. If we want to use those,
we need to add this info.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
2024-09-06 09:16:21 +00:00
Timur Kristóf
79df320463 ac/nir: Move varying cost functions from radeonsi to common code.
This code will be shared between RADV and RadeonSI.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28676>
2024-09-06 09:16:21 +00:00
Samuel Pitoiset
5fd3be6f1b radv: stop relying on the VS for emitting VBO descriptors in DGC
This is required for experimenting indirect graphics pipelines with DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
2024-09-06 07:04:59 +00:00
Samuel Pitoiset
53c760c388 radv: pass vb_desc_usage_mask in radv_dgc_params
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
2024-09-06 07:04:59 +00:00
Samuel Pitoiset
4bd4f037b5 radv: emit all VBO descriptors in the prepare DGC shader
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
2024-09-06 07:04:59 +00:00
Samuel Pitoiset
8397e15019 radv: use radv_vbo_info for emitting descriptors with DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
2024-09-06 07:04:59 +00:00
Samuel Pitoiset
a1646f468d radv: compute rsrc3 for VBO descriptors in NIR for DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
2024-09-06 07:04:59 +00:00
Samuel Pitoiset
91fdce3f5a radv: add a helper to get VBO info for emitting descriptors
This will be used to rework VBO in DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31040>
2024-09-06 07:04:59 +00:00
Caio Oliveira
ce9e2dbc62 vk/runtime: Allow "require full subgroups" for Mesh/Task
Per description of VkPipelineShaderStageCreateFlags

```
  VK_PIPELINE_SHADER_STAGE_CREATE_REQUIRE_FULL_SUBGROUPS_BIT specifies
  that the subgroup sizes must be launched with all invocations active in
  the task, mesh, or compute stage.
```

Future CTS tests will use that.

Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31023>
2024-09-06 05:49:07 +00:00
Gurchetan Singh
1e84588887 vulkan/android: change vk_enum_defines.h path
To match everything else in vulkan/runtime.

Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31030>
2024-09-05 22:59:58 +00:00
Gurchetan Singh
bcc1950886 vulkan: fix glibc AOSP build
Certain AOSP targets feature a glibc or musl-based build,
where (__ANDROID__) isn't defined, but:

- ANDROID is defined
- the relevant headers are present.

For such builds, buffer_handle_t shouldn't be defined
internally.

Reviewed-by: Roman Stratiienko <r.stratiienko@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31030>
2024-09-05 22:59:58 +00:00
Georg Lehmann
6378bbaa82 nir/opt_algebraic: reassociate constants in ior(iand) chains
Mostly affects one F1_23 shader that packs bitfields bit by bit.

Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 5004 -> 4202 (-16.03%)
CodeSize: 30992 -> 23952 (-22.72%)
Latency: 28894 -> 28464 (-1.49%)
InvThroughput: 4095 -> 3934 (-3.93%)
Copies: 363 -> 376 (+3.58%)
PreVGPRs: 110 -> 109 (-0.91%)
VALU: 3035 -> 2504 (-17.50%)
SALU: 463 -> 459 (-0.86%)

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31009>
2024-09-05 22:04:05 +00:00
Rob Clark
0adaf92014 freedreno/drm: Fix ring_heap flags
RING_FLAGS has FD_BO_HINT_COMMAND so we can't mask out the _FD_BO_HINTS.

Fixes: a3fb2b07aa ("freedreno: Add bo usage hints")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31050>
2024-09-05 21:25:34 +00:00
Timur Kristóf
4d5bc893b4 ac/nir/tess: Remove no_inputs_in_lds.
When there are no VS outputs, we expect that the drivers set
the LS-HS vertex stride to zero, which will produce the
same result as no_inputs_in_lds did.

Remove the unnecessary code path from the output lowering.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962>
2024-09-05 19:54:29 +00:00
Marek Olšák
b7136d0890 radeonsi: pass TCS inputs_read mask to LS output lowering on GFX9 + monolithic
This will allocate less LDS for LS outputs if there are holes between
varyings when we have monolithic merged LS+TCS. (it removes the holes)

There are 2 steps to this:
- add helper si_shader_lshs_vertex_stride and use it everywhere
- pass the TCS inputs_read bitmask instead of the "map" callback
  to si_lower_ls_outputs_mem

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962>
2024-09-05 19:54:29 +00:00
Marek Olšák
52c41f25de ac/nir/tess: don't allocate LDS for HS inputs that are passed via VGPRs
Right now we don't allocate LDS for HS inputs when all HS inputs are passed
via VGPRs.

This changes it to skip allocating exactly the HS inputs passed via VGPRs
by reducing the inputs_read mask to remove holes.

radeonsi changes to the LDS allocation will be in a different MR.

Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30962>
2024-09-05 19:54:29 +00:00
Yiwei Zhang
0767f91c8a venus: avoid over-caching sfb cmds
For most runtime usages, e.g. apitrace via zink on venus, the sfb cmds
normally don't exceed 3. So a limit of 5 cmds would be enough. This
would avoid that dEQP-VK.synchronization.basic.timeline_semaphore.chain
can easily leave 700+ free cmds in the cache.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31035>
2024-09-05 19:17:22 +00:00
Faith Ekstrand
4aa1259eb4 nvk: Adverties VK_KHR_dynamic_rendering_local_read
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
84de6c12b2 nvk: Emit SET_CT_SELECT based on the dynamic color location map
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
b1abf771c7 nvk: Reset rendering attachment locations in BeginCommandBuffer/Rendering
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
9ba70bb1ed vulkan: Expose a vk_cmd_set_rendering_attachment_locations() helper
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
ea783a96b8 vulkan: Allow pColorAttachmentLocations == NULL in CmdSetRenderingAttachmentLocationsKHR()
Fixes: fe19405c46 ("vulkan/runtime: handle new dynamic states for attachment remapping")
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
c626be82f4 vulkan: Add a helper for getting VkRenderingAttachmentLocaiontInfoKHR
Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
0fd0437993 nvk: Add all_linear to nvk_rendering_state
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
e533484d06 nvk: Take depth image layer counts from the VkRenderingInfo
Otherwise OOB layers may render to the wrong layer in the depth image.
While we're here, add the same layer count asserts for color images.

Fixes: 9345b95346 ("nvk: Bind 3D depth/stencil images as 2D arrays")
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Faith Ekstrand
d7d0287237 nvk: Don't do linear<->tiled copies for rendering suspend/resume
This also fixes a bug where we were potentially emitting copy commands
after we'd called nvk_cmd_buffer_push() but before finishing the current
push.  Rust would have caught this...

Fixes: bca2f13dd8 ("nvk: enable rendering to DRM_FORMAT_MOD_LINEAR images")
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31033>
2024-09-05 17:55:21 +00:00
Erico Nunes
6f3c003433 v3dv: unconditionally expose VK_EXT_queue_family_foreign
Zink currently requires VK_EXT_queue_family_foreign to set
PIPE_CAP_DMABUF, which is one of the requirements to create a
gbm context.
v3dv already conditionally supported this extension for Android.
As it is now required for Zink in Mesa, move it to the driver's
common set.
This allows v3dv to create gbm contexts with Zink again since
this was made a stricter requirement as a side effect of
ab08b79ef7 ("gbm: use driver check for dmabuf export").

Tested with Zink on a gbm EGL application as well as sway with
the wlroots Vulkan backend, which also requires this extension.

Signed-off-by: Erico Nunes <nunes.erico@gmail.com>
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30938>
2024-09-05 15:44:01 +00:00
Boyuan Zhang
d756966a28 radeonsi/vcn/enc:enable hevc cu_qp_delta for vcn2+
Set cu_qp_delta based on value passed in, remove hardcoded values.
Only enable this for vcn2+.

V2: diff_cu_qp_delta_depth has to be 0 due to hw limitation
cu_qp_delta needs to be enabled for qp map and rc to work properly.

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31007>
2024-09-05 14:55:12 +00:00
Boyuan Zhang
5330ba8d37 frontends/va: get cu_qp_delta from vaapi
Get cu_qp_delta_enabled_flag and diff_cu_qp_delta_depth from vaapi interface

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-By: Sil Vilerino <sivileri@microsoft.com>
Reviewed-by: David Rosca <david.rosca@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31007>
2024-09-05 14:55:12 +00:00
Aleksi Sapon
13a2805325 llvmpipe: FlameGraph profiling support
For use outside Linux.

Enable dumping JIT address mappings and assembly
using an environment variable. Add a script to map
JIT addresses in collapsed stacks, and annotate
assembly dumps with sample counts.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30626>
2024-09-05 14:19:20 +00:00
Aleksi Sapon
6a3234ee3b llvmpipe: improvements to JIT assembly dump
Fix disassembly off-by-one instruction bug, add
Aarch64 support, add addresses to symbol names,
cleanup iostream usage.

Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30626>
2024-09-05 14:19:20 +00:00
David Rosca
af8c680087 vulkan/wsi: Fix stack-use-after-scope in x11_surface_create_swapchain
drm_image_params and num_modifiers are used outside the if-scope as
wsi_swapchain_init argument.

Fixes: 8f6fca89aa ("meson: delete dri3 build option")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31036>
2024-09-05 13:18:57 +00:00
David Heidelberg
63781071db panfrost: drop leftover definition after pan_nir_lower_64bit_intrin removal
Fixes: bd0d3c7b1c ("panfrost: drop pan_nir_lower_64bit_intrin")
Acked-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30994>
2024-09-05 11:02:29 +00:00
Samuel Pitoiset
165c026161 radv: add a helper to write a single vertex descriptor with DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
2024-09-05 10:29:55 +00:00
Samuel Pitoiset
374abea26b radv: pass use_per_attribute_vb_descs in radv_dgc_params
This is more like a shader metadata parameter.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
2024-09-05 10:29:55 +00:00
Samuel Pitoiset
955f148db1 radv: specialize one more VBO parameter with DGC
This covers the case when unused VBO bindings are defined with DGC.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
2024-09-05 10:29:55 +00:00
Samuel Pitoiset
e99ea580f7 radv: fix missing attribute offset with dynamic VS inputs and DGC
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31018>
2024-09-05 10:29:55 +00:00
Karol Herbst
14ebecd787 clc: fix compilation error with llvm-20
LLVM commit:
924a7d83b4

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11814
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Reviewed-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30980>
2024-09-05 09:44:03 +00:00
David Heidelberg
d16581652f ci/iris: implement nightly CL testing using piglit on ADL
Reviewed-by: Eric Engestrom <eric@igalia.com>
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29516>
2024-09-05 08:57:51 +00:00
David Heidelberg
aaa332a751 ci/freedreno: add Adreno 306/307 occasional timeout
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/31037>
2024-09-05 17:13:58 +09:00