Commit Graph

177977 Commits

Author SHA1 Message Date
Mike Blumenkrantz
d6748c72d8 egl/wayland: enable WL_bind_wayland_display for zink
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24975>
2023-09-19 02:47:31 +00:00
Mike Blumenkrantz
1b4e877def egl/wayland: use more registry listeners to better handle device init
this handles globals like dmabuf and wl_drm and also enables creating
egl devices with valid fds

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24975>
2023-09-19 02:47:31 +00:00
Mike Blumenkrantz
7ac0dbd73b egl/wayland: split out wl drm extension init
no functional changes

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24975>
2023-09-19 02:47:31 +00:00
Mike Blumenkrantz
e0e812f34a egl/swrast: expose EXT_swap_buffers_with_damage and EXT_present_opaque
Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24975>
2023-09-19 02:47:31 +00:00
David Rosca
9197dba8bc radeonsi/vcn: Don't hang GPU when using DCC surface as encoder input
Using DCC surface as encoder input will result in corrupted image in the
video, but early returning here will instead hang GPU.
Replace return with assert.

Reviewed-by: Leo Liu <leo.liu@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25259>
2023-09-18 23:08:51 +00:00
Yiwei Zhang
3166b14bd8 venus: drop device, family, index, flags tracking from vn_queue
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25262>
2023-09-18 22:33:49 +00:00
Yiwei Zhang
f5c706e438 venus: use more common vk_queue related implementations
This change uses common impl for below:
- GetDeviceQueue2
- DeviceWaitIdle

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25262>
2023-09-18 22:33:49 +00:00
Yiwei Zhang
3b58e934eb venus: use common ANB implementation
This change has a dependency over
https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25185

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25262>
2023-09-18 22:33:49 +00:00
Yiwei Zhang
4cb0da89a5 venus: use common vk_queue object
This change only updates the object base to be vk_queue.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25262>
2023-09-18 22:33:48 +00:00
Yiwei Zhang
e8a61a8a6b vulkan/android: drop vk_buffer dependency from common AHB impl
Unlike AHB image, the spec has ensured no special treatment for
allocationSize for AHB buffer export operation.

Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25263>
2023-09-18 19:25:59 +00:00
Yiwei Zhang
cd0b86fce1 vulkan/android: add missing AHARDWAREBUFFER_USAGE_GPU_DATA_BUFFER usage
An AHB backing a Vkbuffer requires AHARDWAREBUFFER_USAGE_GPU_DATA_BUFFER
usage bit, which is missed from the original ANV and RADV Android
frontends as well as the common VK Android refactor.

Cc: mesa-stable
Signed-off-by: Yiwei Zhang <zzyiwei@chromium.org>
Reviewed-by: Chia-I Wu <olvaffe@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25263>
2023-09-18 19:25:59 +00:00
Sil Vilerino
ab1bc348fc d3d12: Video - Relax ID3D12VideoDevice QI version for decode, process
Currently asking for ID3D12VideoDevice2 for process and
ID3D12VideoDevice3 for decode, which in reality they only
need ID3D12VideoDevice.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9824
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25272>
2023-09-18 19:08:12 +00:00
Ryan Neph
7a5948b3ee vulkan/android: add missed STACK_ARRAY_FINISH()
Fixes: 3c4c263dc7 ("vulkan/android: improve vkQueueSignalReleaseImageANDROID")
Signed-off-by: Ryan Neph <ryanneph@google.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25277>
2023-09-18 11:30:02 -07:00
Dave Airlie
51840bbdce nir: add a deref slot counter that handles compact
Conor suggested this, so we can mark slots properly
in the io marking.

This fixes a problem seen when rewriting llvmpipe to use
nir info instead of tgsi info.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24803>
2023-09-18 16:47:30 +00:00
Alyssa Rosenzweig
b318b3d520 nir: Remove nir_ssa_for_src
It is now unused and has no real use cases now that nir_register is gone.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25247>
2023-09-18 10:25:17 -04:00
Alyssa Rosenzweig
55333fce77 treewide: Remove remaining nir_ssa_for_src
Coccinelle missed these, a few manual changes here.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25247>
2023-09-18 10:25:17 -04:00
Alyssa Rosenzweig
d1eb17e92e treewide: Drop nir_ssa_for_src users
Via Coccinelle patch:

    @@
    expression b, s, n;
    @@

    -nir_ssa_for_src(b, *s, n)
    +s->ssa

    @@
    expression b, s, n;
    @@

    -nir_ssa_for_src(b, s, n)
    +s.ssa

Reviewed-by: Christian Gmeiner <cgmeiner@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25247>
2023-09-18 10:25:17 -04:00
Alyssa Rosenzweig
0df0980fc4 agx: Enable sinking ALU
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
4bcb62d203 nir/opt_sink: Also consider load_preamble as const
Acts like constants, schedule them like constants. This lets us move lowered
frag coord code down. Results on dolphin ubers:

   total instructions in shared programs: 195144 -> 196633 (0.76%)
   instructions in affected programs: 175737 -> 177226 (0.85%)
   helped: 28
   HURT: 27
   Instructions are HURT.

   total bytes in shared programs: 1379980 -> 1388308 (0.60%)
   bytes in affected programs: 1244250 -> 1252578 (0.67%)
   helped: 28
   HURT: 27
   Bytes are HURT.

   total halfregs in shared programs: 13591 -> 13557 (-0.25%)
   halfregs in affected programs: 2176 -> 2142 (-1.56%)
   helped: 12
   HURT: 2
   Inconclusive result (%-change mean confidence interval includes 0).

   total threads in shared programs: 233728 -> 234112 (0.16%)
   threads in affected programs: 3264 -> 3648 (11.76%)
   helped: 6
   HURT: 0
   Threads are helped.

Results on Android shader-db:

   total instructions in shared programs: 1775324 -> 1775912 (0.03%)
   instructions in affected programs: 155305 -> 155893 (0.38%)
   helped: 353
   HURT: 548
   Instructions are HURT.

   total bytes in shared programs: 11676650 -> 11678454 (0.02%)
   bytes in affected programs: 1058924 -> 1060728 (0.17%)
   helped: 370
   HURT: 547
   Inconclusive result (value mean confidence interval includes 0).

   total halfregs in shared programs: 484143 -> 471212 (-2.67%)
   halfregs in affected programs: 98833 -> 85902 (-13.08%)
   helped: 2478
   HURT: 674
   Halfregs are helped.

Instr count changes due to losing the RA lottery.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
aead5316d2 nir/opt_sink: Move ALU with constant sources
In general, sinking ALU instructions can negatively impact register pressure,
since it extends the live ranges of the sources, although it does shrink the live range
of the destination.

However, constants do not usually contribute to register pressure. This is not a
totally true assumption, but it's pretty good in practice, since...

* constants can be rematerialized (backend-dependent)
* constants can often be inlined (ISA-dependent)
* constants can sometimes be promoted to free uniform registers (ISA-dependent)
* constants can live in scalar registers although the ALU destination might need
  a vector register (and vector registers are assumed to be much more expensive
  than scalar registers, again ISA-dependent)

So, assume that constants have zero effect on register pressure. Now consider an
ALU instruction where all but one source is a constant. Then there are two
cases:

1. The ALU instruction is moved past when its source was otherwise killed. Then
   there is no effect on register pressure, since the source live range is
   extended exactly as much as the destination live range shrinks.

2. The ALU instruction is moved down but its source is still alive where it's
   moved to. Then register pressure is improved, since the source live range is
   unchanged while the destination live range shrinks.

So, as a heuristic, we always move ALU instructions where n-1 sources are
constant. As an inevitable special case, this also (necessarily) moves unary ALU
ops, which should be beneficial by the same justification. This is not 100%
perfect but it is well-motivated. Results on AGX are decent:

   total instructions in shared programs: 1796101 -> 1795652 (-0.02%)
   instructions in affected programs: 326822 -> 326373 (-0.14%)
   helped: 800
   HURT: 371
   Inconclusive result (%-change mean confidence interval includes 0).

   total bytes in shared programs: 11805004 -> 11801424 (-0.03%)
   bytes in affected programs: 2610630 -> 2607050 (-0.14%)
   helped: 912
   HURT: 462
   Inconclusive result (%-change mean confidence interval includes 0).

   total halfregs in shared programs: 525818 -> 515399 (-1.98%)
   halfregs in affected programs: 118197 -> 107778 (-8.81%)
   helped: 2095
   HURT: 804
   Halfregs are helped.

   total threads in shared programs: 18916608 -> 18917056 (<.01%)
   threads in affected programs: 4800 -> 5248 (9.33%)
   helped: 7
   HURT: 0
   Threads are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
561df40211 nir/opt_sink: Do not move derivatives
At the moment, this does nothing. It will prevent problems from the next patch,
however.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
469fd36fba nir/opt_sink: Sink frag coord instructions
load_input-like. ubershaders:

   instructions in affected programs: 72392 -> 72522 (0.18%)
   helped: 8
   HURT: 18
   Inconclusive result (value mean confidence interval includes 0).

   total bytes in shared programs: 1468550 -> 1469170 (0.04%)
   bytes in affected programs: 560486 -> 561106 (0.11%)
   helped: 10
   HURT: 17
   Inconclusive result (value mean confidence interval includes 0).

   total halfregs in shared programs: 13946 -> 13898 (-0.34%)
   halfregs in affected programs: 3642 -> 3594 (-1.32%)
   helped: 21
   HURT: 0
   Halfregs are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
c07a9dca65 nir/opt_sink: Sink load_local_pixel_agx
This is the AGX version of load_output, which shaders can use for framebuffer
fetch. It is beneficial to sink framebuffer fetch as late as possible, both to
reduce register pressure but also to reduce serialization of overlapping
fragments.

Results on a collection of ubershaders:

   total bytes in shared programs: 1468928 -> 1468550 (-0.03%)
   bytes in affected programs: 495300 -> 494922 (-0.08%)
   helped: 24
   HURT: 0
   Bytes are helped.

   total halfregs in shared programs: 14162 -> 13946 (-1.53%)
   halfregs in affected programs: 5148 -> 4932 (-4.20%)
   helped: 27
   HURT: 0
   Halfregs are helped.

   total threads in shared programs: 216896 -> 217664 (0.35%)
   threads in affected programs: 6912 -> 7680 (11.11%)
   helped: 12
   HURT: 0
   Threads are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
596682ad4b nir/opt_sink: Sink load_constant_agx
By the time this runs, we will have already lowered load_ubo and load_vbo to
load_constant_agx so we need to handle the backend version.

This is very important for reducing register pressure in monolithic VS+GS
shaders on AGX. Since no other backend has _agx intrinsics, there's no need for
an option to gate this.

The additional instruction count is from more frequent wait instructions due to
fewer instructions grouped together. This should be mitigated in the future with
an ACO-style latency-reducing scheduler in the backend, after register pressure
is reduced by opt_sink.

total instructions in shared programs: 1793385 -> 1796101 (0.15%)
instructions in affected programs: 199816 -> 202532 (1.36%)
helped: 3
HURT: 941
Instructions are HURT.

total bytes in shared programs: 11799628 -> 11805004 (0.05%)
bytes in affected programs: 1345656 -> 1351032 (0.40%)
helped: 34
HURT: 919
Bytes are HURT.

total halfregs in shared programs: 533151 -> 525818 (-1.38%)
halfregs in affected programs: 40335 -> 33002 (-18.18%)
helped: 613
HURT: 42
Halfregs are helped.

total threads in shared programs: 18910464 -> 18916608 (0.03%)
threads in affected programs: 6144 -> 12288 (100.00%)
helped: 12
HURT: 0
Threads are helped.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:16 -04:00
Alyssa Rosenzweig
d628be082b nir/gather_info: Use nir_op_is_derivative
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:15 -04:00
Alyssa Rosenzweig
6d3425653a nir/opt_gcm: Use nir_op_is_derivative more
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:15 -04:00
Alyssa Rosenzweig
e0246ed8e4 nir/opt_preamble: Use nir_op_is_derivative
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:15 -04:00
Alyssa Rosenzweig
1a788a86c1 nir: Hoist nir_op_is_derivative
Redefine in terms of the algebraic property. This correctly handles the
Mali-specific derivatives.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:15 -04:00
Alyssa Rosenzweig
b77dc9f7d7 nir: Add NIR_OP_IS_DERIVATIVE property
Like IS_SELECTION.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24833>
2023-09-18 08:38:15 -04:00
Rhys Perry
f6f9c07efe radv: disable mesh dispatch XYZ_DIM when possible
Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25222>
2023-09-18 12:04:06 +00:00
Rhys Perry
6dd751b3b9 aco: remove unused p_logical_end check when optimizing branching sequence
I don't see why a p_logical_end is expected or required. It might not be
present in some situations, which causes an assertion failure:
 s2: %19646:s[0-1] = p_reload %19701:v[8], 11
 s2: %0:exec,  s1: %8817:scc = s_andn2_b64 %19646:s[0-1], %0:exec
 s2: %8818:s[20-21] = p_cbranch_z %0:exec BB1116, BB1114

No fossil-db changes (gfx1100).

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25244>
2023-09-18 11:19:28 +00:00
Rhys Perry
8d5bd3ca48 aco: check logical_phi_info at p_logical_end when eliminating exec writes
This is when the copies actually happen, not at the branch.

fossil-db (gfx1100):
Totals from 1 (0.00% of 79332) affected shaders:
Instrs: 424 -> 423 (-0.24%)
CodeSize: 2172 -> 2168 (-0.18%)
Latency: 2899 -> 2896 (-0.10%)
Copies: 24 -> 23 (-4.17%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25244>
2023-09-18 11:19:28 +00:00
Mark Collins
87b79078b5 meson: Update libarchive to v3.7.2-2
The wrapdb build script used by v3.7.1-2 would lead to compilation
errors when using glibc which gated id_t's definition behind the
_GNU_SOURCE define which wasn't specified while scanning for types,
this was fixed upstream in wrapdb in v3.7.2-2.

Signed-off-by: Mark Collins <mark@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25269>
2023-09-18 11:01:02 +00:00
Rhys Perry
ac48334ecd aco/optimizer_postRA: check overwritten_subdword in is_overwritten_since()
Fixes crash for
dEQP-VK.mesh_shader.ext.in_out.with_f16.permutation_0.mesh_only and
similar tests on GFX11.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Fixes: 3d29779a25 ("aco/optimizer_postRA: Distinguish overwritten untrackable and subdword.")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25223>
2023-09-18 10:26:16 +00:00
Vinson Lee
92012c9bec freedreno/replay: Fix implicit-function-declaration error
../src/freedreno/decode/replay.c: In function ‘safe_ioctl’:
../src/freedreno/decode/replay.c:608:13: error: implicit declaration of function ‘ioctl’ [-Werror=implicit-function-declaration]
  608 |       ret = ioctl(fd, request, arg);
      |             ^~~~~

Fixes: e3bbd1688b ("freedreno/replay: Add limited support for KGSL")
Signed-off-by: Vinson Lee <vlee@freedesktop.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25264>
2023-09-18 09:45:48 +00:00
Pierre-Eric Pelloux-Prayer
63a3a9b23b st/mesa: check renderbuffer before using it
rb being NULL is only checked for in the caller if no-error isn't
used.

cc: mesa-stable

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9747
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25209>
2023-09-18 08:18:39 +00:00
Pierre-Eric Pelloux-Prayer
af27ecb089 device_select: add shortcut for MESA_VK_DEVICE_SELECT_FORCE_DEFAULT_DEVICE
MESA_VK_DEVICE_SELECT_FORCE_DEFAULT_DEVICE=1 is useful but it's tedious
to type. This commit extends slightly DRI_PRIME/MESA_VK_DEVICE_SELECT
syntax support: if "!" is appended at the end then only the selected GPU
will be made visible to the application.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:28 +00:00
Pierre-Eric Pelloux-Prayer
b935ce0131 docs: update DRI_PRIME documentation
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:27 +00:00
Pierre-Eric Pelloux-Prayer
201662659e device_select_layer: support DRI_PRIME=n
For feature-parity with OpenGL.
See commit "loader: extend DRI_PRIME to support =N".

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:27 +00:00
Pierre-Eric Pelloux-Prayer
ea84b85887 loader: add DRI_PRIME_DEBUG env var
This makes debugging non-working DRI_PRIME selection much easier.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:27 +00:00
Pierre-Eric Pelloux-Prayer
b8d0b1ceb5 loader: extend DRI_PRIME to support =N
DRI_PRIME=1 isn't useful on machines with more than 2 GPUs.

This commit adds support to DRI_PRIME=N syntax meaning: select
the Nth GPU (not counting the default GPU).

So on a 3 GPUs system where drmGetDevices2 returns the following:

   /dev/dri/renderD130 [default]
   /dev/dri/renderD129
   /dev/dri/renderD128

DRI_PRIME=1 would select D129 (as is already the case without this
commit), DRI_PRIME=2 would select D128.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:27 +00:00
Pierre-Eric Pelloux-Prayer
d052baf190 loader: refactor DRI_PRIME handling code
DRI_PRIME has 3 different meanings and this refactoring
separate the handling of them.
No functional changes.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:27 +00:00
Pierre-Eric Pelloux-Prayer
06a3bb75e3 glx: drop the 'libGL' log prefix
Suggested by @ajax in !24750.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24750>
2023-09-18 07:45:27 +00:00
Samuel Pitoiset
fa4d4f84a1 ac/spm: enable support for multi-instance counters
This is what RGP expects and this will give us more fine grained
results given that all shader engines/shader arrays etc would be
sampled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:32 +00:00
Samuel Pitoiset
414783162a ac/spm: move the counter instance to ac_spm_counter_create_info
This will allow us to configure multi-instance counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:32 +00:00
Samuel Pitoiset
d5a5473185 ac,radv,radeonsi: prepare support for multi-instance SPM generic counters
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:31 +00:00
Samuel Pitoiset
ed0d3d8cbd ac,radv,radeonsi: prepare support for multi-instance SPM SQ counters
Each SQG modules can configure up to 16 counters.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:31 +00:00
Samuel Pitoiset
af4d4f5203 ac/spm: fix number of instances of GL2C
It's a global block, so the number of instances is equal.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:31 +00:00
Samuel Pitoiset
0e4d5b171a radv,radeonsi: make sure to emit GRBM_GFX_INDEX before SQ select registers
This was missing, but not sure if it was required given that only the
first SE is currently sampled.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:31 +00:00
Samuel Pitoiset
3e8922d9f7 ac/spm: select correct segment type for per-SE blocks
This currently does nothing because only the first instance is used,
but this will be needed for multi-instance.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25240>
2023-09-18 07:07:31 +00:00