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Author SHA1 Message Date
Mike Blumenkrantz
8aa43d70e1 egl/wayland: don't block in swrast when updating buffers for zink 
this is broken, let vulkan wsi handle buffer management

Fixes: 74451ed3f0 ("egl/wayland: wait for compositor to release shm buffers")

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24700>
 2023-10-06 04:53:40 +00:00
Mike Blumenkrantz
e213623a8c Revert "egl/wayland: Add image loader extension for swrast" 
This reverts commit 45b9b0ba32.

Acked-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24700>
 2023-10-06 04:53:40 +00:00
Emma Anholt
4b9c3c76d0 ci/hasvk: Add a bunch of new CTS border color fails. 
pretty sure this is from new coverage since the CTS uprev..

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25574>
 2023-10-06 04:06:29 +00:00
Emma Anholt
762210e224 ci/crocus: Add known piglit flakes 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25574>
 2023-10-06 04:06:29 +00:00
Emma Anholt
c6788a1616 ci/etnaviv: return gl-1.4-tex1d-2dborder as a known flake 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25574>
 2023-10-06 04:06:29 +00:00
Simon Zeni
2d09ae30e1 nouveau/winsys: use mmap instead of mmap64 in nouveau_bo 
The function `mmap64` is part of the large file extension and should not be
called directly. Instead `mmap` should be use and let the system use the
correct interface.

Signed-off-by: Simon Zeni <simon.zeni@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25569>
 2023-10-06 03:39:14 +00:00
Chia-I Wu
dcb764b0f0 radv: hard code format features for emulated formats 
The format features are known.  No need to rely on
radv_is_sampler_format_supported which will not work for ASTC.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
99e54c39f6 radv: simplify view format override for emulated formats 
Override the view format to the format of plane 1 when the view format
is also emulated.  There is no functional change.

v2: check iview->vk.format directly (@yogeshmohan)

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
55b7d6e5a3 radv: add radv_is_format_emulated 
This is a cleanup with no functional change.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
9eda61c931 vulkan/runtime, radv: remove 1D support from ETC2 emulation 
The nir code deos not support 1D.  There is also no point in supporting
1D ETC2 images.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
fb40fb595b vulkan/runtime: fix a harmless typo for ETC2 emulation 
Init input_img_3d correctly.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
9c98be7115 vulkan/runtime: fix image type check for ETC2 emulation 
There was a typo causing the wrong push constant to be loaded.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
afdbeaf1b4 radv: use vk_tecompress_etc2 from the runtime 
There are some minor differences

 - fix incorrectly use of device->meta_state.resolve_compute.p_layout
 - when on_demand is true, the creation of ds and pipeline layouts are
   also deferred
 - unlike radv_meta_get_view_type, vk_texcompress_etc2_image_view_type
   returns 1d/2d array image views

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Chia-I Wu
0337b5d8c4 vulkan/runtime: add a helper for ETC2 emulation 
This is based on radv's ETC2 emulation.  There is no real change to the
generated NIR shader.

v2: rename vk_texcompress_etc2_image_format to vk_texcompress_etc2_emulation_format
    update the comments

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25071>
 2023-10-06 00:55:18 +00:00
Danylo Piliaiev
7caf3e70a1 tu: Fix VK_FORMAT_A8_UNORM_KHR using UBWC when !has_8bpp_ubwc 
Fixes hangs in Anno 1800 with DXVK 2.3

Fixes: 302907e347
("tu: Expose VK_KHR_maintenance5")

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25567>
 2023-10-05 22:36:06 +00:00
Konstantin Seurer
ac838c1c5c mesa: Fix glBegin/End when LINE_LOOP is not supported 
Emits the first vertex inside glEnd.

cc: mesa-stable

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25346>
 2023-10-05 21:52:37 +00:00
Georg Lehmann
7b4f0e714c aco/gfx11: support vinterp as fma_mix 
Totals from 718 (0.94% of 76572) affected shaders:
Instrs: 657897 -> 654219 (-0.56%)
CodeSize: 3471668 -> 3457352 (-0.41%); split: -0.41%, +0.00%
VGPRs: 34200 -> 34164 (-0.11%)
Latency: 11687698 -> 11677030 (-0.09%); split: -0.10%, +0.00%
InvThroughput: 1455371 -> 1451537 (-0.26%); split: -0.26%, +0.00%
VClause: 7598 -> 7600 (+0.03%)
SClause: 18293 -> 18241 (-0.28%); split: -0.44%, +0.15%
Copies: 34641 -> 34644 (+0.01%); split: -0.05%, +0.06%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25220>
 2023-10-05 20:02:53 +00:00
Georg Lehmann
7d7657ef74 aco: support v_fma_f32_dpp as fma_mix 
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25220>
 2023-10-05 20:02:53 +00:00
Georg Lehmann
5e9fad48bf aco/gfx11: apply clamp/omod to vinterp 
Totals from 2504 (3.27% of 76572) affected shaders:
MaxWaves: 74098 -> 74106 (+0.01%)
Instrs: 1829278 -> 1823427 (-0.32%); split: -0.32%, +0.00%
CodeSize: 9775908 -> 9759308 (-0.17%); split: -0.18%, +0.01%
Latency: 13494107 -> 13485390 (-0.06%); split: -0.10%, +0.04%
InvThroughput: 2052428 -> 2048724 (-0.18%); split: -0.18%, +0.00%
VClause: 26637 -> 26640 (+0.01%); split: -0.04%, +0.05%
SClause: 62027 -> 61988 (-0.06%); split: -0.14%, +0.08%
Copies: 73776 -> 73815 (+0.05%); split: -0.07%, +0.12%
PreVGPRs: 84403 -> 84397 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25220>
 2023-10-05 20:02:53 +00:00
Marek Olšák
7196b5318d Revert "ac/gpu_info: replace ib_alignment with per-IP IB base and size alignments" 
This reverts commit b6f435888b.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>
 2023-10-05 19:12:29 +00:00
Marek Olšák
5f42a21dad Revert "ac/gpu_info: pad IBs according to ib_size_alignment" 
This reverts commit 4f660f9937.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>
 2023-10-05 19:12:29 +00:00
Marek Olšák
29f9c49228 Revert "winsys/amdgpu: pad gfx and compute IBs with a single NOP packet" 
This reverts commit 43e7285069.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>
 2023-10-05 19:12:29 +00:00
Marek Olšák
461cb2fd77 Revert "radv: fix alignment of DGC command buffers" 
This reverts commit b01e874234.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>
 2023-10-05 19:12:29 +00:00
Marek Olšák
94f117ec9b Revert "radv/amdgpu: fix alignment of command buffers" 
This reverts commit 4bc58c9f11.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>
 2023-10-05 19:12:29 +00:00
Marek Olšák
b4be110333 Revert "ac/gpu_info: override ib_size_alignment for VCN_DEC and JPEG" 
This reverts commit 867a995ce7.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25558>
 2023-10-05 19:12:29 +00:00
David Heidelberg
194bcef733 ci/bare-metal: drop unused imports, sort, use SPDX license 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25285>
 2023-10-05 17:10:20 +00:00
David Heidelberg
daf1df9b70 ci/bare-metal: correct workaround for R8152 issue while retrieving TFTP data 
1. Move block used for detecting R8152 problems to the bootloader
phase where it belongs. Also remove requirement to 100 failures and just
retry immediatelly.

2. Consider job failed after 10 errors, not 100. From the logs on
   cheza-14, ~ 30 errors is enough to fail.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25285>
 2023-10-05 17:10:20 +00:00
Erik Faye-Lund
9c2212f9b3 docs/panfrost: use math-role to denote powers of two 
We do this elsewhere in the article, so let's be consistent here.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24921>
 2023-10-05 15:49:46 +00:00
Erik Faye-Lund
80e8c78fed docs/panfrost: use code-blocks with wrapping for long blocks 
This makes it a lot easier to read the code-blocks, because we don't
*always* need to scroll.

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24921>
 2023-10-05 15:49:46 +00:00
Erik Faye-Lund
3e27d8f2d4 docs/panfrost: link to lima 
In the age of the internet, we can use hyperlinking to content instead
of just telling users about something! Let's do that here as well!

Reviewed-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/24921>
 2023-10-05 15:49:46 +00:00
Samuel Pitoiset
2e5d2df362 radv/ci: cleanup list of expected failures for NAVI10/NAVI21/VEGA10 
These are flakes, not failures. Remove them from the list of expected
failures to avoid confusion.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25557>
 2023-10-05 15:08:37 +00:00
Samuel Pitoiset
0c4b4000aa radv/ci: remove no longer existing test for VANGOGH 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25557>
 2023-10-05 15:08:37 +00:00
Samuel Pitoiset
be32502979 radv: fix synchronization with emulated GS primitives/invocations queries 
Move emitting the EOP even which writes the availability bit after the
GDS copy to ensure it's available.

This should fix all GS primitives/invocations flakes in CI.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25457>
 2023-10-05 14:17:56 +00:00
Samuel Pitoiset
f2819c3870 radv/ci: exclude dEQP-VK.texture.explicit_lod.2d.sizes.128x128_* for all jobs 
These tests usually take more than 20s to finish which is slow.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25556>
 2023-10-05 12:34:59 +00:00
Samuel Pitoiset
aabf53ce6b radv/ci: remove duplicate skipped tests for RAVEN/STONEY 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25556>
 2023-10-05 12:34:59 +00:00
Georg Lehmann
34d8fa6185 aco/gfx11: optimize dual source export 
We can combine dpp with the v_cndmask_b32.

Foz-DB Navi31:
Totals from 222 (0.28% of 79330) affected shaders:
Instrs: 564392 -> 563373 (-0.18%); split: -0.19%, +0.01%
CodeSize: 2867040 -> 2864728 (-0.08%); split: -0.09%, +0.01%
Latency: 4278957 -> 4275199 (-0.09%); split: -0.09%, +0.00%
InvThroughput: 586636 -> 585824 (-0.14%); split: -0.14%, +0.00%
SClause: 20210 -> 20211 (+0.00%); split: -0.02%, +0.02%
Copies: 39763 -> 39778 (+0.04%); split: -0.13%, +0.17%
PreVGPRs: 13924 -> 13922 (-0.01%)

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25541>
 2023-10-05 10:37:34 +00:00
Ganesh Belgur Ramachandra
e3e47aa96e radeonsi: "clear_12bytes_buffer" shader in nir 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25221>
 2023-10-05 09:43:11 +00:00
Ganesh Belgur Ramachandra
3f44a8321f radeonsi: "clear_render_target_1d_array" shader in nir 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25221>
 2023-10-05 09:43:11 +00:00
Ganesh Belgur Ramachandra
d0b14c56ea radeonsi: "clear_render_target" shader in nir 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25221>
 2023-10-05 09:43:11 +00:00
Marek Olšák
9f569acf20 ac/surface: don't require exact pitch for gfx6-8 tiled imports 
It was reported that it broke Stoney. Something probably uses a suboptimal
pitch, like minigbm.

Fixes: 7d066330e0 - ac/surface: relax custom pitch requirements to any multiple of 256B on gfx10.3+

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25540>
 2023-10-05 07:27:02 +00:00
Marek Olšák
340218c51e radeonsi: upload shaders via a staging buffer so as not to map VRAM directly 
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25494>
 2023-10-04 23:53:19 -04:00
Marek Olšák
23af6d3d35 radeonsi: add another aux context for uploading shaders 
When the first auxiliary context is locked and wants to compile and upload
a shader asynchronously, we need to use another auxiliary context
in the compiler thread because the first one is locked at that point.

This adds an array of auxiliary contexts into si_screen and changes how aux
contexts are accessed.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25494>
 2023-10-04 23:53:16 -04:00
Sviatoslav Peleshko
8361cd4c4c intel/eu/validate: Validate "packed word exception" stricter 
Fixes: 75b7f5a2 ("i965: Validate "Region Alignment Rules"")
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25378>
 2023-10-05 01:41:42 +00:00
Sviatoslav Peleshko
8f23b45252 intel/fs: Fix "packed word exception" condition for register regioning 
Fixes: a6bf5f88 ("i965/fs: Enforce common regioning restrictions by SIMD splitting.")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9432
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25378>
 2023-10-05 01:41:42 +00:00
Faith Ekstrand
922bd13152 nvk: Use align() and align64() instead of ALIGN_POT 
For one thing, they actually assert that the alignment factor is a power
of two.  More importantly, though, because they're real functions and
not macros, they up-cast the alignment to a full uint32_t or uint64_t
before doing the alignment calculation.  If you do ALIGN_POT() on a
64-bit value with a 32-bit alignment, it truncates to 32 bits because
the NOT is done before the up-cast due to C implicit cast rules.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25555>
 2023-10-04 20:15:55 -05:00
Faith Ekstrand
07744ba67e nvk: Handle zero-sized sparse buffers 
In the zero case, we don't want to allocate any VMA.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25555>
 2023-10-04 20:15:54 -05:00
Konstantin Seurer
20e8760c75 zink: Enable edge flags with points 
Fixes: 90a8525 ("zink: handle edgeflags")
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25335>
 2023-10-04 23:20:52 +00:00
Konstantin Seurer
4625e18619 nir/passthrough_gs: Support edge flags with points 
Fixes: 24535ff ("nir: handle edge flags in nir_create_passthrough_gs")
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25335>
 2023-10-04 23:20:52 +00:00
Konstantin Seurer
3bf60f904b zink: Initialize primitive types to an invalid value 
The memory is zero initialized which corresponds to MESA_PRIM_POINTS.

Fixes: 659c39f ("zink: rework primitive rasterization type logic")
Reviewed-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25335>
 2023-10-04 23:20:52 +00:00
Leo Liu
867a995ce7 ac/gpu_info: override ib_size_alignment for VCN_DEC and JPEG 
With the commit 4f660f99 ("ac/gpu_info: pad IBs according to ib_size_alignment"),
we found kernel isn't reporting ib_base/size_alignment correctly, thus causing
VCN_DEC and JPEG functions broken. We will fix the kernel and bump the kernel
version, and now for the older kernel, we need this override.

closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9916

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25511>
 2023-10-04 22:58:47 +00:00