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54 Commits

Author SHA1 Message Date
Alyssa Rosenzweig
14f2be1f33 agx: Use 16-bit immediates 
This is slightly more accurate in the IR, and means we instruction
select the current 16-bit size floating point instructions when all
non-immediate operands are 16-bit.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18687>
 2022-09-22 03:23:36 +00:00
Alyssa Rosenzweig
a1faab0b90 agx: Convert and clamp array indices in NIR 
..Rather than at backend IR translation time. This is considerably
simpler because we can use the txs lowering instead of special casing
array sizes. Unfortunately it generates worse code, but that gap should
close once nir_opt_preamble is wired in.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18652>
 2022-09-19 16:14:24 +00:00
Alyssa Rosenzweig
0883f0b302 agx: Lower txs to a descriptor crawl 
There's no native txs instruction... but we can emulate one :-) This is
heavy on shader ALU, but in the production driver, it'll all be hoisted
up to the preamble shader and so it shouldn't matter much. This
keeps the driver itself simple and low overhead, with a completely
obvious generalization to bindless.

Passes dEQP-GLES3.functional.shaders.texture_functions.texturesize.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
 2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
965cc62bdd agx: Implement txd 
Handles all cases except for cube maps, which don't seem to work
properly, so those are lowered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
 2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
7a4e0a4d35 agx: Implement texture offsets and comparators 
Texture offsets and shadow comparison values get grouped into a vector
passed by register. Comparison values are provided as-is (fp32). Texture
offsets are packed into nibbles, but we can do this on the CPU, as
nonconstant offsets are forbidden in GLSL at least. They're also
forbidden in Vulkan/SPIR-V without ImageGatherExtended/
shaderImageGatherExtended. I'm happy kicking the NIR lowering can down
the line, this commit is complicated enough already.

Passes dEQP-GLES3.functional.shaders.texture_functions.texture.* and
dEQP-GLES3.functional.shaders.texture_functions.textureoffset.*

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18525>
 2022-09-13 16:04:29 +00:00
Alyssa Rosenzweig
44d79d39b6 agx: Defeature indirect vbufs 
vb_mask can include garbage vbufs, we can't rely on it. This will
prevent a regression when switching to u_blitter based clears. This is
also simpler and shrinks the VS shader key so all in all a good thing.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18380>
 2022-09-04 18:05:31 +00:00
Alyssa Rosenzweig
24c3084411 agx: Add AGX_MESA_DEBUG=noopt option 
To disable the optimizer. Trying to root cause a Neverball bug, this
gives one less thing to worry.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
 2022-08-07 20:43:53 -04:00
Alyssa Rosenzweig
f3877f56ba asahi,agx: Rewrite varying linking 
Instead of using driver_location magic and hoping things work, make the
linkage between vertex and fragment shaders explicit. Thanks to the
coefficient register mechanism reverse-engineered and documented earlier
in this series, this does not require any shader keys to support
separable shaders. It just requires that we regenerate the coefficient
register binding tables at draw time, based on the varying layouts
decided by the compiler independently for the VS and FS. This is more
robust in the face of separate shaders.

This also gets us glProvokingVertex() support without shader keys.

After that, we don't need any of the remapping prepasses. For fragment
shaders, any old mapping will do, so we can assign coefficient registers
as we go (based on what the program actually uses, not nir_variable
information that might be stale by this point). We do want to cache
coefficient registers, particularly for fragcoord.w which is used for
perspective interpolation everywhere.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17198>
 2022-08-07 20:43:26 -04:00
Alyssa Rosenzweig
18ef9398de agx: Remove nir_register support 
We don't use it anymore, now that we can handle SSA form. Gets rid of
the most gross hack in the compiler.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
3927a9e911 agx: Remove has_liveness 
Given we do no metadata tracking, this is an accident waiting to happen.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
6b22bbab36 agx: Add validation pass 
For now, just check that we didn't botch the structure of the block,
since this just bit me.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
8ff0a29baf agx: Translate phi nodes 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
590df764d6 agx: Introduce worklist infrastructure 
Using the common NIR stuff.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
e414a8c16f agx: Add agx_after_block_logical helper 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
5be26e8624 agx: Add predecessor index helper 
To order phi sources.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
3f1e926bf4 agx: Use a dynarray for predecessors 
This imposes a fixed ordering, allowing phi sources to be implicitly ordered.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
4f78141c77 agx: Emit splits for intrinsics 
This allows optimizing the extracts.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
4fc023ed42 agx: Use a transfer graph for parallel copies 
Lifted from ir3. Algorithm is the same; the data structures and interface are
lightly modified to decouple from ir3's IR.

Sequentializing parallel copies after RA is tricky. ir3's implementation works
well enough, so I use that one.

Original implementation by Connor Abbott.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 22:00:00 -04:00
Alyssa Rosenzweig
5bc65ef963 agx: Add a hash table for vector extracts 
This will allow us to introduce splits gradually, giving a graceful fallback.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
2a4a8a8902 agx: Add p_split pseudoinstruction 
Easier on RA for extracts.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
bb1fb0a9db agx: Dynamically allocate agx_instr->src 
Required for phi nodes.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
7d38bcb7ee agx: Use pseudo ops for mov/not/and/xor/or 
Rather than using builder magic (implicitly lowered on emit), add actual pseudo
operations (explicitly lowered before encoding). In theory this is slower, I
doubt it matters. This makes the instruction aliases first-class for IR prining
and machine inspection, which will make optimization passes easier to write.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
43c701424b agx: Wrap compiler header in extern "C" 
So we can use it from GTest.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
b87ce10210 agx: Match order for designated initializers 
Required to compile our headers with C++, to allow us to use GTest unit tests.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
81477f3809 agx: Implement some shader-db stats 
Instructions, bytes, and registers -- this should hold us over until we
can reverse the underlying uarch and get proper cycle estimations.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16268>
 2022-05-01 21:58:29 -04:00
Alyssa Rosenzweig
0c2bbb470a agx: Add agx_size_align_16 helper 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14903>
 2022-02-18 23:48:32 +00:00
Alyssa Rosenzweig
d5b7d629d7 agx: Add AUTO_LOD_BIAS mode 
Automatic load with a bias.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14899>
 2022-02-06 15:02:39 +00:00
Alyssa Rosenzweig
1d0008734c agx: Ensure we don't overallocate registers 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
 2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig
7e65e47d19 agx: Pipe in nir_register 
This is kind of lazy...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
 2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig
85e18deb18 agx: Assign registers locally 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11751>
 2021-07-07 03:31:43 +00:00
Alyssa Rosenzweig
e847bffbcc agx: Fix LOD_MIN enum 
Fixes: 2470a080d2 ("agx: Stub NIR backend compiler")
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
a1f732e67b agx: Track logical control flow graph 
Logic lifted from the Bifrost compiler, which was a copypaste of the Midgard
compiler, which was based on a faulty understanding of the v3d compiler,
which...

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
0ef93554e1 agx: Mark sources that kill 
Trivially computed during liveness analysis (already a byproduct!) and required
for efficient register allocation.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
7972e74f40 agx: Add liveness analysis pass 
Based on the Panfrost one, scalarized and with some silly things fixed.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
ec40620f86 agx: Add agx_exit_block helper 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
6a657b17b9 agx: Remap fragment shader varyings explicitly 
Needed to handle fragcoord.z correctly, for example. Step 1, at least.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
32f4be5dd7 agx: Rename agx_pack to agx_pack_binary 
Conflicts with GenXML.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:04 +00:00
Alyssa Rosenzweig
99b67ab355 agx: Add perspective bit to ld_var 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
ef808205c6 agx: Add agx_immediate_f helper 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11718>
 2021-07-05 20:56:03 +00:00
Alyssa Rosenzweig
307b8f1b2f agx: List sr enum in Python 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11199>
 2021-06-05 20:38:22 +00:00
Alyssa Rosenzweig
e9483110d2 agx: Zero r0l before first use of control flow 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
4fe03cf97c agx: Add inner loop nesting count field 
Needed for proper handling of break/continue with nested if-else.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
8454d08aa3 agx: Add branch target to IR 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
ad4dfb3321 agx: Add invert_cond (ccn) to IR 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
21cf528e76 agx: Add nest field to IR 
Needed to model control flow instructions.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
6f54385b0a agx: Track block offsets 
For fixing branch offsets.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
f7918ebc82 agx: Track current_block 
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11023>
 2021-05-31 01:23:35 +05:30
Alyssa Rosenzweig
1b9b2f9046 agx: Condition writeout ops on already being emitted 
There's a lot of r/e waiting here, but will be needed for ld_tile. Match
the Metal blob.

Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10720>
 2021-05-09 23:29:45 -04:00
Alyssa Rosenzweig
1f23e9c06e agx: Add sysval management helper 
Will be used for lowering UBO loads, among other applications.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:17 -04:00
Alyssa Rosenzweig
0f58e8dabe agx: Add dead code eliminator 
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10582>
 2021-05-02 17:41:16 -04:00