OpenHarmony/third_party_mesa3d
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
59,313 Commits 9 Branches 1 Tag
d1d3b1e3617f84523cd581e3c12d7715d496e19b
Commit Graph

28 Commits

Author SHA1 Message Date
Ilia Mirkin
12d39b4fa8 gallium: add PIPE_CAP_MIXED_FRAMEBUFFER_SIZES 
This CAP will determine whether ARB_framebuffer_object can be enabled.
The nv30 driver does not allow mixing swizzled and linear zsbuf/cbuf
textures.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
 2013-10-26 01:36:07 +02:00
Chia-I Wu
ce87c51e9a ilo: add ILO_DEBUG=flush 
When specified, ilo will print a line similar to

  cp flushed for render with 949+888 DWords (22.4%) because of frame end

for every ilo_cp_flush() call.
 2013-08-20 13:54:39 +08:00
Chia-I Wu
216a576e11 ilo: add ILO_DEBUG=draw 
It can print out pipe_draw_info and the dirty bits set, useful for debugging.
 2013-08-20 13:54:38 +08:00
Christian König
a15cbabb8b vl: add entrypoint to get_video_param 
Signed-off-by: Christian König <christian.koenig@amd.com>
 2013-08-19 10:21:15 +02:00
Rico Schüller
d1ba1055d9 vl: Add support for max level query v2 
This patch adds the level query support to the video decoders
and uses some more reasonable defaults.

v2: (ck) add commit message

Reviewed-by: Christian König <christian.koenig@amd.com>
 2013-08-14 13:20:01 +02:00
Tom Stellard
4e90bc9a12 gallium: Add PIPE_CAP_ENDIANNESS 
Cc: mesa-stable@lists.freedesktop.org
[ Francisco Jerez: Fix "PIPE_ENDIAN_SMALL" in the documentation,
  define PIPE_ENDIAN_NATIVE. ]
 2013-07-22 22:43:17 +02:00
Chia-I Wu
79bc245c01 ilo: reduce PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS to 12 
So that there are at most (2^22 * 6) texels, lower than the 2^26 limit.
 2013-07-11 08:03:27 +08:00
Marek Olšák
30c3e8718d mesa,glsl,gallium: remove GLSLSkipStrictMaxVaryingLimitCheck and dependencies 
Not needed with do_dead_builtin_varyings.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
 2013-07-02 17:02:14 +02:00
Chia-I Wu
95c21f12f3 ilo: support PIPE_CAP_USER_INDEX_BUFFERS 
We want to access the user buffer, if available, when primitive restart is
enabled and the restart index/primitive type is not natively supported.

And since we are handling index buffer uploads in the driver with this change,
we can also work around misalignment of index buffer offsets.
 2013-06-26 16:42:46 +08:00
Chia-I Wu
3eb6754e94 ilo: support PIPE_CAP_USER_CONSTANT_BUFFERS 
We need it for HUD support, and will need it for push constants in the future.
 2013-06-26 16:42:45 +08:00
Chia-I Wu
5f15050dc9 ilo: bump up PIPE_CAP_GLSL_FEATURE_LEVEL to 140 
With UBO and TBO support, we are supposedly good to claim GLSL 1.40.
 2013-06-13 23:47:18 +08:00
Chia-I Wu
cdfb2163c4 ilo: get rid of function tables in winsys 
We are moving toward making struct intel_bo alias drm_intel_bo.  As a first
step, we cannot have function tables.
 2013-06-12 17:46:52 +08:00
Chia-I Wu
9b34a7f29a ilo: advertise PIPE_CAP_CUBE_MAP_ARRAY 
It was supported but not advertised.  Also remove TODO tag for
PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT, as it is not a TODO.
 2013-06-07 15:37:40 +08:00
Chia-I Wu
27804b2fc7 ilo: enable bo reuse 
This magical line of code must have got lost at some point in the history...
 2013-06-07 11:28:20 +08:00
Chia-I Wu
70e78211d6 ilo: introduce vertex element CSO 
Introduce ilo_ve_cso and initialize it in create_vertex_elements_state().
This commit goes a step further by setting up mappings from HW VB to PIPE VB,
which we failed to do previously.  That allows us to support instanced
rendering.
 2013-06-07 11:13:15 +08:00
Chia-I Wu
130364ad1d ilo: switch to ilo states for CLIP and SF stages 
Define and use

 struct ilo_viewport_state;
 struct ilo_scissor_state;

in ilo_context.
 2013-06-07 11:13:14 +08:00
Chia-I Wu
3a5dd39b1d ilo: add support for indirect access of CONST in FS 
Unlike other register files, CONST is read with a message and indirect access
is easier to implement.
 2013-05-27 12:30:51 +08:00
Chia-I Wu
fb40aca879 ilo: add support for texture buffer objects 
Take care of sampler views that have buffers as the underlying resources.
Update caps related to TBOs.
 2013-05-27 11:02:57 +08:00
Chia-I Wu
bd8090a5af ilo: update headers from i965 
Mainly for MI_LOAD_REGISTER_IMM and BCS_SWCTRL.
 2013-05-21 11:47:19 +08:00
Chia-I Wu
6b894e6900 ilo: add support for stencil resources on GEN7+ 
For allocations, we need to support stencil-only and separate stencil
resources.  For mapping, we need to support software tiling and
packing/unpacking for separate stencil resources.
 2013-05-16 18:20:17 +08:00
Courtney Goeltzenleuchter
daa90f91ff ilo: Add support for HW primitive restart. 
Now tells Gallium that ilo supports primitive restart.
Updated ilo_draw_vbo to be able to check that the indexed
primitive being rendered can actually be supported in HW. If not,
will break up into individual prims similar to what Mesa does.

[olv: a minor fix after rebasing and formatting]
 2013-05-10 00:06:14 +08:00
Chia-I Wu
22c5e048bd ilo: fix PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS 
On GEN7+, is->dev.has_gen7_sol_reset is required.
 2013-05-01 17:41:39 +08:00
Chia-I Wu
16f81fcf1e ilo: enable SO support on GEN7 2013-05-01 17:36:44 +08:00
Chia-I Wu
ce188bb252 ilo: move device limits to ilo_dev_info or to GPEs 
It seems a bit weird to have device limits in a context.
 2013-05-01 11:23:11 +08:00
Chia-I Wu
bb1f635dcc ilo: add ilo_dev_info shared by the screen and contexts 
The struct is used to describe the device information, such as PCI ID, GEN,
GT, and etc.
 2013-05-01 11:20:41 +08:00
Chia-I Wu
babb2b5c50 ilo: hook up pipe_screen param and fence functions 2013-04-26 16:16:42 +08:00
Chia-I Wu
e74d67738d ilo: add debug flags settable through ILO_DEBUG 2013-04-26 16:16:42 +08:00
Chia-I Wu
63b5720105 ilo: new pipe driver for Intel GEN6+ 
This commit adds some boilerplate code.  The header files found under include/
are copied from i965.
 2013-04-26 16:16:41 +08:00