Commit Graph

30 Commits

Author SHA1 Message Date
Jason Ekstrand
d17dd46b09 anv: Move mi_memcpy and mi_memset to gen_mi_builder
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2019-04-11 18:04:09 +00:00
Danylo Piliaiev
1952fd8d2c anv: Implement VK_EXT_conditional_rendering for gen 7.5+
Conditional rendering affects next functions:
- vkCmdDraw, vkCmdDrawIndexed, vkCmdDrawIndirect, vkCmdDrawIndexedIndirect
- vkCmdDrawIndirectCountKHR, vkCmdDrawIndexedIndirectCountKHR
- vkCmdDispatch, vkCmdDispatchIndirect, vkCmdDispatchBase
- vkCmdClearAttachments

Value from conditional buffer is cached into designated register,
MI_PREDICATE is emitted every time conditional rendering is enabled
and command requires it.

v2: by Jason Ekstrand
  - Use vk_find_struct_const instead of manually looping
  - Move draw count loading to prepare function
  - Zero the top 32-bits of MI_ALU_REG15

v3: Apply pipeline flush before accessing conditional buffer
 (The issue was found by Samuel Iglesias)

v4: - Remove support of Haswell due to possible hardware bug
    - Made TMP_REG_PREDICATE and TMP_REG_DRAW_COUNT defines to
       define registers in one place.

v5: thanks to Jason Ekstrand and Lionel Landwerlin
    - Workaround the fact that MI_PREDICATE_RESULT is not
      accessible on Haswell by manually calculating
      MI_PREDICATE_RESULT and re-emitting MI_PREDICATE
      when necessary.

v6: suggested by Lionel Landwerlin
    - Instead of calculating the result of predicate once - re-emit
      MI_PREDICATE to make it easier to investigate error states.

v7: suggested by Jason
    - Make anv_pipe_invalidate_bits_for_access_flag add CS_STALL
      if VK_ACCESS_CONDITIONAL_RENDERING_READ_BIT is set.

v8: suggested by Lionel
    - Precompute conditional predicate's result to
      support secondary command buffers.
    - Make prepare_for_draw_count_predicate more readable.

Signed-off-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2019-01-18 18:31:44 +00:00
Jason Ekstrand
40149441b8 anv: Add a mi_memset and use it for zeroing queries
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
2018-09-17 02:57:21 -05:00
Jason Ekstrand
e1ab834557 anv/memcpy: Use addresses instead of bo+offset
Reviewed-by: Eric Engestrom <eric.engestrom@intel.com>
2018-09-14 22:12:11 -05:00
Jason Ekstrand
571ed588ac anv/cmd_buffer: Add a mark_image_written helper
Currently, this helper does nothing but we call it every place where an
image is written through the render pipeline.  This will allow us to
properly mark the aux state so that we can handle resolves correctly.

Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2018-02-08 16:35:31 -08:00
Nanley Chery
0b16600056 anv/gpu_memcpy: Add a lighter-weight GPU memcpy function
We'll be performing a GPU memcpy in more places to copy small amounts of
data. Add an alternate function that thrashes less state.

v2:
- Make a new function (Jason Ekstrand).
- Move the #define into the function.
v3:
- Update the function name (Jason).
- Update comments.
v4: Use an indirect drawing register as TEMP_REG (Jason Ekstrand).

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-07-22 20:12:09 -07:00
Nanley Chery
d6748f1fc4 anv/gpu_memcpy: Rename the gpu_memcpy function
A GPU memcpy function could alternatively be implemented using MI_*
commands. Provide more detail into how this one operates in case another
memcpy function is created.

v2:
- Update the commit message.
v3:
- Use 'memcpy' instead of 'cpy' (Jason Ekstrand)
- Shorten 'streamout' to 'so'

Suggested-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com> (v2)
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-06-26 11:09:12 -07:00
Jason Ekstrand
e8d52dab48 anv: Add support for the PMA fix on Broadwell
This helps Dota 2 on Broadwell by 8-9%.  I also hacked up the driver and
used the Sascha "shadowmapping" demo to get some results.  Setting
uses_kill to true dropped the framerate on the demo by 25-30%.  Enabling
the PMA fix brought it back up to around 90% of the original framerate.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2017-02-14 14:18:55 -08:00
Nanley Chery
0ce8b37a8e anv: Delete anv's HiZ op emit function
This is no longer used.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
2017-01-12 20:52:20 -08:00
Jason Ekstrand
a8b85f1f77 anv: Implement a depth stall restriction on gen7
Fixes around 60 Vulkan CTS tests on Haswell

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Cc: "13.0" <mesa-stable@lists.freedesktop.org>
2016-11-20 20:40:40 -08:00
Kenneth Graunke
9ef2b9277d intel: Share URB configuration code between GL and Vulkan.
This code is far too complicated to cut and paste.

v2: Update the newly added genX_gpu_memcpy.c; const a few things.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-11-19 11:40:01 -08:00
Jason Ekstrand
3d9747780b anv: Add a helper for doing buffer copies with nothing but VF and SOL.
This method of doing copies has the advantage of touching very little of
the GPU state.  While it does disable all the shader stages, it doesn't
have to blow away binding tables, viewports, scissors, or any other bits of
dynamic state other than VBO 32 which is already reserved.  All of the
state that it does touch is contained within a pipeline anyway so that's
the only thing that has to be dirtied.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-11-16 10:11:07 -08:00
Jason Ekstrand
68c58edcfa anv/pipeline: Unify graphics_pipeline_create
Reviewed-by: Kristian H. Kristensen <hoegsberg@google.com>
Reviewed-by: Timothy Arceri <timothy.arceri@collabora.com>
2016-11-16 10:09:12 -08:00
Jason Ekstrand
7998e37774 anv/cmd_buffer: Move descriptor flushing into genX_cmd_buffer.c
It really should have gone here all along.  We were trying a bit too hard
to make it gen-agnostic just because it didn't have any #if's.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
2016-10-17 17:41:35 -07:00
Jason Ekstrand
8e1a8dd47e anv: Move Create*Pipelines into genX_cmd_buffer.c
Now that we don't have meta, we have no need for a gen-agnostic pipeline
create path.  We can, instead, just generate one Create*Pipelines function
per gen and be done with it.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
2016-10-14 15:40:39 -07:00
Jason Ekstrand
ac77528f7d anv: Get rid of graphics_pipeline_create_info_extra
Now that we no longer have meta, all pipelines get created via the normal
Vulkan pipeline creation mechanics.  There is no more need for this bit of
extra magic data that we've been passing around.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-10-14 15:40:39 -07:00
Emil Velikov
ae6fb9c922 anv: error out if anv_genX.h is included by !anv_private.h
Update the comment to reflect the correct filename and add a guard to
catch incorrect inclusion of the header.

Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-14 11:53:43 +01:00
Emil Velikov
08efa6a19f anv: use correct header guards
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-14 11:53:41 +01:00
Nanley Chery
134d181be1 anv/cmd_buffer: Add code for performing HZ operations
Create a function that performs one of three HiZ operations -
depth/stencil clears, HiZ resolve, and depth resolves.

Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Chad Versace <chadversary@chromium.org>
2016-10-07 12:54:18 -07:00
Jason Ekstrand
b548fdbed5 anv/cmd_buffer: Don't call set_subpass in a secondary
Initially, we had intended set_subpass to be an interesting function that
did whatever (presumably a lot) setup we needed for a subpass.  In reality,
it just sets a pointer and a dirty bit and then emits depth and stencil
state.  When we call BeginCommandBuffer on a secondary, there's no point in
setting depth and stencil state since it will already be set by the
primary.  Instead, the only thing we need to do at the start of a secondary
is set the subpass pointer and the dirty bit.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
2016-10-06 16:52:31 -07:00
Jason Ekstrand
8f780af968 anv: Add initial blorp support
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand
4a6c9e20b8 anv: Generalize emit_urb_setup
Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
2016-09-13 12:40:12 -07:00
Jason Ekstrand
7e891f90c7 anv: Move cmd_buffer_config_l3 into anv_cmd_buffer.c
This is the only remaining part of genX_l3.c and there's really no good
reason for it to be in its own file.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
42d03c204c anv: Refactor pipeline l3 config setup
Now that we're using gen_l3_config.c, we no longer have one set of l3
config functions per gen and we can simplify a bit.  Also, we know that
only compute uses SLM so we don't need to look for it in all of the stages.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-09-03 08:23:07 -07:00
Jason Ekstrand
3a83c176ea anv/cmd_buffer: Only emit PIPE_CONTROL on-demand
This is in contrast to emitting it directly in vkCmdPipelineBarrier.  This
has a couple of advantages.  First, it means that no matter how many
vkCmdPipelineBarrier calls the application strings together it gets one or
two PIPE_CONTROLs.  Second, it allow us to better track when we need to do
stalls because we can flag when a flush has happened and we need a stall.

Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2016-05-27 15:18:09 -07:00
Jordan Justen
8a80af2820 anv: Port L3 cache programming from i965
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Acked-by: Jason Ekstrand <jason@jlekstrand.net>
2016-05-17 13:04:03 -07:00
Jordan Justen
1b126305de anv/genX: Add flush_pipeline_select_gpgpu
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
2016-03-12 12:43:46 -08:00
Jason Ekstrand
248ab61740 anv/cmd_buffer: Pull the core of flush_state into genX_cmd_buffer 2016-03-08 17:10:05 -08:00
Jason Ekstrand
28cbc45b3c anv/cmd_buffer: Split flush_state into two functions 2016-03-08 16:54:07 -08:00
Jason Ekstrand
42b4c0fa6e anv: Pull all of the genX_foo functions into anv_genX.h
This way we only have to declare them each once and we get it for all gens
at a single go.
2016-03-08 16:49:08 -08:00