Commit Graph

183393 Commits

Author SHA1 Message Date
Samuel Pitoiset
ce200669b1 radv: rename radv_pipeline_key to radv_graphics_pipeline_key
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27073>
2024-01-17 12:08:24 +00:00
Samuel Pitoiset
c5a5ab46c9 radv: remove radv_generate_pipeline_key()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27073>
2024-01-17 12:08:24 +00:00
Samuel Pitoiset
72d2eb39fb radv: pass radv_graphics_state_key to radv_hash_shaders()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27073>
2024-01-17 12:08:24 +00:00
Boris Brezillon
b18bfed2c5 panvk: Fix access to unitialized panvk_pipeline_layout::num_sets field
Commit 73eecffabd ("panvk: Use the vk_pipeline_layout base struct")
reworked the panvk logic to use vk_pipeline_layout, which contains the
number of descriptor set layout referenced by a pipeline layout, thus
deprecating panvk_pipeline_layout::num_sets.

Make panvk_fill_non_vs_attribs() use vk_pipeline_layout::set_count
instead of panvk_pipeline_layout::num_sets and kill the latter so we
can't introduce new users.

Fixes: 73eecffabd ("panvk: Use the vk_pipeline_layout base struct")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27107>
2024-01-17 11:42:25 +00:00
Boris Brezillon
35a02560c8 panvk: Fix tracing
pandecode_next_frame() take a decode context. Passing NULL leads to a
NULL deref.

Fixes: 56be9a55be ("pan/decode: handle more than one panfrost_device")
Cc: mesa-stable
Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Constantine Shablya <constantine.shablya@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27107>
2024-01-17 11:42:25 +00:00
Ray Smith
c5ba55314c panfrost: Fix format tables for v4 and v5
pan_format.c was only being built with PAN_ARCH in [6, 7, 9], but has
conditional compilation for PAN_ARCH <= 5 which never got compiled.

Signed-off-by: Ray Smith <rsmith@brightsign.biz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26980>
2024-01-17 11:07:48 +00:00
Ray Smith
404da63a0e panfrost: Don't try to set bifrost blendable format on midgard
pan_blendable_format.bifrost is only accessed on bifrost, but we set it
to bogus values on midgard. Set it to 0/invalid instead.

Signed-off-by: Ray Smith <rsmith@brightsign.biz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26980>
2024-01-17 11:07:48 +00:00
Marek Olšák
969ed85110 radeonsi: don't flush CS before and after every blitter invocation
u_blitter always calls set_stream_output_targets before and after clears
and blits, which always flushes here. Strengthen the flushing condition
and add an early exit.

No clue why this fixes the test.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27059>
2024-01-17 05:16:09 -05:00
Marek Olšák
da49e9dcc2 radeonsi/gfx11: flush DB before Z/S clear to work around dEQP failures
u_blitter calls set_stream_output_targets, which flushed the context
for clears. Put the workaround in the right place.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27059>
2024-01-17 05:16:01 -05:00
Marek Olšák
5fd31c1301 radeonsi/ci: update gfx11 flakes
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
3601c1b2cf radeonsi/gfx11: clean up MAX_ALLOWED_TILES_IN_WAVE programming
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
15f88ea46e radeonsi: rename *trivial_vs_prolog -> *trivial_vs_inputs
This is a better name.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
b8c23cd4cd radeonsi: remove unused preloaded instance_divisor_constbuf
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
9dbd3437c6 radeonsi: remove no-op additions for viewport0_y_inverted
adding the same value to both sides of the equation has no effect

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
bad2530a40 radeonsi: pack GS_STATE_ESGS_VERTEX_STRIDE better to save 2 bits
Change it to the number of ES outputs, then compute the stride from that.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
8eed352e05 radeonsi: split si_update_ngg_prim_state_sgpr into 2 functions
GS_STATE_PROVOKING_VTX_FIRST no longer depends on the primitive type,
so we don't have to call it in si_set_rasterized_prim anymore.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
b3326bb947 radeonsi: change GS_STATE_PROVOKING_VTX_INDEX to 1 bit PROVOKING_VTX_FIRST
to save 1 bit for later

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
6c74fc6bfb radeonsi: deduplicate gfx10_ngg_get_vertices_per_prim / get_num_vert_per_prim
it was almost identical

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
da20c6c73f radeonsi: don't use staging uploads for buffers & shaders with all VRAM visible
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
b7af7efee4 radeonsi: expose shader profiles to other .c files
This will be used by NIR options for nir_opt_varyings.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
767048f8b2 radeonsi: report more detailed output stats for shader-db
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
b9b00a0e7a ac,radeonsi: emulate GS primitive pipeline stat on gfx11 because of culling
GS culls too, so the pipeline stat is incorrect. This can be exposed by
forcing monolithic shader use, which makes culling shaders immediately
available for tests to use.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:55 +00:00
Marek Olšák
1d3f937142 ac/nir: simplify code at the beginning of ac_nir_gs_shader_query
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
4747bd6ba8 ac/nir: optimize out multiplications in small line culling
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
0d74123633 ac/nir: rename clipdist_enable_mask -> clip_cull_dist_mask
Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
af4e91f6b8 ac/nir: don't write TCS outputs to memory if no_varying is set
nir_opt_varyings() will set this, making it unnecessary to look
at the TES input mask.

Reviewed-by: Qiang Yu <yuq825@gmail.com>
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Marek Olšák
4880c1e12e amd: unify NIR options between RADV and radeonsi
Reviewed-by: Timur Kristóf <timur.kristof@gmail.com>
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26917>
2024-01-17 09:05:54 +00:00
Sviatoslav Peleshko
6b0bfdfa9e nir: Use alu source components count in nir_alu_srcs_negative_equal
When we use source from ALU instruction directly, the default swizzle array
should be populated with the same amount of components as the src has.

Otherwise, if we use nir_ssa_alu_instr_src_components, it can return
the destination components count that is lower than component index
actually used in that source. This can lead to false equality
between 0 (uninitialized) and 0 (.x) in swizzle comparison below.

Fixes: c6ee46a7 ("nir: Add nir_alu_srcs_negative_equal")
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/8704
Signed-off-by: Sviatoslav Peleshko <sviatoslav.peleshko@globallogic.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22655>
2024-01-17 08:05:30 +00:00
Samuel Pitoiset
e19ecf49ea radv: remove an extra new line in radv_shader.h
To make clang-format CI job happy again.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
ee96de53e4 radv: remove the pipeline key for ray tracing pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
e799907071 radv: remove the pipeline key for compute pipelines
Eveyerthing needed is already in radv_shader_stage_key.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
e017eb3b58 radv: stop hashing radv_pipeline_key for compute/rt pipelines
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
739c8eb681 radv: hash radv_shader_stage_key
This will allow us to remove the pipeline key completely for compute/rt
pipelines.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
853298edb1 radv/rt: cleanup radv_parse_rt_stage()
To avoid calling radv_pipeline_stage_init() twice.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
ffe997d71d radv: add radv_pipeline_get_shader_key()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
844004c335 radv: cleanup radv_generate_pipeline_key()
Move everything in the same loop to prepare for a new helper.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
3615bcdde3 radv: make sure to retain shaders key for imported shaders with GPL
Now that everything is moved to the per-stage key, this information
needs to be retained/loaded with GPL, otherwise some flags might be
missing.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
082c524f86 radv: pass radv_shader_stage_key to radv_pipeline_stage_init()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
08b8356111 radv: add shader_version to radv_shader_stage_key
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
Samuel Pitoiset
20fdbc7a44 radv: add keep_statistic_info to radv_shader_stage_key
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27036>
2024-01-17 07:25:49 +00:00
David Heidelberg
027363416b ci/lima: update expectations, failing tests are being skipped
Multiple previously failing tests are skipped now.

Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26905>
2024-01-17 06:21:10 +00:00
Erico Nunes
8bd4cae768 Revert "ci: lima farm is down"
This reverts commit 601b826a5e.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26905>
2024-01-17 06:21:10 +00:00
Yonggang Luo
616c0cd067 compiler/spirv: vtn_add_printf_string support for handling OpBitcast
specifically, it's handling
         %48 = OpBitcast %_ptr_UniformConstant_uchar %_str
         %49 = OpBitcast %_ptr_UniformConstant_uchar %_str_1

; SPIR-V
; Version: 1.4
; Generator: Khronos SPIR-V Tools Linker; 0
; Bound: 53
; Schema: 0
               OpCapability Addresses
               OpCapability Kernel
               OpCapability Int64
               OpCapability Int8
          %1 = OpExtInstImport "OpenCL.std"
               OpMemoryModel Physical64 OpenCL
               OpEntryPoint Kernel %2 "main_test" %_str %_str_1
          %5 = OpString "kernel_arg_type.main_test.float*,uint*,"
          %6 = OpString "kernel_arg_type_qual.main_test.,,"
               OpSource OpenCL_C 102000
               OpName %_str ".str"
               OpName %_str_1 ".str.1"
               OpName %main_test "main_test"
               OpName %src "src"
               OpName %dest "dest"
               OpName %entry "entry"
               OpName %src_addr "src.addr"
               OpName %dest_addr "dest.addr"
               OpName %arrayidx "arrayidx"
               OpName %call "call"
               OpName %src_0 "src"
               OpName %dest_0 "dest"
               OpModuleProcessed "Linked by SPIR-V Tools Linker"
               OpDecorate %_str Constant
               OpDecorate %_str Alignment 1
               OpDecorate %_str_1 Constant
               OpDecorate %_str_1 Alignment 1
               OpDecorate %src Alignment 4
               OpDecorate %dest Alignment 4
               OpDecorate %src_addr Alignment 8
               OpDecorate %dest_addr Alignment 8
               OpDecorate %src_0 Alignment 4
               OpDecorate %dest_0 Alignment 4
      %ulong = OpTypeInt 64 0
      %uchar = OpTypeInt 8 0
       %uint = OpTypeInt 32 0
    %ulong_7 = OpConstant %ulong 7
   %uchar_37 = OpConstant %uchar 37
  %uchar_115 = OpConstant %uchar 115
   %uchar_58 = OpConstant %uchar 58
   %uchar_32 = OpConstant %uchar 32
  %uchar_102 = OpConstant %uchar 102
    %uchar_0 = OpConstant %uchar 0
    %ulong_5 = OpConstant %ulong 5
   %uchar_84 = OpConstant %uchar 84
  %uchar_101 = OpConstant %uchar 101
  %uchar_116 = OpConstant %uchar 116
    %ulong_0 = OpConstant %ulong 0
%_arr_uchar_ulong_7 = OpTypeArray %uchar %ulong_7
%_ptr_UniformConstant__arr_uchar_ulong_7 = OpTypePointer UniformConstant %_arr_uchar_ulong_7
%_arr_uchar_ulong_5 = OpTypeArray %uchar %ulong_5
%_ptr_UniformConstant__arr_uchar_ulong_5 = OpTypePointer UniformConstant %_arr_uchar_ulong_5
       %void = OpTypeVoid
      %float = OpTypeFloat 32
%_ptr_CrossWorkgroup_float = OpTypePointer CrossWorkgroup %float
%_ptr_CrossWorkgroup_uint = OpTypePointer CrossWorkgroup %uint
         %40 = OpTypeFunction %void %_ptr_CrossWorkgroup_float %_ptr_CrossWorkgroup_uint
%_ptr_Function__ptr_CrossWorkgroup_float = OpTypePointer Function %_ptr_CrossWorkgroup_float
%_ptr_Function__ptr_CrossWorkgroup_uint = OpTypePointer Function %_ptr_CrossWorkgroup_uint
%_ptr_UniformConstant_uchar = OpTypePointer UniformConstant %uchar
         %44 = OpConstantComposite %_arr_uchar_ulong_7 %uchar_37 %uchar_115 %uchar_58 %uchar_32 %uchar_37 %uchar_102 %uchar_0
       %_str = OpVariable %_ptr_UniformConstant__arr_uchar_ulong_7 UniformConstant %44
         %45 = OpConstantComposite %_arr_uchar_ulong_5 %uchar_84 %uchar_101 %uchar_115 %uchar_116 %uchar_0
     %_str_1 = OpVariable %_ptr_UniformConstant__arr_uchar_ulong_5 UniformConstant %45
  %main_test = OpFunction %void DontInline %40
        %src = OpFunctionParameter %_ptr_CrossWorkgroup_float
       %dest = OpFunctionParameter %_ptr_CrossWorkgroup_uint
      %entry = OpLabel
   %src_addr = OpVariable %_ptr_Function__ptr_CrossWorkgroup_float Function
  %dest_addr = OpVariable %_ptr_Function__ptr_CrossWorkgroup_uint Function
               OpStore %src_addr %src Aligned 8
               OpStore %dest_addr %dest Aligned 8
         %46 = OpLoad %_ptr_CrossWorkgroup_float %src_addr Aligned 8
   %arrayidx = OpInBoundsPtrAccessChain %_ptr_CrossWorkgroup_float %46 %ulong_0
         %47 = OpLoad %float %arrayidx Aligned 4
         %48 = OpBitcast %_ptr_UniformConstant_uchar %_str
         %49 = OpBitcast %_ptr_UniformConstant_uchar %_str_1
       %call = OpExtInst %uint %1 printf %48 %49 %47
         %50 = OpLoad %_ptr_CrossWorkgroup_uint %dest_addr Aligned 8
               OpStore %50 %call Aligned 4
               OpReturn
               OpFunctionEnd
          %2 = OpFunction %void DontInline %40
      %src_0 = OpFunctionParameter %_ptr_CrossWorkgroup_float
     %dest_0 = OpFunctionParameter %_ptr_CrossWorkgroup_uint
         %51 = OpLabel
         %52 = OpFunctionCall %void %main_test %src_0 %dest_0
               OpReturn
               OpFunctionEnd

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Faith Ekstrand <faith.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26775>
2024-01-17 02:59:57 +00:00
Yonggang Luo
88c4de7e7b compiler/spirv: There is not need unqualify const in function vtn_string_literal
Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26775>
2024-01-17 02:59:57 +00:00
Yonggang Luo
fd11818828 compiler/spirv: The spirv shader is binary, should write in binary mode
Fixes: 53265c8798 ("spirv: Add a mechanism for dumping failing shaders")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26775>
2024-01-17 02:59:57 +00:00
Benjamin Lee
1593caf610 nak: implement FSWZADD on SM50
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/27063>
2024-01-16 23:46:19 +00:00
Faith Ekstrand
bb10f7f5da nak: Implement nir_op_bfm
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26550>
2024-01-16 23:32:13 +00:00
Faith Ekstrand
c14f4cc052 nak: Rename OpBrev to OpBRev
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26550>
2024-01-16 23:32:13 +00:00
Faith Ekstrand
9b68c77abb nak: Implement nir_op_ufind_msb_rev
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26550>
2024-01-16 23:32:13 +00:00
Faith Ekstrand
a3bceafed5 nak: Implement nir_op_pack_half_2x16_rtz_split
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26550>
2024-01-16 23:32:13 +00:00