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Author SHA1 Message Date
Dylan Baker
c947bde6c5 docs: Add sha256sums for 20.0.8 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
 2020-06-12 17:23:38 +00:00
Dylan Baker
0226854e11 docs: Add release notes for 20.0.8 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5444>
 2020-06-12 17:23:38 +00:00
Alyssa Rosenzweig
7ae2110e61 pan/mdg: Prefer type over regmode for schedule constraints 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
 2020-06-12 12:57:11 -04:00
Alyssa Rosenzweig
5cf5d3cc2d pan/mdg: Analyze types for 64-bitness in RA 
Instead of reg_mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
 2020-06-12 12:57:11 -04:00
Alyssa Rosenzweig
5e5ea25a0d pan/mdg: Explicitly type 64-bit uniform moves 
Instead of relying on reg_mode.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5443>
 2020-06-12 12:57:11 -04:00
Jonathan Marek
c93753e618 turnip: add emit renderpass cache flushes for sysmem 3D CmdClearAttachments 
This clear path behaves like a draw, it needs the same flush as tu_draw.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
 2020-06-12 15:09:07 +00:00
Jonathan Marek
72d7df40a5 turnip: add layered 3D path clear for CmdClearAttachments 
This fixes cases where the 3D path is used with layered rendering.

Fixes dEQP-VK.renderpass.suballocation.multisample_resolve.layers* failures

Note the blob's 3D fallback path behaves differently, and uses the
framebuffer information to clear each layer individually (changing the MRT
state each time). But that's not possible in all cases, and the blob fails
to clear properly in dEQP-VK.geometry.layered.*.secondary_cmd_buffer cases.
So this clear path is not based on the blob's behavior.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
 2020-06-12 15:09:07 +00:00
Jonathan Marek
093c413722 turnip: share code between 3D blit/clear path and tu_pipeline 
Instead of filling out registers manually, fill out ir3 structs and re-use
code from tu_pipeline.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
 2020-06-12 15:09:06 +00:00
Jonathan Marek
13525a9c70 turnip: pipeline program state refactor 
This refactor simplifies things a bit, and will make it easier to share
some logic with tu_clear_blit (see next patches).

This changes the order in which some things are emitted, and emits less
for disabled shader stages. There's also as extra write to SP_GS_PRIM_SIZE
that is removed.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5426>
 2020-06-12 15:09:06 +00:00
Alyssa Rosenzweig
1c1782c6b5 panfrost: Demote mediump varyings to fp16 
Likewise lowp.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
a7f524674b panfrost: Override varying format to minimal precision 
Spec allows this!

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
f1de952b69 panfrost: Use shader_info harder 
We already have this metadata..

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
3cc425e27d panfrost: Only store varying formats 
This reduces linking complexity.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
8462ca076d panfrost: Allow R/RG/RGB varyings 
This can be a bandwidth savings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
a0578998a4 panfrost: Remove unused routines 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
79e349abca panfrost: Use new varying linking 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
6ab87c55bc panfrost: Add high-level varying emit 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
e9e9b2b39b panfrost: Add helper to determine if we are capturing 
That is, is the varying setup for xfb *and* is there a buffer for it?

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
c31af6fbca panfrost: Emit xfb records 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
df24209473 panfrost: Emit special varyings 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
0c0217d945 panfrost: Emit unlinked varyings 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
3d04ebf7f8 panfrost: Determine varying buffer presence 
Essentially the same logic as before, but the assumptions are much more
explicit.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
258b80b6eb panfrost: Introduce bitfields for tracking varyings 
Rather than having all sorts of random state flyng about with varying
emission, we can use a simple present mask and general stride to encode
everything we need for non-XFB cases, and layer XFB on top easily
enough.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
e26ac2e165 panfrost: Add panfrost_streamout_offset helper 
Calculates the bias required for an xfb record in the src_offset field
to account for truncating the address to force alignment.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
24c3b95925 panfrost: Calculate varying size by format 
Will enable <16-byte varyings.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Alyssa Rosenzweig
7ac1bb047a pan/mdg: Avoid fusing ld_vary_16 with non-zero component 
Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5423>
 2020-06-12 14:45:50 +00:00
Daniel Schürmann
1f98d8c804 aco: fix shared subdword loads 
Shared subdword loads don't need byte alignment as they are split
into multiple loads if necessary.

Fixes: 5cde4989d3 ('aco: remove unnecessary split- and create_vector instructions for subdword loads')
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5441>
 2020-06-12 13:56:12 +00:00
Samuel Pitoiset
e7e9969efe radv: enable radv_enable_mrt_output_nan_fixup for RAGE 2 
To fix game artifacts. It's always sad to have to fix game bugs
inside drivers ...

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
 2020-06-12 14:43:58 +02:00
Samuel Pitoiset
54e7ae569b radv/llvm: implement radv_enable_mrt_output_nan_fixup workaround 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
 2020-06-12 14:43:58 +02:00
Samuel Pitoiset
7b44f549b3 aco: implement radv_enable_mrt_output_nan_fixup workaround 
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
 2020-06-12 14:43:57 +02:00
Samuel Pitoiset
6f21995f98 radv: add new drirc option radv_enable_mrt_output_nan_fixup 
To replace NaN from FS with zeros to fix game bugs.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5359>
 2020-06-12 14:43:31 +02:00
Timothy Arceri
b33f811068 glsl: fix incorrect optimisation in opt_constant_variable() 
When handling function inputs the optimisation pass incorrectly
assumes the inputs are undefined. Here we simply change things to
assume inputs have always been assigned a value. Any further
optimisations will be taken care of once function inlining takes
place.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2984
Fixes: 65122e9e80 ("ir_constant_variable: New pass to mark constant-assigned variables constant.")

Reviewed-by: Danylo Piliaiev <danylo.piliaiev@globallogic.com>
Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5413>
 2020-06-12 08:51:54 +00:00
Samuel Pitoiset
07aefe8065 radv: set DB_SHADER_CONTROL.CONSERVATIVE_Z_EXPORT correctly 
Use the SPIR-V execution modes if set.

Cc: 20.1 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5404>
 2020-06-12 08:22:47 +00:00
Mauro Rossi
900bf50c39 android: nvir/gv100: update sources in Makefile.sources 
Fixes the following building errors:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/gallium_dri_intermediates/LINKED/gallium_dri.so
...
ld.lld: error: undefined symbol: nv50_ir::getTargetGV100(unsigned int)
...
ld.lld: error: undefined symbol: nv50_ir::getTargetGV100(unsigned int)
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: 78103abe ("nvir/gv100: initial support")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
 2020-06-12 07:50:08 +02:00
Rob Clark
ee29c682fe freedreno/ir3: limit pre-fetched tex dest 
Teach RA to setup additional interference to prevent textures fetched
before the FS starts from ending up in a register that is too high to
encode.

Fixes mis-rendering in multiple playcanv.as webgl apps.

Note that the regression was not actually 733bee57eb8's fault, but
that was the commit that exposed the problem.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3108
Fixes: 733bee57eb ("glsl: lower samplers with highp coordinates correctly")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
f80092dad2 freedreno/ir3: remove RA "q-values" optimization 
This is mainly the "piglit optimization" (ie, since piglit launches an
separate process for for each test).  It was never wired up for a6xx,
and makes register class setup unnecessarily complicated.  Remove it to
simplify the next patch.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
562aaea07c freedreno/ir3: respect tex prefetch limits 
Refactor a bit the limit checking in the bindless case, and add tex/samp
limit checking for the non-bindless case, to ensure we do not try to
prefetch textures which cannot be encoded in the # of bits available.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
4cabc25fa4 freedreno/ir3: add debug code to print conflicting half-regs 
I keep re-typing this from time to time when debugging various things.
Which is dumb.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Rob Clark
399114329b nir/print: print tex dest type 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5431>
 2020-06-11 21:59:54 +00:00
Francisco Jerez
479249bce6 iris/icl+: Report same caching domain as main surface for clear color BO. 
Even though the clear color BO is bound as a read-only buffer, report
the same caching domain as the main BO in use_surface() (typically
IRIS_DOMAIN_RENDER_WRITE) in order to avoid ping-ponging back and
forth between IRIS_DOMAIN_RENDER_WRITE and IRIS_DOMAIN_OTHER_READ,
which leads to increased stall-at-pixel-scoreboard synchronization
between draw calls.

Fixes a 5%-10% FPS regression in some benchmarks spotted on ICL.

Reported-by: Clayton Craft <clayton.a.craft@intel.com>
Fixes: eb5d1c2722 "iris: Annotate all BO uses with domain and sequence number information."
Closes: #3097
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5411>
 2020-06-11 14:00:49 -07:00
Mauro Rossi
7afdc549f4 android: aco: add aco_ir.cpp to Makefile.sources 
Fixes the following building errors:

FAILED: out/target/product/x86_64/obj/SHARED_LIBRARIES/vulkan.radv_intermediates/LINKED/vulkan.radv.so
...
ld.lld: error: undefined symbol: aco::can_use_SDWA(chip_class, std::__1::unique_ptr<aco::Instruction, aco::instr_deleter_functor> const&)
...
ld.lld: error: undefined symbol: aco::can_use_opsel(chip_class, aco_opcode, int, bool)
...
clang-9: error: linker command failed with exit code 1 (use -v to see invocation)

Fixes: d9cfb8ad ("aco: validate instructions reading/writing upper halves/bytes")
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5425>
 2020-06-11 20:00:16 +02:00
Eric Engestrom
19b18e7219 docs: update calendar, add news item, and link releases notes for 20.1.1 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
 2020-06-11 10:31:31 +00:00
Eric Engestrom
f94190e8b0 docs: Add release notes for 20.1.1 
Signed-off-by: Eric Engestrom <eric@engestrom.ch>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5421>
 2020-06-11 10:31:31 +00:00
Marek Olšák
0b3e344212 ac/surface: don't free dcc_retile_map on failure 
because the hash table now owns it.

Fixes: bd553f0546 - ac/surface: cache DCC retile maps (v2)

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
56f2a77a41 ac/surface: enable DCC for the first level in the mip tail on gfx10 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
7406ea37e6 ac/surface: require that gfx8 doesn't have DCC in order to be displayable 
Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
374f6d568f ac/surface: don't set is_displayable if displayable DCC is missing 
If flags.display isn't set, then displayable DCC will not be computed, so
is_displayable will always be false.

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5424>
 2020-06-11 10:01:57 +00:00
Marek Olšák
0fcf55329b amd/addrlib: fix the C++ one definition rule violation 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/1854

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5414>
 2020-06-11 05:11:50 -04:00
Jason Ekstrand
27b7b89922 iris: Better handle metadata in NIR passes 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00
Jason Ekstrand
92cfbb7d0c intel/nir: Call nir_metadata_preserve on !progress 
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5171>
 2020-06-11 05:08:12 +00:00