Commit Graph

79 Commits

Author SHA1 Message Date
Eric Anholt
8f7dfe3025 intel: Remove dead note_fence vtbl hook. 2010-01-19 12:09:29 -08:00
Jesse Barnes
c6ef705e41 Merge branch 'master' of ssh://people.freedesktop.org/~jbarnes/mesa
Conflicts due to DRI1 removal:
	src/mesa/drivers/dri/intel/intel_context.c
	src/mesa/drivers/dri/intel/intel_screen.c
2010-01-11 15:23:29 -05:00
Kristian Høgsberg
7c50d29f7c intel/DRI2: add DRI2flushExtension support with invalidate hook
Needed to support the SwapBuffers code properly.

Signed-off-by: Kristian Høgsberg <krh@bitplanet.net>
2010-01-08 12:40:58 -05:00
Kristian Høgsberg
2861d9200b intel: Drop more cliprect bookkeeping 2010-01-04 11:48:02 -05:00
Kristian Høgsberg
a6e1d3edac intel: Remove client-side vblank code 2010-01-04 11:48:02 -05:00
Kristian Høgsberg
f55d0920cd intel: Drop DRI1 static regions 2010-01-04 11:48:01 -05:00
Kristian Høgsberg
01dc463e5d intel: Drop LOCK/UNLOCK_HARDWARE() 2010-01-04 11:48:01 -05:00
Kristian Høgsberg
d61f07318c Remove leftover __DRI{screen,drawable,context}Private references
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate
and __DRIscreen, and likewise for __DRIdrawablePrivate and
__DRIcontextPrivate.  I left typedefs in place though, to avoid renaming
all the *Private use internal to the driver.  That was probably a
mistake, and it turns out a one-line find+sed combo can do the mass
rename.  Better late than never.
2010-01-04 11:48:00 -05:00
Brian Paul
25024d9482 Merge branch 'mesa_7_7_branch'
Conflicts:
	configs/darwin
	src/gallium/auxiliary/util/u_clear.h
	src/gallium/state_trackers/xorg/xorg_exa_tgsi.c
	src/mesa/drivers/dri/i965/brw_draw_upload.c
2009-12-31 09:02:27 -07:00
Vinson Lee
c67bb15d4e intel: Silence compiler warnings. 2009-12-28 18:46:15 -08:00
Eric Anholt
f677480389 intel: Replace some gen3 IS_* checks with context structure usage.
Shaves 400 bytes or so from i915_dri.so.
2009-12-22 14:20:27 -08:00
Eric Anholt
0b87f143c4 intel: Replace IS_G4X() across the driver with context structure usage.
Saves ~2KB of code.
2009-12-22 14:20:26 -08:00
Eric Anholt
1c96e85c9d intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.
Saves ~480 bytes of code.
2009-12-22 14:20:26 -08:00
Eric Anholt
827ba44f6e intel: Remove non-GEM support.
This really isn't supported at this point.  GEM's been in the kernel for
a year, and the fake bufmgr never really worked.
2009-11-19 11:47:22 +01:00
Eric Anholt
667760f53c intel: Remove dead intel_context members and move some packing around. 2009-11-19 11:47:21 +01:00
Eric Anholt
ee64347979 intel: Remove our special color packing macros and just use colormac.h. 2009-11-19 11:47:21 +01:00
Eric Anholt
c4b7c47fe3 intel: Pack colors for blit at blit time, rather than at ClearColor. 2009-11-19 11:47:21 +01:00
Eric Anholt
cc39fcad89 i915: Remove dead meta_draw_quad code. 2009-11-19 11:47:05 +01:00
Eric Anholt
1ffd0a7789 intel: Remove some dead context structure fields. 2009-11-13 13:18:57 -08:00
Eric Anholt
ded0ec1ea5 i965: Use bo_map instead of subdata to upload the bits of constant buffer.
Saves CPU time, resulting in a 2.5% FPS win on ETQW.
2009-11-13 13:18:57 -08:00
Eric Anholt
8e0f40d287 intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.
This should do all the things that MI_FLUSH did, but it can be pipelined
so that further rendering isn't blocked on the flush completion unless
necessary.
2009-11-06 11:37:31 -08:00
Eric Anholt
caf3038123 Make a convenient int for what chipset generation we're on.
gen2/3/4 are easier to say than "8xx, 915-945/g33/pineview, 965/g45/misc",
and compares on generation are often easier than stringing together a bunch
of chipset checks.
2009-11-06 11:37:31 -08:00
Eric Anholt
f8f40b53a6 i915: Implement min/max LOD clamping with the hardware.
This gets us expected behavior for clamping between mipmap levels, and
avoids relayout of textures for doing clamping.

Fixes piglit lodclamp-between.
2009-10-29 12:06:04 -07:00
Brian Paul
ab9d1011f5 Merge branch 'mesa_7_6_branch' 2009-10-22 18:38:19 -06:00
Brian Paul
c24466c34e intel: define INTEL_FALLBACK_DRIVER for drivers 2009-10-22 16:52:59 -06:00
Brian Paul
ea659f8917 intel: Fallback field is a bitmask, use GLbitfield 2009-10-22 16:52:59 -06:00
Eric Anholt
862a2a55b3 i915: Add optional support for ARB_fragment_shader under a driconf option.
Other vendors have enabled ARB_fragment_shader as part of OpenGL 2.0
enablement even on hardware like the 915 with no dynamic branching or
dFdx/dFdy support.  But for now we'll leave it disabled because we don't
do any flattening of ifs or loops, which is rather restrictive.

This support is not complete, and may be unstable depending on your shaders.
It passes 10/15 of the piglit glsl tests, but hangs on glean glsl1.
2009-10-01 14:52:44 -07:00
Eric Anholt
8b23755ce9 intel: Remove some dead metaops code. 2009-09-28 14:12:09 -07:00
Eric Anholt
afd6141934 intel: Add support for ARB_sync.
We currently weasel out of supporting the timeout parameter, but otherwise
this extension looks ready, and should make the common case happy.
2009-09-03 11:22:47 -07:00
Tobias Doerffel
87946d206f intel: in intel_context struct use typedef for sarea struct
Using drm_i915_sarea_t instead of struct drm_i915_sarea seems to be
a common standard now, therefore fix it also in intel_context
structure. Additionally this silences a compiler warning:

intel_swapbuffers.c: In function `intelFixupVblank':
intel_swapbuffers.c:48: warning: initialization from incompatible pointer type

Signed-off-by: Tobias Doerffel <tobias.doerffel@gmail.com>
2009-08-14 08:50:52 -06:00
Brian Paul
922ef4a119 intel: minor context comments 2009-08-07 09:50:38 -06:00
Eric Anholt
0828579a65 intel: Wait on the last swapbuffers to complete before queuing a new one.
This fixes jerkiness in doom3 and other apps since the kernel change to
throttle less absurdly, which led to a thundering herd of frames.

Because this is a rather minimal fix, there is at least one downside: If
the whole scene completes in one batchbuffer, we'll end up stalling the GPU.

Thanks to Michel Dänzer for suggesting using glFlush to signal frame end
instead of going to all the effort of adding a new DRI2 extension.
2009-08-03 13:34:07 -07:00
Dave Airlie
f6f0e117a4 intel/radeon: add common metaops code.
Move all the metaops to a dri_metaops file and port radeon/intel
to use the new common meta ops code.
2009-07-15 10:30:23 +10:00
Eric Anholt
94008088c1 intel: Move note_unlock() implementation to the one place it's needed. 2009-06-29 10:33:50 -07:00
Eric Anholt
df70d3049a intel: Also get the DRI2 front buffer when doing front buffer reading. 2009-06-19 22:18:16 -07:00
Eric Anholt
b30dc2c66a i915: Add an option for testing the effect of early Z in classic mode.
The early Z stuff is supposed to be unsafe without some more work in the
enable/disable path (in particular, how do we want to get it disabled on
the way out to the X Server?), but at the moment is 6% in OA.
2009-06-09 16:12:43 -07:00
Eric Anholt
1ba96651e1 intel: Add support for tiled textures.
This is about a 30% performance win in OA with high settings on my GM45,
and experiments with 915GM indicate that it'll be around a 20% win there.
Currently, 915-class hardware is seriously hurt by the fact that we use
fence regs to control the tiling even for 3D instructions that could live
without them, so we spend a bunch of time waiting on previous rendering in
order to pull fences off.  Thus, the texture_tiling driconf option defaults
off there for now.
2009-06-04 14:00:43 +00:00
Eric Anholt
165ae5e2fb i915: Don't rely on fence regs when we don't have to.
We're on the way to telling the kernel about when we need fence regs on our
objects or not, and this will cut the number of places needing them.
2009-06-04 10:34:52 +00:00
Eric Anholt
8ec6e03679 i915: Fall back on NPOT textured metaops on 830-class. 2009-05-26 20:50:54 -07:00
Brian Paul
3039acfc5d Merge branch 'mesa_7_5_branch'
Conflicts:

	src/mesa/main/arrayobj.c
	src/mesa/main/arrayobj.h
	src/mesa/main/context.c
2009-05-13 10:33:21 -06:00
Brian Paul
2e4e346890 intel: create a private gl_array_object for intel_clear_tris(), fix bug 21638
gl_array_object encapsulates a set of vertex arrays (see the
GL_APPLE_vertex_array_object extension).
Create a private gl_array_object for drawing the quad for intel_clear_tris()
so we don't have to worry about the user's vertex array state.
This fixes the no-op glClear bug #21638 and removes the need to call
_mesa_PushClientAttrib() and _mesa_PopClientAttrib().
2009-05-13 10:28:00 -06:00
Eric Anholt
1d663ae292 intel: Add a metaops version of glGenerateMipmapEXT/SGIS_generate_mipmaps.
In addition to being HW accelerated, it avoids the incorrect
(black) rendering of the mipmaps that SW was doing in fbo-generatemipmap.
Improves the performance of the mipmap generation and drawing in
fbo-generatemipmap by 30%.
2009-05-08 14:18:04 -07:00
Eric Anholt
b6e94f71c2 intel: Put the constant texcoords used in metaops into a vbo.
Make this be its own function for setup/teardown of the binding of these
texcoords.  No performance difference in the engine demo (I just felt dirty
not using a VBO for this), and I think it should be more resilient to
interference from current GL state.
2009-05-08 14:18:04 -07:00
Eric Anholt
2c30fd84df intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.
Also enable them all regardless of screen bpp, as 32 bpp what I've been
testing against, and haven't been able to detect any screen bpp-specific
troubles with them.
2009-04-16 12:04:30 -07:00
Ian Romanick
43cf0d1eeb intel / DRI2: Track and flush front-buffer rendering
Track two flags:  whether or not front-buffer rendering is currently
enabled and whether or not front-buffer rendering has been enabled
since the last glFlush.  If the second flag is set, the front-buffer
is flushed via a loader call back.  If the first flag is cleared, the
second flag is cleared at this time.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kristian Høgsberg <krh@redhat.com>
2009-04-09 14:18:14 -07:00
Eric Anholt
6b187cc8a5 intel: Avoid dri2 GetBuffers round-trips for internal Viewport calls.
This gets us the savings for driver-internal viewport calls that
dd1c68f151 was attempting, without relying
on Xlib internals or clients handling X events.
2009-04-06 11:17:25 -07:00
Eric Anholt
40bc2748c2 intel: Add always_flush_batch driconf option for making small batchbuffers.
This can improve debugging with INTEL_DEBUG=batch,sync by giving smaller
batchbuffers.
2009-03-05 19:42:18 -08:00
Eric Anholt
f3687284c1 intel: Add always_flush_cache driconf option for debugging cache flush failure.
I keep wanting to hack this knob in as a one-time thing, so it seemed useful
to have all the time.
2009-03-05 19:42:17 -08:00
Eric Anholt
0d31e340f8 i965: Remove dead flushing code. 2009-03-05 19:42:16 -08:00
Robert Ellison
3468315087 i965: add software fallback for conformant 3D textures and GL_CLAMP
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier
commit forced a software fallback if strict conformance was required
(i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and
2D textures were used, but it was somewhat flawed - it could trigger
the software fallback even if 2D textures weren't enabled, as long
as one texture unit was enabled.

This fixes that, and adds software fallback for GL_CLAMP behavior with
1D and 3D textures.

It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE
environment variable, which forces software fallbacks to be taken *all*
the time.  This is helpful with debugging.  The value is:
   export INTEL_STRICT_CONFORMANCE=2
2009-03-04 16:59:00 -07:00