The following tests now pass:
glslparsertest/shaders/if1.frag
glslparsertest/shaders/if2.frag
The following tests that used to pass now fail. It appears that most
of these fail because ast_nequal and ast_equal are not converted to HIR.
shaders/glsl-unused-varying.frag
shaders/glsl-fs-sqrt-branch.frag
Making the base e functions IR operations is not a clear win. i965
doesn't support it, it doesn't look like r600 supports it, but r500
does. It should be easily supportable as a lowering pass, though.
Following a discussion in #dri-devel, I think this makes more sense
than implementing it as RSQ RCP CMP as Mesa did. The i965 has a
hardware sqrt that should work, and AMD is suppposed to be able to
implement it as RSQ RCP with an alternate floating point mode so that
the 0.0 case is handled like we want.
Also turn generate_swizzle into a static "create" method of the new
class; we'll want to use it for the IR reader as well.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Also make a slight change to ir_variable. The ir_dereference tracks
the number of nested dereferences. If an ir_variable is visited and
the count is non-zero, just print the name of the variable.
The ir_visitor class is the abstract base class for all visitors.
ir_print_visitor contains the beginnings of a concrete visitor class
that will print out an IR sequence in a Lisp / Scheme-like syntax.
