Ian Romanick
c2dda8c8e7
intel/elk: Fix undefined shift by 64 of uint64_t in elk_compute_first_urb_slot_required
...
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Matt Turner <mattst88@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30333 >
2024-07-26 17:18:01 -07:00
Ian Romanick
e6669467b8
intel/brw: Fix undefined left shift of negative value in brw_texture_offset
...
When -fsanitize=shift is used, many instances of the following are
produced:
src/intel/compiler/brw_fs_nir.cpp:114:30: runtime error: left shift of negative value -1
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Matt Turner <mattst88@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30333 >
2024-07-26 17:17:59 -07:00
Ian Romanick
4f24c2707f
intel/brw: Fix undefined left shift of large UW value in brw_imm_uw
...
When -fsanitize=shift is used, 'ninja test' would fail in several
Intel assembly tests (mul.asm and and.asm) with:
src/intel/compiler/brw_reg.h:703:22: runtime error: left shift of 65532 by 16 places cannot be represented in type 'int'
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Matt Turner <mattst88@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30333 >
2024-07-26 17:17:56 -07:00
Ian Romanick
abb7c012ff
intel/brw: Fix undefined left shift of negative value in update_uip_jip
...
When -fsanitize=shift is used, many instances of the following are
produced:
src/intel/compiler/brw_eu_compact.c:2244:50: runtime error: left shift of negative value -306
v2: Add comment and assertion to explain why the shift is
safe. Suggested by Caio.
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Matt Turner <mattst88@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30333 >
2024-07-26 17:17:53 -07:00
Ian Romanick
228e049db6
intel/brw: Fix undefined shift by 64 of uint64_t in brw_compute_first_urb_slot_required
...
When -fsanitize=shift is used, many instances of the following are
produced:
src/intel/compiler/brw_compiler.h:1661:44: runtime error: shift exponent 64 is too large for 64-bit type 'long long unsigned int'
I think this is an actual bug. It should check the sentinel value, but
the sentinel value is 64. The shift by 64 is treated as a shift by
0. The varying 0 is explicitly filtered by the rest of the
if-test. How does this work?
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Matt Turner <mattst88@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30333 >
2024-07-26 17:17:15 -07:00
Sushma Venkatesh Reddy
455deacbce
intel/brw: Fix DEBUG_OPTIMIZER
...
Due to recent regression, adding INTEL_DEBUG=optimizer is dumping
shader optimization pass details to console rather than to respective
files.
Thank you, Kenneth W Graunke for helping me figure this out.
Fixes: 17b7e49089
("intel/brw: Move out of fs_visitor and rename print instructions")
Signed-off-by: Sushma Venkatesh Reddy <sushma.venkatesh.reddy@intel.com >
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com >
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com >
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30389 >
2024-07-26 22:22:58 +00:00
José Roberto de Souza
eb5a3617e2
anv: Handle internal shader compilation failure
...
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30380 >
2024-07-26 21:58:21 +00:00
José Roberto de Souza
196b3d7b5b
anv: Improve error message when pipeline creation fails during shader compilation
...
Due the lack of SIMD8 in Xe2 platforms we are not able to compile
a shader for dEQP-VK.protected_memory.stack.stacksize_1024 that fits
into scratch space.
So before this patch when such failure happened it would return
VK_ERROR_OUT_OF_HOST_MEMORY error.
So here when available include the compiler error string to better
inform what the actual failure.
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30380 >
2024-07-26 21:58:21 +00:00
Daniel Stone
0b16d7ebb9
dri: Allow INVALID for modifier-less drivers
...
If the user passes in DRM_FORMAT_MOD_INVALID as an acceptable modifier,
we can progress with implicit modifiers. Add this to a more
comprehensive special case along with linear to make sure that we can
still allocate when users pass in a modifier list to a driver which
doesn't support modifiers.
Signed-off-by: Daniel Stone <daniels@collabora.com >
Fixes: 361f362258
("dri: Unify createImage and createImageWithModifiers")
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30383 >
2024-07-26 21:28:01 +00:00
Jianxun Zhang
349e7a2919
intel/common: Remove blank lines in intel_set_ps_dispatch_state() (xe2)
...
Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29907 >
2024-07-26 21:02:24 +00:00
Jianxun Zhang
cb7f816fc4
intel/common: Ensure SIMD16 for fast-clear kernel (xe2)
...
Add a restriction on SIMD mode for fast-clear pixel
shader according to the Bspec.
Backport-to: 24.2
Signed-off-by: Jianxun Zhang <jianxun.zhang@intel.com >
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com >
Reviewed-by: Francisco Jerez <currojerez@riseup.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29907 >
2024-07-26 21:02:24 +00:00
José Roberto de Souza
5fdacb56ed
anv: Propagate protected information to blorp_batch_isl_copy_usage()
...
This fixes protected tests that uses vkCmdCopyBuffer().
Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30369 >
2024-07-26 20:36:32 +00:00
José Roberto de Souza
79f95a3711
isl: Fix Xe2 protected mask
...
BSpec 71045 and 57023 still points that protected/encrypted bit is still
bit 0, bit 1 should not be set or undesired MOCS index could be set.
Fixes: 7be8bc2c97
("isl: Add mocs for xe2")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Signed-off-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30369 >
2024-07-26 20:36:32 +00:00
Eric Engestrom
79389b9f6f
v3d/ci: mark glx@glx-visuals-depth as flaky on rpi4, just like the -stencil variant
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30387 >
2024-07-26 20:18:12 +00:00
Mike Blumenkrantz
40004219b1
dri: fix kmsro define
...
Fixes: 50fc7cc290
("glx: directly link to gallium")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30376 >
2024-07-26 19:41:37 +00:00
Alyssa Rosenzweig
5bc8284816
hk: add Vulkan driver for Apple GPUs
...
Honeykrisp is a Vulkan 1.3 driver for Apple GPUs. It currently support M1 and
M2, future hardware support is planned. It passed CTS a few months ago and with
two exceptions[1] should still pass now.
Compared to the May snapshot that passed conformance [1], this adds a bunch of
new features, most notably:
* Geometry shaders
* Tessellation shaders
* Transform feedback
* Pipeline statistics queries
* Robustness2
* Host image copy
Theoretically, we now support everything DXVK requires for D3D11 with full
FL11_1. To quote Rob Herring:
How's performance? Great, because I haven't tested it.
This driver is NOT ready for end users... YET. Stay tuned, it won't be long now
:}
I would like to reiterate: Honeykrisp is not yet ready for end users. Please
read [3].
Regardless, as the kernel UAPI is not yet stable, this driver will refuse to
probe without out-of-tree Mesa patches. This is the same situation as our GL
driver.
On the Mesa side, the biggest todo before the release is improving
performance. Right now, I expect WineD3D with our GL4.6 driver to give better
performance. This isn't fundamental, just needs time ... our GL driver is 3
years old and honeykrisp is 3 months old.
On the non-Mesa side, there's still a lot of movement around krun and FEX
packaging before this becomes broadly useful for x86 games.
At any rate, now that I've finished up geometry and tessellation, I'm hopefully
done rewriting the whole driver every 2 weeks. So I think this is settled enough
that it makes sense to upstream this now instead of building up a gigantic
monster commit in a private branch.
[1] Pipeline robustness and pipeline statistics are included in this tree but
need bug fixes in the CTS to pass. This is being handled internally in
Khronos. These features may be disabled to get a conformant driver.
[2] https://rosenzweig.io/blog/vk13-on-the-m1-in-1-month.html
[3] https://dont-ship.it/
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
767280fd73
libagx: rework tess i/o
...
this simplifies state which hk wants.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
2bf01845d0
libagx: mask counters to 32-bit
...
possibly we should use real 64-bit counters, that's something for later though.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
16caad4038
libagx: add statistic increment kernel
...
for TCS
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
0708f92b37
ail: add ail_get_level_size_B helper
...
this will be useful for host_image_copy
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
633540c18a
ail: constify more arguments
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
76e3bd56f6
asahi: offset buffer images in software
...
this is needed for honeykrisp to implement
uniformTexelBufferOffsetSingleTexelAlignment.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
735c63c75e
libagx: hoist code out of loop
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
4e5ce7e759
asahi: split up agx_nir_lower_vs_before_gs
...
honeykrisp needs to preserve info for a little longer.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
d3e7a7b8c8
asahi: add TES->compute lowering
...
honeykrisp wants to do this explicitly so we don't need prologs for TES. the gl
driver uses TES prologs implicitly for the same effect, but that's ...
suboptimal.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
9595d79b89
asahi: make GS inputs explicit
...
we don't want to assume VS->GS, since we want to reuse the root uniforms across
the whole draw with honeykrisp tess+gs.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
f6e9e7d3ce
libagx: fix prefix sum kernel
...
the calculation of workgroup reductions was wrong, giving nondeterministic
results when prefix summing >= 1024 items. fixes misrendering in
terraintessellation on honeykrisp.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
bdbd81ea40
asahi: drop #includes
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
21fa5faeec
asahi: drop pointless conversion
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
96306a8b21
asahi: refactor prolog lowering
...
combine 2 passes and get something less silly as the result.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
0bd897989e
asahi: drop unused patch index buffer lowering
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
3992a54dcf
asahi: drop dead code
...
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Asahi Lina
8808441814
asahi: Relax cross-context flush
...
Instead of doing a full sync, we can use a screen-global timeline sync
object to globally serialize on the GPU side when one context flushes,
so we don't actually have to wait on the CPU.
Signed-off-by: Asahi Lina <lina@asahilina.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Asahi Lina
1cd60fb2c7
asahi: Fix non-async flush
...
As far as I can tell, we're actually supposed to do a full sync here if
ASYNC or DEFERRED are not specified.
Signed-off-by: Asahi Lina <lina@asahilina.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Asahi Lina
a0cdd9d5ed
asahi: Add more batch debug
...
Signed-off-by: Asahi Lina <lina@asahilina.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Asahi Lina
ac4ba43c55
asahi: Print queue ID with batch debug
...
Signed-off-by: Asahi Lina <lina@asahilina.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Asahi Lina
2c057cc4d9
asahi: Add 1queue debug option
...
This is a hacky implementation but it's for debug only anyway.
Signed-off-by: Asahi Lina <lina@asahilina.net >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
d0424eb63b
vk/meta: add VK_IMAGE_VIEW_CREATE_INTERNAL_MESA flag
...
honeykrisp to use, and hopefully common vk_meta will use this soon too
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Alyssa Rosenzweig
0d66ba6e5d
vk/meta: add buffer view tracking
...
honeykrisp will use this, at least for now.
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io >
Acked-by: Faith Ekstrand <faith.ekstrand@collabora.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30382 >
2024-07-26 18:40:47 +00:00
Lionel Landwerlin
d5b0526507
anv: propagate protected information for blorp operations
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29982 >
2024-07-26 18:15:43 +00:00
Lionel Landwerlin
8d9cc6aa23
anv: properly flag image/imageviews for ISL protection
...
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29982 >
2024-07-26 18:15:43 +00:00
Lionel Landwerlin
4eab285d4a
isl: account for protection in base usage checks
...
Only Cc stable because it's needed for the next patches.
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com >
Cc: mesa-stable
Reviewed-by: José Roberto de Souza <jose.souza@intel.com >
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29982 >
2024-07-26 18:15:43 +00:00
Eric Engestrom
1337e00a89
v3d/ci: mark spec@amd_performance_monitor@api as flaky on rpi4
...
It's been failing a lot in the last few days, blocking a bunch of MRs.
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30385 >
2024-07-26 19:31:56 +02:00
Faith Ekstrand
37a38f6744
nak/sm50: Add support for OpAL2P
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00
Faith Ekstrand
cd176c8784
nvk: Fix zero-size vertex/index buffer bindings pre-Turing
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00
Faith Ekstrand
2439cb8450
nvk: Use nvk_buffer_addr_range() for index buffers
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00
Faith Ekstrand
c3682ccf60
nak: Implement depth clip control pre-Volta
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00
Faith Ekstrand
e287ba95b0
nak/sm50: Fix the encoding of ffma with cbuf in src2
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00
Faith Ekstrand
3353374287
nak: Add tests for OpLop2 and OpLop3
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00
Faith Ekstrand
dc4ebfd562
nak/sm50: OpLop2 does not have .X
...
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30381 >
2024-07-26 15:46:59 +00:00