Commit Graph

189914 Commits

Author SHA1 Message Date
Jordan Justen
c1d3fa007c intel/dev: Add BMG PCI IDs (with FORCE_PROBE set)
Ref: bspec 68090
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
2024-05-30 00:32:44 +00:00
Jordan Justen
1964346481 intel/dev: Add BMG device info
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
2024-05-30 00:32:44 +00:00
José Roberto de Souza
25e7b74712 intel/dev: Add BMG stepping mapping
Bspec: 68090
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
2024-05-30 00:32:44 +00:00
José Roberto de Souza
d4a180639f intel/dev: Add LNL stepping mapping
Without this mapping no temporary workaround will be applied to LNL.

BSpec: 70821
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
2024-05-30 00:32:44 +00:00
Jordan Justen
06ec218fdf intel/dev: Add INTEL_PLATFORM_BMG enum, BMG WA info
intel/dev/mesa_defs.json also must be updated when the new platform
enum is added.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
2024-05-30 00:32:44 +00:00
Jordan Justen
b2dbed2da0 intel/dev/mesa_defs.json: Update LNL WA entries
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29457>
2024-05-30 00:32:44 +00:00
Kevin Chuang
f8ccf70c99 anv: Properly fetch partial results in vkGetQueryPoolResults
Currently for an "unavailable" query, if VK_QUERY_RESULT_PARTIAL_BIT is
set, anv will return (slot.end - slot.begin). This can cause underflow
because slot.end might still be at the initial value of 0.

This commit fixes the issue by returning 0 in that situation.

Cc: mesa-stable
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29447>
2024-05-29 18:03:28 +00:00
Karmjit Mahil
7bdcbe11ac turnip: Remove workaround for CTS bug zero-sized inline uniform block
The cts issue was addressed in:
  ae8b8a0711

Affected:
  dEQP-VK.binding_model.descriptorset_random.*.iublimit*

Signed-off-by: Karmjit Mahil <karmjit.mahil@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29414>
2024-05-29 17:36:27 +00:00
Juan A. Suarez Romero
a54f7f7dc5 v3d,v3dv: add compatibility revision in GPU name
So the version matches exactly the same as reported by the kernel in
`/sys/kernel/debug/dri/128/v3d_ident`, or the version used in the
simulator.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29186>
2024-05-29 16:23:40 +00:00
Juan A. Suarez Romero
ac7971e7f4 v3d: use screen name in disk cache
To keep in sync the GPU name used by the (pipe) screen and disk cache,
use the former in the latter.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29186>
2024-05-29 16:23:40 +00:00
Rohan Garg
7900ecdfc7 isl: Enable volumetric STC_CCS,HiZ+CCS on gfx12.0
The only remaining restriction applies to single sampled 3D textures on
Gen12.0. Move the check to disable CCS on such resources to the right
place.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
2024-05-29 15:50:23 +00:00
Rohan Garg
b69a34ab66 isl: disable CCS for 3D depth/stencil surfaces when WA is applicable
Clarify why 3D Tile64 on depth stencil buffers is unfeasible.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
2024-05-29 15:50:22 +00:00
Nanley Chery
1891b3db73 intel/isl: Allow sampling from 3D HIZ_CCS_WT
The restriction in RENDER_SURFACE_STATE is gone.

Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
2024-05-29 15:50:22 +00:00
Rohan Garg
309c228bb7 anv: 3D stencil surfaces have fewer layers for higher miplevels
Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28646>
2024-05-29 15:50:22 +00:00
Rhys Perry
1829d74ad3 aco: fix fddx/y with uniform inf/nan input
inf or nan subtracted by itself is not zero.

I don't think Vulkan requires this, but this better matches NIR's constant
folding and the divergent implementation.

fossil-db (navi31):
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 537 -> 588 (+9.50%)
CodeSize: 3132 -> 3380 (+7.92%)
Latency: 2806 -> 2819 (+0.46%)
InvThroughput: 286 -> 316 (+10.49%)
Copies: 24 -> 39 (+62.50%)
VALU: 262 -> 289 (+10.31%)
SALU: 33 -> 51 (+54.55%)

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29418>
2024-05-29 15:18:52 +00:00
Antonio Ospite
09fb55ea92 meson: fix deprecation warning in create-android-cross-file.sh
When running .gitlab-ci/container/debian/android_build.sh using the
cross files created by .gitlab-ci/container/create-android-cross-file.sh
meson prints out the following warning:

-----------------------------------------------------------------------
DEPRECATION: "pkgconfig" entry is deprecated and should be replaced by "pkg-config"
-----------------------------------------------------------------------

Use the suggested name `pkg-config` in the cross files to silence the
warning.

Apply the same change also to the example meson cross file in
docs/android.rst

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29431>
2024-05-29 14:22:39 +00:00
Eric Engestrom
b8f1e95cbe freedreno/a6xx: fix kernel -> compute handling
9b2780dcaf folds the kernel path into the compute path, and then adds
a `compute -> compute` conversion that was very likely meant to be
`kernel -> compute`, so fix that.

Fixes: 9b2780dcaf ("freedreno/a6xx: Re-work fd6_emit_shader")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29458>
2024-05-29 13:44:44 +00:00
Georg Lehmann
b04d99d093 aco/optimizer: use p_create_vector to create mask when a copy can't be used
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
2024-05-29 11:59:22 +00:00
Georg Lehmann
2b56a97374 aco/lower_to_hw: optimize split 64bit constant copies
Foz-DB Navi21:
Totals from 3209 (4.04% of 79395) affected shaders:
Instrs: 6502065 -> 6496612 (-0.08%)
CodeSize: 35578300 -> 35556596 (-0.06%)
Latency: 66092924 -> 66092668 (-0.00%); split: -0.00%, +0.00%
InvThroughput: 16968953 -> 16968900 (-0.00%); split: -0.00%, +0.00%
SClause: 198651 -> 198647 (-0.00%)
Copies: 597323 -> 591872 (-0.91%)
SALU: 930918 -> 925467 (-0.59%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
2024-05-29 11:59:22 +00:00
Georg Lehmann
5910a46101 aco/lower_to_hw: use copy_constant_sgpr for masks
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
2024-05-29 11:59:22 +00:00
Georg Lehmann
23d88e68fc aco: small constant copy optimizations
Foz-DB Navi21:
Totals from 13 (0.02% of 79395) affected shaders:
CodeSize: 93432 -> 93376 (-0.06%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
2024-05-29 11:59:22 +00:00
Georg Lehmann
54ad07c32a aco/lower_to_hw: add copy_constant_sgpr
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
2024-05-29 11:59:22 +00:00
Georg Lehmann
56354c6cd7 aco: don't pass program to emit_bpermute
Also change the param order, because the builder typically comes first.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29422>
2024-05-29 11:59:22 +00:00
Iago Toral Quiroga
98a86f8743 v3dv: lower maxVertexInputBindingStride to match vulkan runtime
Since we now use the common vulkan runtime to handle pipeline state and
this sets a limit for this at MESA_VK_MAX_VERTEX_BINDING_STRIDE we should
do the same, or else we can run into an assert-fail in the runtime code.

Fixes:
dEQP-VK.pipeline.monolithic.bind_buffers_2.maintenance5.triangle_list.buffers5.stride_offset_rnd321.whole_size

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29454>
2024-05-29 11:13:11 +00:00
Alejandro Piñeiro
03554f18b3 v3dv/device: set DescriptorUpdateAfterBind limits
We were exposing them as zero, as based on just the name, we assumed
that it was about the descriptors using the
VK_DESCRIPTOR_SET_LAYOUT_CREATE_UPDATE_AFTER_BIND_POOL_BIT bit.

But from spec, that limit takes into account descriptors created *with
or without*, so for example:

  "maxPerStageDescriptorUpdateAfterBindUniformBuffers is similar to
   maxPerStageDescriptorUniformBuffers but counts descriptors from
   descriptor sets created with or without the
   VK_DESCRIPTOR_SET_LAYOUT_CREATE_UPDATE_AFTER_BIND_POOL_BIT bit
   set."

As we don't support the feature, those limits are the same of the
existing without the DescriptorUpdateAfterBind.

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29430>
2024-05-29 10:35:27 +00:00
Alejandro Piñeiro
d6ac631c43 v3dv/device: compute maxDescriptorSet*Limits multiplying per-stage by 4
We were multiplying it by 6, that is the number of possible shader
stages, but from spec it points that we need to multiply by the number
of supported shader stages.

From Vulkan 1.3 spec, chapter 33, "Limits", note 8 on Table 33
"Required Limits":

  "The minimum maxDescriptorSet* limit is n times the corresponding
   specification minimum maxPerStageDescriptor* limit, where n is the
   number of shader stages supported by the VkPhysicalDevice. If all
   shader stages are supported, n = 6 (vertex, tessellation control,
   tessellation evaluation, geometry, fragment, compute)."

Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29430>
2024-05-29 10:35:27 +00:00
Iago Toral Quiroga
3f3c83a6b7 v3dv: handle VkPipelineCreateFlags2CreateInfoKHR
This is added with VK_KHR_maintenance5 to allow 64-bit
for pipeline creation flags.

The flags are backwards compatible so we don't need to
change the flag enum values by the new ones.

This patch also addresses a small issue where compute pipelines
where not initializing the flags field in the pipeline object.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29449>
2024-05-29 09:40:15 +00:00
Iago Toral Quiroga
5ff01962fc v3dv: handle VkBufferUsageFlags2CreateInfoKHR
This is added with VK_KHR_maintenance5 to allow 64-bit
for buffer usage flags.

The flags are backwards compatible so we don't need to
change the flag enum values by the new ones.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29449>
2024-05-29 09:40:15 +00:00
Konstantin Seurer
b31919f36e radv: Return a block from radv_replay_shader_arena_block
ret_block is only set to NULL.

Fixes: 28be0cc ("radv: Add locking to radv_replay_shader_arena_block")
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29455>
2024-05-29 09:10:47 +00:00
Erik Faye-Lund
0f7bdc2d36 mesa/main: fixup indent
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
e80201a685 mesa/main: prefer non-suffixed enums
These are the same enums, we're just sometimes using the old spelling.
Let's be consistent and use the non-EXT/ARB enums instead.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
a37333305b mesa/main: do not return _REV format for uncompressed format
Instead of returning the wrong value, and then correct it later on,
let's just return the correct value right away.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
b9b4507faa mesa/main: clean up switch statement
This groups the enums by return-value, and makes the table more
compact and easier to scan through.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
1ddd043273 mesa/main: clean up _mesa_uncompressed_format_to_type_and_comps
No callsites cares about the number of components any more, so let's
remove it. Rename and make it return a single enum instead of passing
return values through pointers while we're at it.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
d549d4fa82 mesa/main: rework GL_IMAGE_PIXEL_TYPE query
This used to depend on both _mesa_get_shader_image_format() and
_mesa_uncompressed_format_to_type_and_comps() doing a specific mapping
to behave like the spec requires. But only a small subset of what the
latter function does is needed, and that function is used for other
purposes where the needs are dictated by other means.

It's going to be easier to maintain this code if we use different
implementations for these two things.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Erik Faye-Lund
563b9786ce mesa/main: remove unused function
This has been unused since 8ec6534b26 ("mesa: Use _mesa_format_convert
to implement texstore_rgba."), from October 2014. It took us close to
10 years to notice that it's been unused. Let's remove it :)

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29386>
2024-05-29 06:41:03 +00:00
Samuel Pitoiset
07a826ba93 radv: fix flushing DB meta cache on GFX11.5
Only GFX11 is affected by this hw bug.
Found by inspection.

Cc: mesa-stable
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29424>
2024-05-29 06:21:17 +00:00
Mike Blumenkrantz
bc29d2c9fc zink: add atomic image ops to the ms deleting pass
this otherwise results in nir validation errors

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11209

Fixes: 90cf8d14d6 ("zink: add a pass to strip out multisample storage image ops")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29383>
2024-05-29 01:51:12 +00:00
Eric Engestrom
8e60f26016 vc4/ci: skip VK piglit tests
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29442>
2024-05-28 20:24:44 +00:00
Valentine Burley
20f4cd88e1 tu: Advertise VK_KHR_maintenance6
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360>
2024-05-28 20:02:50 +00:00
Valentine Burley
14d3dd8984 tu: Add support for version 2 of all descriptor binding commands
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360>
2024-05-28 20:02:50 +00:00
Valentine Burley
94e2c6d000 tu: Add support for NULL index buffer
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360>
2024-05-28 20:02:50 +00:00
Valentine Burley
7ac6aaf522 tu: Add support for VkBindMemoryStatusKHR
Signed-off-by: Valentine Burley <valentine.burley@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28360>
2024-05-28 20:02:50 +00:00
Eric Engestrom
06f7407172 ci: disable debian-build-testing until it can be fixed
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29439>
2024-05-28 19:28:08 +00:00
Jordan Justen
410ca6a3e9 Revert "anv: Disable Ray Tracing on xe2 until our compiler supports Xe2 RT"
This reverts commit 65684b0c7f.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
f1b502f8c7 anv/grl: Build for xe2
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
4ffe1a9f9e intel/brw: Fix SSBO/shared load offset register size for Xe2
Rework:
 * Ken: Reword commit message

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
4bc4da01f4 intel/brw: Allow xe2 in brw_stage_has_packed_dispatch()
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
739613ec70 intel/brw: Simplify enabling brw_fs_test_dispatch_packing
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Francisco Jerez <currojerez@riseup.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00
Jordan Justen
aa152ef431 anv/grl: Set INTEL_FORCE_PROBE=* when running intel_clc
In order to build grl, we need to get the device_info struct from the
PCI ID, but for pre-production platforms we don't want to enable them
unless INTEL_FORCE_PROBE is set.

Setting it when running intel_clc allows us to get the device_info
struct when the pre-production hardware is not ready to be enabled by
default.

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29273>
2024-05-28 18:45:49 +00:00