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Author SHA1 Message Date
Faith Ekstrand
bf9038b3b8 radv: Advertise VK_EXT_shader_replicated_composites 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
705dc133c2 hasvk: Advertise VK_EXT_shader_replicated_composites 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
a7db1e80d0 anv: Advertise VK_EXT_shader_replicated_composites 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
d805ffd1a4 nvk: Advertise VK_EXT_shader_replicated_composites 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
c452143024 spirv: Implement SPV_EXT_replicated_composites 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
fff42bcc66 spirv: Assert that non-vector composites have the right length 
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
8fa46b31a8 spirv: Handle constant cooperative matrices in OpCompositeExtract 
Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
7e6cd395c7 nir: Handle cmat types in lower_variable_initializers 
Fixes: b98f87612b ("spirv: Implement SPV_KHR_cooperative_matrix")
Reviewed-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
c2ab522360 spirv: Update the JSON and headers 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Faith Ekstrand
5e01f9848b vulkan: Update XML and headers to 1.3.286 
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Acked-by: Konstantin Seurer <konstantin.seurer@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29509>
 2024-06-04 16:34:48 +00:00
Kevin Chuang
4c7f51d3b4 anv: implement mesh shader queries 
Mesh shader queries include mesh-primitives-generated count and
task/mesh shader pipeline statistics.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523>
 2024-06-04 16:24:48 +00:00
Kevin Chuang
b69f7f625b anv: Update pipeline statistics mask for task/mesh shader invocations 
Since VkQueryPipelineStatisticFlagBits is extended by two bits for
task/mesh shader invocations, ANV_PIPELINE_STATISTICS_MASK should be
defined conditionally based on GFX_VER.

This commit modifies the mask and updates the vk_pipeline_stat_to_reg
array accordingly.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523>
 2024-06-04 16:24:48 +00:00
Kevin Chuang
d07321e3d8 intel/genxml: add task/mesh shader statistics registers 
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29523>
 2024-06-04 16:24:48 +00:00
Lionel Landwerlin
d9567b5ee4 anv: fix Gfx9 fast clears on srgb formats 
Only MCS surfaces are affected because SRGB format are not listed as
supporting CCS compression.

Fixes CTS test :
  dEQP-VK.api.image_clearing.core.clear_color_attachment.single_layer.*_srgb_*sample_count_*
  dEQP-VK.api.image_clearing.dedicated_allocation.clear_color_attachment.single_layer.*srgb*

This is similar to what we did in Iris in f8961ea0 ("iris: Disable
sRGB fast-clears for non-0/1 values").

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/10003
Fixes: 4cfb4f7d12 ("anv: support fast color clears on vkCmdClearAttachments")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29518>
 2024-06-04 16:12:32 +00:00
Georg Lehmann
18a0ff137f nir: sink/move inverse_ballot like moves 
It's just a copy for the backends that don't lower it.

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502>
 2024-06-04 15:40:57 +00:00
Georg Lehmann
818ff03865 aco: optimize branching sequence with p_create_vector exec producer 
This happens with inverse_ballot and wave64.

Foz-DB Navi21:
Totals from 3 (0.00% of 79395) affected shaders:
Instrs: 2689 -> 2683 (-0.22%)
CodeSize: 14988 -> 14972 (-0.11%)
Latency: 20207 -> 20204 (-0.01%)
Copies: 144 -> 141 (-2.08%)
Branches: 76 -> 73 (-3.95%)
SALU: 241 -> 238 (-1.24%)

Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502>
 2024-06-04 15:40:57 +00:00
Georg Lehmann
690f880d18 nir/opt_uniform_atomics: handle inverse_ballot when detecting single lane ifs 
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29502>
 2024-06-04 15:40:57 +00:00
bbhtt
4f5503fa2d nvk: Clean up unused header from libdrm_nouveau 
This was added in 6e0089307e without a
dependency on libdrm_nouveau. If libdrm is not compiled with nouveau
enabled, the build errors here.

This is currently unused and since
821f4c8d99 removed dependency on
libdrm_nouveau, this should be gone too.

Fixes: 821f4c8d99 ("nouveau: import libdrm_nouveau")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29517>
 2024-06-04 15:24:40 +00:00
Rob Clark
46322630f1 gallium/tc: Allow replacement if replacing valid_range 
If a buffer upload replaces the entire valid_buffer_range, we can
promote the update to DISCARD_WHOLE_RESOURCE.  This helps badly behaved
apps which constantly upload to the same offset (but are overwriting
the entire valid range each time).

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507>
 2024-06-04 14:49:56 +00:00
Rob Clark
27dd3807a8 freedreno: Use buffer replacement limit 
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507>
 2024-06-04 14:49:56 +00:00
Rob Clark
4c469b7cf0 gallium/tc: Add optional buffer replacement limit 
Allow drivers to limit the amount of replacement buffers created, to
avoid runaway memory scenarios.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29507>
 2024-06-04 14:49:56 +00:00
Iago Toral Quiroga
0311ac50ad v3dv: implement vkGetDeviceImageSubresourceLayoutKHR 
Added with VK_KHR_maintenance5.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472>
 2024-06-03 07:59:21 +00:00
Iago Toral Quiroga
b882cf2ae3 v3dv: add a get_image_subresource_layout helper 
We want to use this helper to implement VkDeviceImageSubresourceInfoKHR.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472>
 2024-06-03 07:59:21 +00:00
Iago Toral Quiroga
bf4a8a5c5a v3dv: refactor create_image 
So we can have a single internal helper we can use to create
any type of image.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472>
 2024-06-03 07:59:21 +00:00
Iago Toral Quiroga
cccdaab4ef v3dv: implement vkGetImageSubresourceLayout2KHR 
Added with VK_KHR_maintenance5.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29472>
 2024-06-03 07:59:21 +00:00
Sergi Blanch Torne
dfabed2fc9 Uprev Piglit to cf8daaf5ba90fc9b8a0e144355026e2a14c79944 
e180f96239...cf8daaf5ba

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29364>
 2024-06-03 06:58:28 +00:00
Sergi Blanch Torne
065ad0f271 ci: disable Collabora's farm due to maintenance 
Planned downtime in the farm:
* Start: 2024-06-03 07:00 UTC
* End: 2024-06-03 13:00 UTC

Signed-off-by: Sergi Blanch Torne <sergi.blanch.torne@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29486>
 2024-06-03 06:06:44 +00:00
Timothy Arceri
8112d44b94 lima: remove the standalone compiler 
This is mostly a revert of cc78a42577 but we leave the meson tools
option as there is now a disassem tool.

This standalone compiler is unmaintained. The replacement is using
drm_shim which goes through the maintained/tested path.

Reviewed-by: Erico Nunes <nunes.erico@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29494>
 2024-06-03 00:25:44 +00:00
David Heidelberg
a79a2486c7 ci: propagate RUSTICL_ENABLE and DEBUG variables to the DUTs 
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29513>
 2024-06-02 07:13:33 +00:00
David Heidelberg
0b54ccff57 ci/lava: the containers take sometimes more than 60m 
It's sad, but killing the rebuild because of 60m when it finishes in 70m
it's such a waste. The Marge-bot pipeline will timeout anyway, so no
change here.

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29513>
 2024-06-02 07:13:33 +00:00
David Heidelberg
46dd8b8d89 ci/radv: Document recent flake 
Probably same as dfe5e56671 and 1f0f76dbdc .

Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29514>
 2024-06-02 06:56:57 +00:00
Karol Herbst
bc149e0303 iris: fix PIPE_RESOURCE_PARAM_STRIDE for buffers 
Iris calls iris_resource_get_param with PIPE_RESOURCE_PARAM_STRIDE
internally now when exporting memory objects. OpenCL's gl_sharing allows
to export buffers as well, which do not have strides.

This fixes the assert being hit there for buffers.

Fixes: 831703157e ("iris: Use resource_get_param in resource_get_handle")
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29501>
 2024-06-01 23:35:46 +00:00
David Heidelberg
2620a7064c ci: move (c)bindgen to own shell script 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394>
 2024-06-01 20:16:32 +00:00
David Heidelberg
a93932daf0 ci/meson: reuse meson installation 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394>
 2024-06-01 20:16:32 +00:00
David Heidelberg
24d9c066e2 ci/lava: add support for RustiCL 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394>
 2024-06-01 20:16:32 +00:00
David Heidelberg
70515de489 ci/arm64: rustify the build 
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29394>
 2024-06-01 20:16:32 +00:00
David Heidelberg
a77d953e20 mailmap: update my email 
Signed-off-by: David Heidelberg <david@ixit.cz>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29511>
 2024-06-01 18:25:28 +00:00
Kevin Chuang
3349963645 anv: Properly handle cases for different query types in copy_query_results_with_shader 
Like it describes in the comment section of VK_QUERY_TYPE_OCCLUSION,
only occlusion and timestamps queries needs ANV_COPY_QUERY_FLAG_PARTIAL.
VK_QUERY_TYPE_PRIMITIVES_GENERATED_EXT is captured by MI commands.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29493>
 2024-06-01 13:05:48 +00:00
Timothy Arceri
71d455b96f glsl: remove unused detect_recursion_linked() 
This is now unused as the recursion is now detected via a nir pass.

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29495>
 2024-05-31 23:53:07 +00:00
Lionel Landwerlin
724bb7fa15 brw: better model READ_ARF_REG opcode 
This opcode gets translated to 2 ALU instructions with dependency ALU
stall. This change reproduces the FS_OPCODE_PACK_HALF_2x16_SPLIT
values which is another opcode that generates 2 instructions.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446>
 2024-05-31 20:22:27 +00:00
Lionel Landwerlin
ac03cefb28 brw: limit dependencies on SR register 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446>
 2024-05-31 20:22:27 +00:00
Lionel Landwerlin
d8b78924c5 brw: use a single virtual opcode to read ARF registers 
In 2c65d90bc8 I forgot to add the new SHADER_OPCODE_READ_MASK_REG
opcode to the list of barrier instruction in the scheduler. Let's just
use a single opcode for all ARF registers that need special
scoreboarding and put the register as source (nicer for the debug
output).

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 2c65d90bc8 ("intel/brw: ensure find_live_channel don't access arch register without sync")
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29446>
 2024-05-31 20:22:27 +00:00
Francisco Jerez
588c725f27 intel/xe2+: Enable native 64-bit integer arithmetic. 
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
 2024-05-31 09:14:01 -07:00
Ian Romanick
7b7e5cf5d4 nir/algebraic: intel/fs: Optimize some patterns before lowering 64-bit integers 
v2: Add some comments explaining some of the nuance of the shift
optimizations. Fix a bug in the shift count calculation of the upper
32-bits. Move the @64 from the variable to the opcode. All suggested
by Jordan.

No shader-db changes on any Intel platform.

fossil-db:

Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Instrs: 154507026 -> 154506576 (-0.00%)
Cycle count: 17436298868 -> 17436295016 (-0.00%)
Max live registers: 32635309 -> 32635297 (-0.00%)

Totals from 42 (0.01% of 632575) affected shaders:
Instrs: 5616 -> 5166 (-8.01%)
Cycle count: 133680 -> 129828 (-2.88%)
Max live registers: 1158 -> 1146 (-1.04%)

No fossil-db changes on any other Intel platform.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
 2024-05-31 09:13:23 -07:00
Ian Romanick
4834df82e2 nir/algebraic: More patterns to generate iadd3 
I noticed some shaders with patterns similar to these while working on
cooperative matrix lowering.

Meteor Lake and DG2 are the only platforms that support iadd3, so there
were no shader-db or fossil-db changes on any other platforms.

shader-db:

Meteor Lake and DG2 had similar results. (Meteor Lake shown)
total instructions in shared programs: 19869445 -> 19868343 (<.01%)
instructions in affected programs: 419426 -> 418324 (-0.26%)
helped: 913 / HURT: 2

total cycles in shared programs: 936010029 -> 935909811 (-0.01%)
cycles in affected programs: 31746523 -> 31646305 (-0.32%)
helped: 495 / HURT: 356

LOST:   10
GAINED: 12

fossil-db:

Meteor Lake and DG2 had similar results. (Meteor Lake shown)
Totals:
Instrs: 154514596 -> 154505466 (-0.01%); split: -0.01%, +0.00%
Cycle count: 17540226067 -> 17436266198 (-0.59%); split: -0.63%, +0.04%
Spill count: 146887 -> 146886 (-0.00%)
Fill count: 272499 -> 272489 (-0.00%); split: -0.01%, +0.00%
Max live registers: 32634290 -> 32634739 (+0.00%); split: -0.00%, +0.00%
Max dispatch width: 5550128 -> 5550368 (+0.00%)

Totals from 4401 (0.70% of 632560) affected shaders:
Instrs: 3095239 -> 3086109 (-0.29%); split: -0.30%, +0.00%
Cycle count: 7327352564 -> 7223392695 (-1.42%); split: -1.51%, +0.10%
Spill count: 28105 -> 28104 (-0.00%)
Fill count: 45830 -> 45820 (-0.02%); split: -0.04%, +0.02%
Max live registers: 264376 -> 264825 (+0.17%); split: -0.05%, +0.22%
Max dispatch width: 43768 -> 44008 (+0.55%)

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
 2024-05-31 09:13:23 -07:00
Ian Romanick
f1b941aaec nir/search: Refactor is_16_bits 
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Suggested-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
 2024-05-31 09:13:23 -07:00
Ian Romanick
6e53be2a0a nir/search: Fix is_16_bits for vectors 
Require that all elements of a vector be representable as either
int16_t or uint16_t.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Fixes: 7ef45e661f ("intel/fs: Add constant propagation for ADD3")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
 2024-05-31 09:13:23 -07:00
Ian Romanick
22095c60bc nir/algebraic: Add nir_lower_int64_options::nir_lower_iadd3_64 
This allows us to not generate 64-bit iadd3 on Intel but continue
generating it for NVIDIA.

No shader-db or fossil-db changes.

v2: Add nir_lower_iadd3_64 flag so we can continue to generate 64-bit
iadd3 on NVIDIA platforms.

v3: s/bit_size == 64/s == 64/. This cut-and-paste bug prevented any of
the optimizations from ever occuring.

Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29148>
 2024-05-31 09:13:23 -07:00
David Heidelberg
fdc483df25 ci/etnaviv: remove duplicated line from skips 
Fixes: fb1068c668 ("ci/etnaviv: skip Vulkan tests on GC2000")
Signed-off-by: David Heidelberg <david.heidelberg@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29503>
 2024-05-31 07:36:59 -07:00
Karol Herbst
6f713a764f rusticl/event: fix deadlock when calling clGetEventProfilingInfo inside callbacks 
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/11243
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29483>
 2024-05-31 12:52:52 +00:00