Commit Graph

60806 Commits

Author SHA1 Message Date
Ian Romanick
bed51a4858 r200: Enable GL_EXT_framebuffer_blit
The dd_function_table::BlitFramebuffer is already initialized to
_mesa_meta_BlitFramebuffer, so it should just work.

Tested on a FireGL 8800 (OpenGL renderer string: Mesa DRI R200 (R200
5148) TCL DRI).

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-27 14:21:43 -07:00
Ian Romanick
33214679bb radeon / r200: Pass the API into _mesa_initialize_context
Otherwise an application that requested an OpenGL ES 1.x context would
actually get a desktop OpenGL context.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Cc: "9.1 9.2 10.0" <mesa-stable@lists.freedesktop.org>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-27 14:21:43 -07:00
Ian Romanick
af0b34783e mesa: Validate internalFormat with target in glTexStorage paths
Fixes the glTexStorage3D failure in
ext_packed_depth_stencil-depth-stencil-texture and
oes_packed_depth_stencil-depth-stencil-texture_gles2.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-27 14:21:43 -07:00
Ian Romanick
421b5958eb mesa: Refactor internalFormat / target checks to a separate function
We need almost identical code in the glTexStorage path.

v2: Fix typo in a comment noticed by Topi.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-27 14:21:42 -07:00
Ian Romanick
88db6ad7db mesa: Generate the correct error for a depth format with a 3D texture
All versions of the OpenGL spec are quite clear that
GL_INVALID_OPERATION should be generated.  I added a quotation from the
3.3 core profile spec.

Fixes the glTexImage3D subcases of
ext_packed_depth_stencil-depth-stencil-texture and
oes_packed_depth_stencil-depth-stencil-texture_gles2.  The same subtests
of oes_packed_depth_stencil-depth-stencil-texture_gles1 fail, but they
fail with a different wrong error code.

Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
2014-01-27 14:21:42 -07:00
Matt Turner
3f3aafbfee glx: Update glxext.h to revision 24777.
It readds the GLXContextID typedef, but under #ifndef GLX_VERSION_1_3
and glx.h already defines GLX_VERSION_1_3.

Bugzilla: https://cvs.khronos.org/bugzilla/show_bug.cgi?id=11454
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2014-01-27 09:57:12 -08:00
Emil Velikov
a6031a82f9 loader: Add missing \n on message printing
Cover both loader and glx/dri_glx
Drop \n from the default loader logger

Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Eric Anholt <eric@anholt.net>
2014-01-27 09:37:29 -08:00
Eric Anholt
867d7c0e10 dri: Reuse dri_message to implement our other message handlers.
Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2014-01-27 09:37:29 -08:00
Eric Anholt
4a8da40fc0 dri: Fix the logger error message handling.
Since the loader changes, there has been a compiler warning that the
prototype didn't match.  It turns out that if a loader error message was
ever thrown, you'd segfault because of trying to use the warning level as
a format string.

Reviewed-by: Keith Packard <keithp@keithp.com>
Tested-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2014-01-27 09:37:29 -08:00
Eric Anholt
7bd95ec437 dri2: Trust our own driver name lookup over the server's.
This allows Mesa to choose to rename driver .sos (or split drivers),
without needing a flag day with the corresponding 2D driver.

v2: Undo the loader-only-for-dri3 change.

Reviewed-by: Keith Packard <keithp@keithp.com> [v1]
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net> [v1]
2014-01-27 09:37:10 -08:00
Eric Anholt
be7a6976a8 dri2: Open the fd before loading the driver.
I want to stop trusting the server for the driver name, and instead decide
on our own based on the fd, so I needed this code motion.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2014-01-27 09:36:24 -08:00
Eric Anholt
378e7ad26f dri3: Fix two little memory leaks.
Noticed when valgrinding an unrelated bug.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
2014-01-27 09:36:24 -08:00
Eric Anholt
4556c73470 loader: Use dlsym to get our udev symbols instead of explicit linking.
Steam links against libudev.so.0, while we're linking against
libudev.so.1.  The result is that the symbol names (which are the same in
the two libraries) end up conflicting, and some of the usage of .so.1
calls the .so.0 bits, which have different internal structures, and
segfaults happen.

By using a dlopen() with RTLD_LOCAL, we can explicitly look for the
symbols we want, while they get the symbols they want.

Reviewed-by: Keith Packard <keithp@keithp.com>
Reviewed-by: Kristian Høgsberg <krh@bitplanet.net>
Tested-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
2014-01-27 09:36:24 -08:00
Tom Stellard
d51dbe048a r600g/compute: Emit DEALLOC_STATE on cayman after dispatching a compute shader.
This is necessary to prevent the next SURFACE_SYNC packet from
hanging the GPU.

https://bugs.freedesktop.org/show_bug.cgi?id=73418

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

CC: "9.2" "10.0" <mesa-stable@lists.freedesktop.org>
2014-01-27 11:09:15 -05:00
Ilia Mirkin
3518606c14 docs: sync up nv50/nvc0 status on GL4.x extensions
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
59e334194b docs: update GL3.txt, relnotes to reflect current nv50/nvc0 status
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
839bd3cff7 nv50, nvc0: update reported glsl version to 330
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Christoph Bumiller
3efed4cd05 mesa/st: expose ARB_texture_rgb10_a2ui if R10G10B10A2_UINT is supported v2
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-27 16:40:43 +01:00
Christoph Bumiller
c7b14ba23f nv50: add more RGB10A2 formats 2014-01-27 16:40:43 +01:00
Christoph Bumiller
f3bd2bc7b2 st/mesa: fix GS varyings for PIPE_CAP_TGSI_TEXCOORD 2014-01-27 16:40:43 +01:00
Ilia Mirkin
dc8da4c29b nv50: enable seamless cube maps on all hw
Some of the hardware support is missing. The NVIDIA-provided driver,
which claims seamless cube map support fails the relevant tests as well.
As this is the last extension before we can have OpenGL 3.2, doing this
allows us to expose geometry shaders without doing the additional
work involved in supporting ARB_geometry_shader4.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
b9b7cfbabf nv50: report glsl 1.50 now that gp tests pass
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
3bd40073b9 nv50: add support for texelFetch'ing MS textures, ARB_texture_multisample
Creates two areas in the AUX constbuf:
 - Sample offsets for MS textures
 - Per-texture MS settings

When executing a texelFetch with a MS sampler, looks up that texture's
settings and adjusts the parameters given to the texfetch instruction.

With this change, all the ARB_texture_multisample piglits pass, so turn
on PIPE_CAP_TEXTURE_MULTISAMPLE.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
a6cf950ba2 nv50: copy nvc0's get_sample_position implementation
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
b87f5abd21 nv50: add comments about CB_AUX contents
Updates a few inconsistencies as well, like the size of the buffer,
location of the runout, etc.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
250e7c835e nvc0: don't forget to also clear additional layers
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
e3247355cc nv50: don't forget to also clear additional layers
Fixes most of the tests/spec/gl-3.2/layered-rendering/* piglits.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
d98b85b507 nv50: allocate an extra code bo to avoid dmesg spam
Each code BO is a heap that allocates at the end first, and so GPs are
allocated at the very end of the allocated space. When executing, we see
PAGE_NOT_PRESENT errors for the next page. Just over-allocate to make
sure that there's something there.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:43 +01:00
Ilia Mirkin
58589f6c6d nv50: GP_REG_ALLOC_RESULT must be positive
Set max_out to 1 when there are no outputs.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
006095b38a nv50: VP_RESULT_MAP_SIZE has to be positive
Make sure that we never try to use a 0-sized map. This can happen when
using a gp, so add a dummy mapping when computing vp_gp_mapping in that
case.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
c4adbd5a57 nv50: enable primitive id generation when it is an FP input without GP
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
70a07ac352 nv50: handle gl_Layer writes in GP
Marks gl_Layer as only having one component, and makes sure to keep
track of where it is and emit it in the output map, since it is not an
input to the FP.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
7c624148a6 nv50: properly set the PRIMITIVE_ID enable flag when it is a gp input.
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
6f3219a8f3 nv50/ir: add support for gl_PrimitiveIDIn
Note that the primitive id is stored in a[0x18], while usually the
geometry instructions are of the form a[$a1 + 0x4] which gets mapped to
p[] space. We need to avoid the change from a[] to p[] here, so it's
keyed on whether the access is indirect or not.

Note that there's also a use-case for accessing e.g. a[$r1], however
that's not supported for now. (Could be added by checking the register
file of the indirect parameter.)

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
f77069419a nv50/ir: fix support for shader input + immediate in gp
This only works for up to $a3, hopefully we won't go that high.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
45b7f1701e nv50/ir: disallow shader input + cbuf in same instruction in gp
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
42dc414cc6 nv50/ir: disallow predicates on emit/restart ops 2014-01-27 16:40:42 +01:00
Ilia Mirkin
20929963d3 nv50: allow vert_count to be >255
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Bryan Cain
02b317a0d6 nv50: add support for geometry shaders
Layer output probably doesn't work yet, but other than that everything seems
to be working.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: fix up minor bugs, code formatting]
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Bryan Cain
b3f82e1a63 nv50/ir: delay calculation of indirect addresses
Instead of emitting an SHL 4 io an address register on the TGSI ARL and UARL
instructions, emit the shift when the loaded address is actually used.  This
is necessary because input vertex and attribute indices in geometry shaders on
nv50 need to be shifted left by 2 instead of 4.

Signed-off-by: Bryan Cain <bryancain3@gmail.com>
[calim: various updates to the indirect address logic]
Signed-off-by: Christoph Bumiller <e0425955@student.tuwien.ac.at>
[imirkin: remove OP_MAD change that calim made, add OP_RESTART handling
          same as OP_EMIT for code flow analysis]
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Christoph Bumiller
67250acbab nv50/ir: fix PFETCH and add RDSV to get VSTRIDE for GPs 2014-01-27 16:40:42 +01:00
Ilia Mirkin
2689b59cab nv50/ir: txg not available on nvaa/nvac
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
e05de038bf nv50, nvc0: only clear out the buffers that we were asked to clear
Fixes fbo-drawbuffers-none glClearBuffer piglit test.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
c75eeab609 nv50, nvc0: clear out RT on a null cbuf
This is needed since commit 9baa45f78b (st/mesa: bind NULL colorbuffers
as specified by glDrawBuffers).

This implementation is highly based on a larger commit by
Christoph Bumiller <e0425955@student.tuwien.ac.at> in his gallium-nine
branch.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
3f264e16e2 nv50: don't leak heap on tls alloc failure
Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
18d97a8df7 nouveau/codegen: set dType to S32 for OP_NEG U32
It doesn't make sense to do an OP_NEG from U32 to U32. This was
manifested on nv50 in glsl-fs-atan-3 which was generating a

UMAD TEMP[0].x, TEMP[0].xxxx, -TEMP[5].xxxx, TEMP[0].xxxx

instruction. (For some reason, nvc0 causes a different shader to be
generated.) This led to a

cvt neg u32 $r1 u32 $r1

Which did not yield the desired result. This changes the final output to

cvt neg s32 $r1 u32 $r1

which produces the desired output and the piglit tests passes. My
assumption is that this is also what we want on nvc0, but could not test
as there was no suitable shader that generated the problem instruction.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
45b64e52f4 util/u_vbuf: correct map offset calculation for crazy offsets
When the min_index is very large (or very negative), the multipliation
can overflow 32 bits and result in an incorrect map pointer
modification.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
2014-01-27 16:40:42 +01:00
Ilia Mirkin
3de97ce920 translate: deal with size overflows by casting to ptrdiff_t
This was discovered as a result of the draw-elements-base-vertex-neg
piglit test, which passes very negative offsets in, followed up by large
indices. The nouveau code correctly adjusts the pointer, but the
translate code needs to do the proper inverse correction. Similarly fix
up the SSE code to do a 64-bit multiply to compute the proper offset.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>
Reviewed-by: Brian Paul <brianp@vmware.com>
2014-01-27 16:40:42 +01:00
Emil Velikov
4dd445f1cf gallium/rtasm: handle mmap failures appropriately
For a variety of reasons mmap (selinux and pax to name
a few) and can fail and with current code. This will
result in a crash in the driver, if not worse.

This has been the case since the inception of the
gallium copy of rtasm.

Cc: 9.1 9.2 10.0 <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=73473
Signed-off-by: Emil Velikov <emil.l.velikov@gmail.com>
Reviewed-by: Jakob Bornecrantz <jakob@vmware.com>
2014-01-27 13:24:51 +00:00
Alexander von Gluck IV
e5e4120723 haiku: change atomic int to non-volatile
* Our atomic calls changed recently and no longer want atomic int
  pointers to be volatile
* Spellcheck
2014-01-26 18:56:05 -06:00