10 Commits

Author	SHA1	Message	Date
Chia-I Wu	bd8090a5af	ilo: update headers from i965 ... Mainly for MI_LOAD_REGISTER_IMM and BCS_SWCTRL.	2013-05-21 11:47:19 +08:00
Chia-I Wu	6b894e6900	ilo: add support for stencil resources on GEN7+ ... For allocations, we need to support stencil-only and separate stencil resources. For mapping, we need to support software tiling and packing/unpacking for separate stencil resources.	2013-05-16 18:20:17 +08:00
Courtney Goeltzenleuchter	daa90f91ff	ilo: Add support for HW primitive restart. ... Now tells Gallium that ilo supports primitive restart. Updated ilo_draw_vbo to be able to check that the indexed primitive being rendered can actually be supported in HW. If not, will break up into individual prims similar to what Mesa does. [olv: a minor fix after rebasing and formatting]	2013-05-10 00:06:14 +08:00
Chia-I Wu	22c5e048bd	ilo: fix PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS ... On GEN7+, is->dev.has_gen7_sol_reset is required.	2013-05-01 17:41:39 +08:00
Chia-I Wu	16f81fcf1e	ilo: enable SO support on GEN7	2013-05-01 17:36:44 +08:00
Chia-I Wu	ce188bb252	ilo: move device limits to ilo_dev_info or to GPEs ... It seems a bit weird to have device limits in a context.	2013-05-01 11:23:11 +08:00
Chia-I Wu	bb1f635dcc	ilo: add ilo_dev_info shared by the screen and contexts ... The struct is used to describe the device information, such as PCI ID, GEN, GT, and etc.	2013-05-01 11:20:41 +08:00
Chia-I Wu	babb2b5c50	ilo: hook up pipe_screen param and fence functions	2013-04-26 16:16:42 +08:00
Chia-I Wu	e74d67738d	ilo: add debug flags settable through ILO_DEBUG	2013-04-26 16:16:42 +08:00
Chia-I Wu	63b5720105	ilo: new pipe driver for Intel GEN6+ ... This commit adds some boilerplate code. The header files found under include/ are copied from i965.	2013-04-26 16:16:41 +08:00