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Kenneth Graunke
bb4f05005e intel/brw: Print blocks in brw_print_instructions_to_file() 
Useful when examining the control flow graph.  For some reason,
we printed this for the final assembly but not the IR.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530>
 2024-08-22 22:54:45 +00:00
Kenneth Graunke
2d73e42333 intel/brw: Fix OOB reads when printing instructions post-reg-alloc 
Post-register allocation, but before brw_fs_lower_vgrfs_to_fixed_grfs,
we have registers with the VGRF file but they are actually fixed GRFs.

brw_print_instructions_to_file() was seeing VGRFs and trying to access
their size, but using bogus register numbers that could be out-of-bound.

Detect when we're post-RA and avoid doing this.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30530>
 2024-08-22 22:54:45 +00:00
antonino
9f5af68995 mesa/main: expose EXT_multi_draw_indirect 
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino
582eb2439c panfrost: advertise PIPE_CAP_MULTI_DRAW_INDIRECT 
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
Louis-Francis Ratté-Boulianne
f390835074 panfrost: use special DrawID register on CSF-based GPUs 
It allows easier support for multi indirect draws by updating the
draw ID value in each iteration of the loop.

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
Louis-Francis Ratté-Boulianne
ce76caf3ee pan/bi: implement nir_intrinsic_load_draw_id 
Only valid on >= 9

Signed-off-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino
676afca468 panfrost: implement multi draw indirect for CSF-based GPUs 
Add a CSF loop to allow for multiple indirect draws in one call.
Same limitation applies than for single indirect draw, the call
will get emulated if transform feedback or a query is enabled.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino
7c1fe4bdbe pan/cs: add helpers to generate csf loop 
Add support for loops where we continually check whether a
condition is met. Also add a `cs_while` pseudo-instruction to more
easily use that feature.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:22 +00:00
antonino
50d2396b7e pan/cs: add helpers to emit contiguous csf code blocks 
Add support for block, a monolithic sequence of instruction that
must live in a virtually contiguous portion of code, and label, a
reference to a specific position in a block.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
antonino
8b8de5ad9d panfrost: implement indirect draw for CSF-based GPUs 
Implement indirect draw by reading the indirect buffer info in CSF
and triggering the IDVS operation just like for a normal direct
draw. If transform feedback or a query is enabled, we still emulate
the indirect draw on the CPU to properly update the XFB buffer
offset and primitives statistics.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
antonino
3b871856d1 panfrost: refactor draw logic to support native draw indirect 
Split the draw logic into multiple methods depending on whether
the draw is single direct, multiple direct or indirect. Indirect
draws are emulated for now by reading back the indirect buffer info,
but we can implement optimized version later for JM and CSF.

Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
antonino
d8b6a59896 panfrost: rename PAN_GPU_INDIRECTS 
Signed-off-by: Antonino Maniscalco <antonino.maniscalco@collabora.com>
Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com>
Reviewed-by: Louis-Francis Ratté-Boulianne <lfrb@collabora.com>
Reviewed-by: Mary Guillemard <mary.guillemard@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30583>
 2024-08-22 21:13:21 +00:00
Eric Engestrom
84d2401de3 ci: don't run hardware tests if the toml files don't pass validation 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30442>
 2024-08-22 20:25:32 +00:00
Eric Engestrom
1ba84bc5ca ci: add check for misleading indentation in ci toml files 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30442>
 2024-08-22 20:25:32 +00:00
Lionel Landwerlin
d9406658ed brw: remove unused prog_data field 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:40 +00:00
Lionel Landwerlin
cf986dd589 nir: remove unused intel intrinsics 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:40 +00:00
Lionel Landwerlin
3769b58272 anv: move lowering of descriptor intrinsics to apply_layout 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:40 +00:00
Lionel Landwerlin
45117c0ed5 anv: simplify loading driver internal constants 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:39 +00:00
Lionel Landwerlin
7a55a930f6 anv: reuse common pipeline state for compute push allocations 
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30713>
 2024-08-22 19:44:39 +00:00
Denis
afb7b17fdd freedreno: Enable A505 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23630>
 2024-08-22 19:11:52 +00:00
Robert Mader
70cdff1f23 perfetto: Add Panfrost data sources to system.cfg 
Just like for msm and i915, so it works out-of-the-box.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28363>
 2024-08-22 18:33:45 +00:00
Eric Engestrom
5a38361ba9 nvk/ci: document CTS bug 
Thanks to @marysaka for identifying and reporting the bug:
https://gitlab.freedesktop.org/mesa/mesa/-/issues/11736#note_2532965

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30793>
 2024-08-22 18:20:55 +00:00
Connor Abbott
812c8f6abe tu: Treat partially-bound depth/stencil attachments as passthrough 
Make sure to preserve the depth or stencil components of D24S8 using the
fixed codepath just added. While we're here, fix the detection of
whether an attachment is bound.

Fixes: cb0f414b ("tu: Add support for suspending and resuming renderpasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26154>
 2024-08-22 17:43:58 +00:00
Connor Abbott
5377219ca0 tu: Fix passthrough D24S8 attachments 
We need to make sure that we don't trash a passthrough depth/stencil
aspect if we need to store the whole attachment by loading it
beforehand.

Fixes: cb0f414b ("tu: Add support for suspending and resuming renderpasses")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26154>
 2024-08-22 17:43:58 +00:00
Eric Engestrom
d7f7aede15 intel/ci: don't trigger anv-jsl-full & anv-tgl-full on GL changes 
These are pure VK-CTS jobs, they don't run any GL tests.

It doesn't matter right now because these two jobs are disabled, but
when they get re-enabled, we'll want this to have been fixed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30677>
 2024-08-22 16:24:24 +00:00
Daniel Stone
2a20cdfb31 ci/run_n_monitor: Add --dry-run argument 
This will just print out the target jobs and their dependencies, then
exit.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:19 +00:00
Daniel Stone
ad5f4d0270 ci/run_n_monitor: Remove --force-manual 
Now that we can exclude by stages instead, we don't need --force-manual.
Having mandatory arguments which also do the wrong thing is not great.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:19 +00:00
Daniel Stone
99cd56a684 ci/run_n_monitor: Add --exclude-stage filtering 
Add an argument to ci_run_n_monitor specifying certain stages to be
excluded from consideration, defaulting to the one with post-merge and
performance jobs. This allows, e.g., to run all Panfrost pre-merge jobs:
./ci_run_n_monitor.py --target 'panfrost.*'

or to run all Freedreno pre-merge jobs:
./ci_run_n_monitor.py --target '.*' --include-stage freedreno

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:19 +00:00
Daniel Stone
3ffe733214 ci/run_n_monitor: Add --include-stage argument 
Add basic filtering by stages, starting with stage inclusion.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
4e56472da2 ci/panfrost: Move manual/nightly jobs to postmerge stage 
Create a new stage called arm-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
ca8f6b66a8 ci/etnaviv: Move manual/nightly jobs to postmerge stage 
Create a new stage called etnaviv-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
b70ad23bb1 ci/nouveau: Move manual/nightly jobs to postmerge stage 
Create a new stage called nouveau-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
337e00aa2d ci/llvmpipe: Move manual/nightly jobs to postmerge stage 
Create a new stage called software-backends-postmerge and move the full
and manual jobs for both llvmpipe and lavapipe over there, to avoid
entanglement with the pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
4752ce7186 ci/zink: Move manual/nightly jobs to postmerge stage 
Create a new stage called layered-backends-postmerge and move the full
and manual jobs over there, to avoid entanglement with the pre-merge
jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
25c70888a5 ci/broadcom: Move manual/nightly jobs to postmerge stage 
Create new stages called broadcom-postmerge and freedreno-postmerge, and
move the full and manual jobs over there, to avoid entanglement with the
pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
cc507536db ci/intel: Move manual/nightly jobs to postmerge stage 
Create a new stage called intel-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
4bcd57b0b5 ci/amd: Move manual/nightly jobs to postmerge stage 
Create a new stage called amd-postmerge and move the full and manual
jobs over there, to avoid entanglement with the pre-merge jobs.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Daniel Stone
f1aab081b5 ci: Create new 'performance' stage 
Move all jobs doing performance testing to a separate stage.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30784>
 2024-08-22 15:35:18 +00:00
Job Noorman
97d049504c ir3: use physical cfg in helper_sched 
We used the logical cfg in helper_sched under the assumption that (eq)
only kills active helpers. This could lead to something like this:

br p0.x, else
sam
(eq)nop
jump end
else:
sam
end:

It turns out this is not correct: (eq) kills *all* helpers so the
snippet above could produce wrong results.

To fix this, simply switch from using the logical cfg in helper_sched to
using the physical cfg.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Job Noorman
1bbc36c5d2 ir3: recalculate reconvergence after opt_jump 
opt_jump destroys the physical cfg but it turns out we need it
afterwards in helper_sched. Keeping it correctly up-to-date during
opt_jump turned out to be tricky and complex. Simply recalculate it
afterwards to keep things simple.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Job Noorman
c67381538d ir3: fix reconvergence of blocks with multiple divergent predecessors 
When calling ir3_calc_reconvergence after opt_jump, it may happen that
there are multiple divergent branches to the same block. This was
handled incorrectly since first_divergent_pred was unconditionally
overwritten for successors of divergent branches. This patch fixes this
by only making sure only the earliest divergent predecessor is used.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Job Noorman
d9977a6176 ir3: fix adding physical edges multiple times 
After opt_jump, we might end up with weird control flow likes this:

block0: br block2
[more blocks]
block1: br block3
block2: ...
block3: ...

Since block2 is a logical successor of block1 (due to the fall through),
a physical edge will be added. However, another one will be added
because the branch to block3 crosses block2 (which is a reconvergence
point due to the branch from block0). This currently results in an
assert. This commit fixes this by ignoring successors of the start block
of edges that cross reconvergence points.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Connor Abbott
f432eb691e ir3: Move reconvergence backedge handling 
Instead of handling backedges after a physical edge is added that extends
the divergence range, handle it at the beginning of the loop. This
handles the TODO by making sure that we also check for backedges after a
block is added to the worklist at the beginning due to a divergent
branch. For example, this fixes cases where opt_jump optimizes
"if (foo) { break; }" to remove the break block and we have a divergent
branch across the loop backedge.

While we're here, also fix an off-by-one that meant we wouldn't handle
backedges that jumped to the immediate previous block (which is again
possible after opt_jump) or the same block.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Job Noorman
aee097ed21 ir3: fix reconvergence points for blocks with two terminators 
Blocks with two terminators have branches to both successors (instead of
a fall through to one) and hence need to mark both successors as
reconvergence points.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Job Noorman
fba921bf49 ir3: preserve block divergence info in ir3_lower_subgroups 
We will need this to recalculate reconvergence after opt_jump.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:14 +00:00
Job Noorman
053612b7cf ir3: remove unnecessary reconvergence point in scan_clusters lowering 
The body of the while loop does not need a reconvergence point since it
only has an incoming backwards branch.

Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:13 +00:00
Job Noorman
a13394ad91 ir3: print block divergence info 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:13 +00:00
Job Noorman
ec19a354dc ir3: print predicate inversion for branches 
Signed-off-by: Job Noorman <jnoorman@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29409>
 2024-08-22 14:58:13 +00:00
Mike Blumenkrantz
13066905d3 egl/android: call dri2_display_create() like every other driver 
Acked-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/30773>
 2024-08-22 14:22:41 +00:00
Rhys Perry
7b92e11e16 aco: forget valu delays after certain s_waitcnt_depctr/LDSDIR 
fossil-db (navi31):
Totals from 55242 (69.58% of 79395) affected shaders:
Instrs: 40507666 -> 40138006 (-0.91%); split: -0.91%, +0.00%
CodeSize: 212516104 -> 211025880 (-0.70%); split: -0.70%, +0.00%
Latency: 281643258 -> 281628053 (-0.01%); split: -0.01%, +0.00%
InvThroughput: 46370668 -> 46369637 (-0.00%); split: -0.00%, +0.00%

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Georg Lehmann <dadschoorse@gmail.com>
Acked-by: Daniel Schürmann <daniel@schuermann.dev>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23337>
 2024-08-22 13:57:01 +00:00