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Author SHA1 Message Date
Caio Marcelo de Oliveira Filho
baefdceeaf spirv: Implement SPV_EXT_shader_atomic_float16_add 
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11981>
 2021-07-21 20:15:21 +00:00
Jordan Justen
8c29891fa4 intel/compiler: Remove cube array size lowering in compiler backend 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>
 2021-07-21 11:34:49 -07:00
Jordan Justen
e2a30ebf44 intel/compiler: Lower cube image sizes using nir_lower_image() 
Reworks:
 * Re-merge early/late passes using Jason's nir image deref patches
 * Create and use a common nir_lower_image() pass. (s-b Jason)
 * Remove cube array size handling in image load/store lowering

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>
 2021-07-21 11:34:49 -07:00
Jordan Justen
b5514a2236 intel/compiler: Rename brw_nir_lower_image_load_store to brw_nir_lower_storage_image 
Reworks:
 * Add crocus

Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>
 2021-07-21 11:02:15 -07:00
Jordan Justen
6898549d56 nir: Add nir_lower_image() to lower cube image sizes 
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/9466>
 2021-07-21 11:02:15 -07:00
Felix DeGrood
27534a49cf iris: add tile cache flush to iris_copy_region 
Add tile cache flush on iris_copy_region(). Temp workaround
until more robust tracking system implemented.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5029
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11935>
 2021-07-21 17:28:41 +00:00
Jason Ekstrand
b0fba89cf6 nir/lower_subgroups: Handle down-casts in uint_to_ballot_type 
This is required for Zink where the API ballot type is a uint64_t and
the "hardware" ballot type is uvec4.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11989>
 2021-07-21 16:41:56 +00:00
Daniel Stone
7b8bb81e82 CI: Disable LAVA devices 
We've had a physical machine death, and the restore/transfer is achingly
slow at the moment. Some of the devices are still fine, but
conservatively just kill the lot until it's all recovered.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11997>
 2021-07-21 17:26:43 +01:00
Timothy Arceri
9f3fde6f36 intel/compiler: Use GCM in nir_optimize 
There is still some work to do before we can enable GVN.

In these shader-db results, Skylake and older platforms used i965 while
newer platforms used Iris.  I believe this accounts for the difference
in "sends."  The shaders helped for sends are all Synmark shaders.

On Sandybridge, the shaders helped for sends were the same ones hurt for
spills and fills.  These are also all Synmark shaders.

Tiger Lake and Ice Lake had similar results. (Ice Lake shown)
total instructions in shared programs: 19868594 -> 19868452 (<.01%)
instructions in affected programs: 6607 -> 6465 (-2.15%)
helped: 12
HURT: 1
helped stats (abs) min: 12 max: 12 x̄: 12.00 x̃: 12
helped stats (rel) min: 1.94% max: 2.62% x̄: 2.38% x̃: 2.58%
HURT stats (abs)   min: 2 max: 2 x̄: 2.00 x̃: 2
HURT stats (rel)   min: 0.45% max: 0.45% x̄: 0.45% x̃: 0.45%
95% mean confidence interval for instructions value: -13.27 -8.58
95% mean confidence interval for instructions %-change: -2.67% -1.65%
Instructions are helped.

total cycles in shared programs: 962404540 -> 962008224 (-0.04%)
cycles in affected programs: 961274 -> 564958 (-41.23%)
helped: 23
HURT: 1
helped stats (abs) min: 10 max: 32536 x̄: 17438.96 x̃: 23658
helped stats (rel) min: 0.02% max: 80.04% x̄: 42.05% x̃: 51.58%
HURT stats (abs)   min: 4780 max: 4780 x̄: 4780.00 x̃: 4780
HURT stats (rel)   min: 3.26% max: 3.26% x̄: 3.26% x̃: 3.26%
95% mean confidence interval for cycles value: -22989.90 -10036.43
95% mean confidence interval for cycles %-change: -55.01% -25.32%
Cycles are helped.

Skylake and Broadwell had simliar results. (Skylake shown)
total instructions in shared programs: 17996652 -> 17996154 (<.01%)
instructions in affected programs: 96622 -> 96124 (-0.52%)
helped: 85
HURT: 0
helped stats (abs) min: 1 max: 12 x̄: 5.86 x̃: 5
helped stats (rel) min: 0.39% max: 2.65% x̄: 0.68% x̃: 0.39%
95% mean confidence interval for instructions value: -6.42 -5.30
95% mean confidence interval for instructions %-change: -0.84% -0.52%
Instructions are helped.

total cycles in shared programs: 939899189 -> 939289732 (-0.06%)
cycles in affected programs: 3719430 -> 3109973 (-16.39%)
helped: 60
HURT: 39
helped stats (abs) min: 18 max: 32444 x̄: 10437.30 x̃: 6940
helped stats (rel) min: 0.08% max: 80.40% x̄: 23.99% x̃: 12.07%
HURT stats (abs)   min: 10 max: 4970 x̄: 430.28 x̃: 323
HURT stats (rel)   min: 0.05% max: 3.41% x̄: 1.55% x̃: 1.60%
95% mean confidence interval for cycles value: -8095.51 -4216.75
95% mean confidence interval for cycles %-change: -18.65% -9.21%
Cycles are helped.

total sends in shared programs: 1026997 -> 1026927 (<.01%)
sends in affected programs: 6090 -> 6020 (-1.15%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.15% max: 1.15% x̄: 1.15% x̃: 1.15%
95% mean confidence interval for sends value: -1.00 -1.00
95% mean confidence interval for sends %-change: -1.15% -1.15%
Sends are helped.

Haswell and Ivy Bridge had similar results. (Haswell shown)
total instructions in shared programs: 16040891 -> 16040252 (<.01%)
instructions in affected programs: 109132 -> 108493 (-0.59%)
helped: 87
HURT: 0
helped stats (abs) min: 1 max: 12 x̄: 7.34 x̃: 7
helped stats (rel) min: 0.05% max: 2.61% x̄: 0.75% x̃: 0.51%
95% mean confidence interval for instructions value: -7.84 -6.85
95% mean confidence interval for instructions %-change: -0.90% -0.61%
Instructions are helped.

total cycles in shared programs: 968579567 -> 967867117 (-0.07%)
cycles in affected programs: 30688439 -> 29975989 (-2.32%)
helped: 241
HURT: 62
helped stats (abs) min: 4 max: 31929 x̄: 3901.22 x̃: 2282
helped stats (rel) min: 0.04% max: 79.63% x̄: 12.70% x̃: 4.44%
HURT stats (abs)   min: 4 max: 8230 x̄: 3673.27 x̃: 637
HURT stats (rel)   min: 0.01% max: 63.87% x̄: 24.54% x̃: 3.56%
95% mean confidence interval for cycles value: -3100.23 -1602.41
95% mean confidence interval for cycles %-change: -7.94% -2.22%
Cycles are helped.

total sends in shared programs: 935025 -> 934955 (<.01%)
sends in affected programs: 6090 -> 6020 (-1.15%)
helped: 70
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.15% max: 1.15% x̄: 1.15% x̃: 1.15%
95% mean confidence interval for sends value: -1.00 -1.00
95% mean confidence interval for sends %-change: -1.15% -1.15%
Sends are helped.

LOST:   1
GAINED: 0

Sandy Bridge
total instructions in shared programs: 11785330 -> 11786504 (<.01%)
instructions in affected programs: 53462 -> 54636 (2.20%)
helped: 16
HURT: 36
helped stats (abs) min: 1 max: 17 x̄: 10.06 x̃: 9
helped stats (rel) min: 0.47% max: 3.29% x̄: 2.03% x̃: 1.90%
HURT stats (abs)   min: 5 max: 38 x̄: 37.08 x̃: 38
HURT stats (rel)   min: 1.77% max: 2.98% x̄: 2.94% x̃: 2.98%
95% mean confidence interval for instructions value: 16.26 28.90
95% mean confidence interval for instructions %-change: 0.75% 2.08%
Instructions are HURT.

total cycles in shared programs: 498009911 -> 497378300 (-0.13%)
cycles in affected programs: 6848277 -> 6216666 (-9.22%)
helped: 108
HURT: 28
helped stats (abs) min: 4 max: 25394 x̄: 6037.42 x̃: 766
helped stats (rel) min: 0.02% max: 60.58% x̄: 11.60% x̃: 4.83%
HURT stats (abs)   min: 96 max: 6834 x̄: 729.64 x̃: 742
HURT stats (rel)   min: 0.17% max: 16.23% x̄: 1.57% x̃: 1.55%
95% mean confidence interval for cycles value: -5907.99 -3380.40
95% mean confidence interval for cycles %-change: -11.67% -6.11%
Cycles are helped.

total spills in shared programs: 2316 -> 2526 (9.07%)
spills in affected programs: 280 -> 490 (75.00%)
helped: 0
HURT: 35

total fills in shared programs: 1540 -> 1750 (13.64%)
fills in affected programs: 280 -> 490 (75.00%)
helped: 0
HURT: 35

total sends in shared programs: 642985 -> 642950 (<.01%)
sends in affected programs: 3045 -> 3010 (-1.15%)
helped: 35
HURT: 0
helped stats (abs) min: 1 max: 1 x̄: 1.00 x̃: 1
helped stats (rel) min: 1.15% max: 1.15% x̄: 1.15% x̃: 1.15%
95% mean confidence interval for sends value: -1.00 -1.00
95% mean confidence interval for sends %-change: -1.15% -1.15%
Sends are helped.

LOST:   1
GAINED: 0

Iron Lake and GM45 had similar results. (Iron Lake shown)
total cycles in shared programs: 239442382 -> 239429400 (<.01%)
cycles in affected programs: 20816 -> 7834 (-62.37%)
helped: 2
HURT: 0

In Fossil-db, all of the shaders hurt for spill and fills are compute
shaders from Shadow of the Tomb Raider.  Two shaders were helped for
sends, and these are also from SotTR.

All of the shaders helped for loops were from Geekbench5.  These all
went from 3 loops to 2.

Tiger Lake
Instructions in all programs: 160852396 -> 160855303 (+0.0%)
SENDs in all programs: 6878559 -> 6878559 (+0.0%)
Loops in all programs: 38350 -> 38305 (-0.1%)
Cycles in all programs: 7369162339 -> 7344236445 (-0.3%)
Spills in all programs: 193762 -> 193876 (+0.1%)
Fills in all programs: 306417 -> 306600 (+0.1%)

Ice Lake
Instructions in all programs: 144592523 -> 144593946 (+0.0%)
SENDs in all programs: 6930697 -> 6930697 (+0.0%)
Loops in all programs: 38344 -> 38299 (-0.1%)
Cycles in all programs: 8732456458 -> 8707823383 (-0.3%)
Spills in all programs: 216692 -> 216806 (+0.1%)
Fills in all programs: 334089 -> 334272 (+0.1%)

Skylake
Instructions in all programs: 135618746 -> 135619971 (+0.0%)
SENDs in all programs: 6896728 -> 6896724 (-0.0%)
Loops in all programs: 38343 -> 38298 (-0.1%)
Cycles in all programs: 8391957144 -> 8368935657 (-0.3%)
Spills in all programs: 194741 -> 194879 (+0.1%)
Fills in all programs: 301048 -> 301255 (+0.1%)

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>
 2021-07-21 14:24:00 +00:00
Timothy Arceri
c742a99fb6 intel/compiler: call nir_opt_dead_cf() after we have finished all opts 
This will avoid a regression with the following patch.

Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>
 2021-07-21 14:24:00 +00:00
Timothy Arceri
5cc36887ab nir/gcm: be less destructive with instruction order 
This changes the pass to extract pinned instructions and not just unpinned
instructions when rescheduling instructions. This stops pinned instructions
from being bunched together when instructions are reinserted into the blocks
which can result in regressions with regards to cycles and instruction
counts on i965 and register use/Max Waves on AMD hardware.

In order to do this we also throw away the post-order depth-first
search linearization algorithm used to re-insert the instructions, which
itself causes possible regressions when instructions are reinserted into
a less than ideal new order (of which the bunched together pinned
instructions is one example). Instead we simply insert instructions in the
reverse order they were extracted. This will simply place instructions
that were scheduled earlier onto the end of their new block and
instructions that were scheduled later to the start of their new block.
With this everything should remain in order without the need to run
over uses.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>
 2021-07-21 14:24:00 +00:00
Ian Romanick
436668874a nir/gcm: Clear out pass_flags before starting 
With this pass enabled in Intel drivers, running shader-db on
shaders/unity/38.shader_test resulted in

Program received signal SIGSEGV, Segmentation fault.
gcm_schedule_early_src (src=0x555555d45348, void_state=0x7fffffffba40) at ../../SOURCE/master/src/compiler/nir/nir_opt_gcm.c:297
297	   if (info->early_block->index < src_info->early_block->index)
(gdb) print src_info->early_block
$1 = (nir_block *) 0x0

I tracked this down to an early exit from gcm_schedule_early_instr on
the parent instruction because instr->pass_flags was 0x1c.  That
should be an impossible value for this pass, so I inferred that
pass_flags must have dirt left from some previous pass.

Fixes: 8dfe6f672f ("nir/GCM: Use pass_flags instead of bitsets for tracking visited/pinned")

Reviewed-by: Timothy Arceri <tarceri@itsqueeze.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/597>
 2021-07-21 14:24:00 +00:00
Mike Blumenkrantz
3ab74d0ffa nir: add nir_imm_ivec3 builder 
the other ones exist, so why not this one too

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Reviewed-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11983>
 2021-07-21 13:57:14 +00:00
Daniel Schürmann
1d8e9430d2 aco: include <cstddef> in aco_util.h 
It's needed for ptrdiff.

Fixes: 59fdaa1985 ('aco: reorder and cleanup #includes')
Closes: #5076
Reviewed-by: Tony Wasserka <tony.wasserka@gmx.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11947>
 2021-07-21 13:37:00 +00:00
suijingfeng
7c81a9d56f gallivm: fix pass init order on mips64 with llvm 8 
llvm 8 has some missing pass dependencies, fix the mips64 case
as well.

See similiar fix:

[1] f59ff014b1
[2] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/3805

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955>
 2021-07-21 13:14:05 +00:00
suijingfeng
2f07c675b9 pass egl-symbols-check test on mips64el 
Without this patch the egl symbols check test fail on mips platform:

72/87 mesa:egl / egl-symbols-check        FAIL        0.20s (exit status 1)

src/egl/libEGL.so.1.0.0: unknown symbol exported: _fbss
src/egl/libEGL.so.1.0.0: unknown symbol exported: _fdata
src/egl/libEGL.so.1.0.0: unknown symbol exported: _ftext

See Mips Run say thoes special symbols are automatically defined by the
linker to allow programs to discover the start and end of their various
section. They are descended from conventions that grew up in UNIX-like OSs,
and are peculiar to the MIPS environment.

_fbss  :  Start of uninitialized data segment
_fdata :  Start of initialized data segment
_ftext :  Start of text segment

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955>
 2021-07-21 13:14:05 +00:00
suijingfeng
88b234d7a7 gallivm: add basic mips64 support and set mcpu to mips64r5 on ls3a4000 
ls3a4000 and ls2k1000 cpu is mips64r5 compatible with MSA SIMD
 instruction set implemented, while ls3a3000 is mips64r2 compatible only.
 Due to lacking llvm support for loongson CPU, llvm::sys::getHostCPUName().
 return "generic" on all loongson mips CPU.

 So we override the MCPU to mips64r5 if MSA is implemented, feedback to
 mips64r2 for all other ordinaries.

Reviewed-by: Adam Jackson <ajax@redhat.com>
Signed-off-by: suijingfeng <suijingfeng@loongson.cn>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11955>
 2021-07-21 13:14:05 +00:00
Daniel Stone
6455ab6e5a egl/wayland: Allow EGLSurface to outlive wl_egl_window 
According to the EGL spec, it is entirely valid for an EGLSurface to
outlive the native_window it was created from, provided that SwapBuffers
and MakeCurrent return EGL_BAD_NATIVE_WINDOW.

We don't have any facility to error on MakeCurrent, so just make sure we
can bundle on safely through rendering for now, then return
EGL_BAD_NATIVE_WINDOW from SwapBuffers.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2251
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4902
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11979>
 2021-07-21 12:13:25 +00:00
Daniel Stone
0e2464d26b egl/wayland: Error on invalid native window 
We unconditionally require a wl_egl_window to be passed as the native
window type, and do not permit a default window. The spec requires us to
return EGL_BAD_NATIVE_WINDOW when doing this, rather than crashing.

Further, if an EGLSurface has already been created for an existing
native window, we are required to return EGL_BAD_ALLOC.

Signed-off-by: Daniel Stone <daniels@collabora.com>
Reviewed-by: Simon Ser <contact@emersion.fr>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/2251
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/4902
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11979>
 2021-07-21 12:13:25 +00:00
Daniel Schürmann
3870c52159 aco/ra: don't allocate vector space for MIMG NSA operands 
In this case, the MIMG vaddr components are not vector-aligned anymore, anyway.

Totals from 11866 (7.90% of 150170) affected shaders: (GFX10.3)
VGPRs: 733064 -> 728408 (-0.64%); split: -0.66%, +0.02%
CodeSize: 67968356 -> 67968440 (+0.00%); split: -0.02%, +0.02%
MaxWaves: 214022 -> 214014 (-0.00%)
Instrs: 12798200 -> 12797232 (-0.01%); split: -0.02%, +0.01%
Latency: 196427665 -> 196418706 (-0.00%); split: -0.02%, +0.01%
InvThroughput: 37082037 -> 37080799 (-0.00%); split: -0.02%, +0.02%
VClause: 246097 -> 246031 (-0.03%); split: -0.16%, +0.13%
Copies: 494852 -> 493923 (-0.19%); split: -0.52%, +0.34%
Branches: 220323 -> 220294 (-0.01%); split: -0.03%, +0.02%

Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11980>
 2021-07-21 09:38:15 +00:00
Marcin Ślusarz
8250f2ae29 anv: share some code between vkCmdDrawIndirectCount and vkCmdDrawIndexedIndirectCount 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11975>
 2021-07-21 09:23:15 +00:00
Juan A. Suarez Romero
dcfc4bb89a ci/v3dv: update expected results 
Reviewed-by: Jose Maria Casanova Crespo <jmcasanova@igalia.com>
Signed-off-by: Juan A. Suarez Romero <jasuarez@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11970>
 2021-07-21 09:07:52 +00:00
Marcin Ślusarz
b6843d990b intel/tools/aubinator_error_decode: tag hanging instruction 
Signed-off-by: Marcin Ślusarz <marcin.slusarz@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11957>
 2021-07-21 08:20:06 +00:00
Corentin Noël
18fa820506 ci: actually run piglit tests with virgl 
Make sure that the host is using llvmpipe while the guest is using virgl as driver.

Note that the neverball/neverball.trace trace actually regressed in a way that the
foreground is missing.

Fixes: f1b952fa ("ci: Run tests inside Crosvm")

Signed-off-by: Corentin Noël <corentin.noel@collabora.com>
Reviewed-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11986>
 2021-07-21 09:36:10 +02:00
Iago Toral Quiroga
2608ee4031 v3dv: fix I/O lowering for GS 
Fixes 9e7d9a6ef ('v3dv: add support for geometry shaders to pipelines')

Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11977>
 2021-07-21 05:44:31 +00:00
Dave Airlie
8c6196e7e8 crocus/gen4-5: fix ff gs emit on VS vue map change. 
This should fix some texturing problems seen on gen4/5, I reproduced it
with a minecraft.trace file

Fixes: f3630548f1 ("crocus: initial gallium driver for Intel gfx 4-7")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11993>
 2021-07-21 14:56:26 +10:00
Dave Airlie
74245ca037 docs: update anisotropic info for softpipe/llvmpipe/lavapipe 
both drivers have proper implementations

Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
a54cd0a83e llvmpipe/virgl/ci: update traces for aniso 
Acked-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Mike Blumenkrantz
1769ce3404 lavapipe: add support for anisotropic texturing 
Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
0d4d7594d1 llvmpipe: enable GL_ARB_texture_filter_anisotropic 
Update checksums as images are same as softpipe.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
0bb23ed6db draw: add sampler max_aniso query. 
Add support for draw shaders for retrieve max anisotropy.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
9cfcf3783b llvmpipe: add support for max aniso query. 
This just joins the sampler code to the llvmpipe shader stages.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
ce2b711c0a gallivm: add support for anisotropic sampling. 
This is a port of the softpipe anisotropic filtering
to llvmpipe. It should produce pretty similiar results.

This contains the proposed fix to the softpipe calculating
dq after scaling.

It also contains a number of other fixes around vector lengths
etc caught during test.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
a672f9ebf0 llvmpipe: add filter table shader accessor 
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
4366a77dae draw: add shader access to aniso filter table. 
This allows the draw shaders to access the global filter table
vis the context ptr.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Dave Airlie
848d4e7e43 gallivm: add anisotropic filter weight table. 
The anisotropic filtering needs access to a table of weights,
to make the calculations easier. This routes the table
through from shader parameter and makes it available for the
sampler code.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/8804>
 2021-07-21 10:19:51 +10:00
Mike Blumenkrantz
3a3748d999 gallium: add pipe_sampler_state::pad member 
when zeroing the struct without memset, this needs to be zeroed to avoid
garbage data in the padding

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11886>
 2021-07-20 23:41:50 +00:00
Jason Ekstrand
393ee837fb nir: Add a format field to _deref image intrinsics 
The rules here are the same as for texture instructions.  The bits on
the intrinsic are the ground truth and are allowed to vary from the
deref a bit as-needed.  If the intrinsic says PIPE_FORMAT_NONE, then we
can look at the variable, if visible, to get format information.  This
means that we need to be careful when we rewrite intrinsics based on the
deref to only override the format from the _deref intrinsic from the
image variable unless the intrinsic is PIPE_FORMAT_NONE.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>
 2021-07-20 23:18:22 +00:00
Jason Ekstrand
0b57272af8 nir: Set src_components = -1 for image intrinsic deref sources 
Semantically, -1 means "Unknown; don't validate" but it's really only
used for derefs because they often need to be flexible.  We don't really
need that flexibility for image intrinsics but this makes it more
consistent.  More immediately useful is that this gives us the ability
to tell _deref forms of these intrinsics apart from the lowered ones.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>
 2021-07-20 23:18:22 +00:00
Jason Ekstrand
c0afb60258 nir: Set IMAGE_DIM and IMAGE_ARRAY on deref intrinsics 
The rules here are the same as for texture instructions.  The bits on
the intrinsic are the ground truth and are allowed to vary from the
deref a bit as-needed.

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>
 2021-07-20 23:18:22 +00:00
Jason Ekstrand
ea7fcd5a97 glsl/nir: Use nir_ssa_undef() from nir_builder 
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11849>
 2021-07-20 23:18:22 +00:00
Iván Briano
0b9562a94a anv: Allow unused VkSpecializationMapEntries 
Fixes future CTS: dEQP-VK.pipeline.spec_constant.*.basic.*unused_*

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11987>
 2021-07-20 21:42:50 +00:00
Neha Bhende
b5e782f5f4 aux/draw: use nir_to_tgsi for draw shader in llvm path 
Some drivers doesn't support PIPE_SHADER_CAP_INTEGERS.
This leads to using load_ubo_vec4 which throws llvmpipe off the guard since
it doesn't expect load_ubo_vec4 in shader. Use nir_to_tgsi utility in
such a case.

This fixes crash seen with conform's mustpass.c, select.c and feedback.c.
Also, few gl-select related piglit tests exhibit same crash. Found in vmware's
internal testing

Reviewed-by: Charmaine Lee <charmainel@vmware.com>
Reviewed-by: Emma Anholt <emma@anholt.net>

v2: incorporated Emma's comments. Added check for PIPE_SHADER_CAP_INTEGERS and
remove PIPE_SHADER_IR_TGSI check

v3: As per Emma's comment, removed expected crashes for i915 piglit

v4: update expetcted passes

Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11911>
 2021-07-20 19:05:30 +00:00
Michel Zou
4c36224f95 zink: Fix unused-variable warning 
Fixes: 9b40fc48
Reviewed-by: Erik Faye-Lund <erik.faye-lund@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11920>
 2021-07-20 18:44:39 +00:00
Mike Blumenkrantz
50f9519ea5 nir/lower_point_size_mov: zero nir_state_slot::swizzle in new variable 
this is otherwise uninitialized during nir_serialize calls

Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11932>
 2021-07-20 16:34:51 +00:00
Mike Blumenkrantz
1132df843c freedreno: use new tc util for setting bytes_mapped_limit 
Acked-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>
 2021-07-20 13:49:01 +00:00
Mike Blumenkrantz
c3914bb2e8 zink: use new tc util for setting bytes_mapped_limit 
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>
 2021-07-20 13:49:01 +00:00
Mike Blumenkrantz
01414d435c radeonsi: use new tc util for setting bytes_mapped_limit 
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>
 2021-07-20 13:49:01 +00:00
Mike Blumenkrantz
671d579b46 util/tc: add a util function for setting bytes_mapped_limit 
tc drivers set this based on os_get_total_physical_memory()/divisor,
which is going to be totally wrong for 32bit processes and explode
the address space

this util function can be used to handle per-platform clamping

Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11853>
 2021-07-20 13:49:01 +00:00
Mike Blumenkrantz
3db856689d zink: add changed flag for blend states 
Reviewed-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11968>
 2021-07-20 13:12:55 +00:00