Commit Graph

17 Commits

Author SHA1 Message Date
Eric Anholt
ba965084b6 broadcom/vc5: Move texture return channel setup into the compiler.
The compiler decides how many LDTMUs we're going to emit, and that must
match the P1 flags.  This brings the return channel counting to a single
place (so all that's passed into the compiler is "how many return channels
you may request from this texture's format), and was a necessary step for
shadow samplers once we stop using OVRTMUOUT=0.
2018-01-03 14:25:23 -08:00
Eric Anholt
52f024b052 broadcom/vc5: Fix shader input/outputs for gallium's new NIR linking. 2017-12-14 14:36:17 -08:00
Eric Anholt
6a78416dab broadcom/vc5: Fix BASE_LEVEL handling with txl.
The HW doesn't add the base level anywhere (the min/max lod clamping is
what does base level), so we need to add it manually in this case.

Fixes piglit tex-miplevel-selection *Lod 2D.
2017-11-22 10:56:31 -08:00
Eric Anholt
87391e23cf broadcom/vc5: Ensure that there is always a TLB write.
This should fix some GPU hangs in our (currently always single-threaded)
fragment shaders, and definitely fixes assertion failures in simulation.
2017-11-17 16:09:55 -08:00
Eric Anholt
50906e4583 broadcom/vc5: Do 16-bit unpacking of integer texture returns properly.
We were doing f16 unpacks, which trashed "1" values.  Fixes many piglit
texwrap GL_EXT_texture_integer cases.
2017-11-07 12:58:03 -08:00
Eric Anholt
4d2619a6b3 broadcom/vc5: Stop lowering negates to subs.
In the case of fneg(0.0), we were getting back 0.0 instead of -0.0.  We
were also needing an immediate 0 value for ineg, when there's an opcode to
do the job properly.

Fixes fs-floatBitsToInt-neg.shader_test.
2017-10-30 13:31:28 -07:00
Eric Anholt
125f2a751e broadcom/vc5: Lower unpack_*_4x8 to normal math.
We only have 2x16 unpacking in our ALUs.  To enable this, we also need
lower_fdiv for its new instructions, which had been handled at a higher
level previously.
2017-10-30 13:31:16 -07:00
Eric Anholt
9b5fa214f4 broadcom/vc5: Use SETMSF to handle discards.
A bit of spec text suggested that (like vc4) condition codes should be
used for discards, and the simulator was fine with it, but the 7268
disagrees and you have to use SETMSF instead or the color comes through.
Fixes glsl-fs-discard-01 and many of the interpolation-with-clipping
tests.
2017-10-20 15:59:41 -07:00
Eric Anholt
a48a38937c broadcom/vc5: Set the snorm/unorm packing functions to be lowered.
We don't have native instructions for them, so set up the lowering.  Once
we support the bfi instructions that get generated, they should start
actually working.
2017-10-20 15:59:41 -07:00
Jason Ekstrand
59fb59ad54 nir: Get rid of nir_shader::stage
It's redundant with nir_shader::info::stage.

Acked-by: Timothy Arceri <tarceri@itsqueeze.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
2017-10-20 12:49:17 -07:00
Eric Anholt
4b7de2a360 broadcom/vc5: Add support for f32 render targets.
The TLB write code is getting ugly and needs a refactoring (that will
hopefully handle TLBU uniform coalescing as well).
2017-10-10 11:42:06 -07:00
Eric Anholt
dc25a83a7a broadcom/vc5: Start hooking up multiple render targets support.
We now emit as many TLB color writes as there are color buffers.
2017-10-10 11:42:05 -07:00
Eric Anholt
361c5f28bd broadcom/vc5: Fix handling of interp qualifiers on builtin color inputs.
The interpolation qualifier, if specified, is supposed to take precedence
over glShadeModel().
2017-10-10 11:42:05 -07:00
Eric Anholt
732a3a72cb broadcom/compiler: Set up passthrough Z when doing FS discards.
In order to keep early-Z from writing early in a discard shader, you need
to set the "modifies Z" bit in the shader state (which the new
prog_data.discards will indicate).  Then, in the shader we do a TLB write
to make Z passthrough happen (the QPU result is ignored, so we use a NULL
source).
2017-10-10 11:42:05 -07:00
Eric Anholt
4c4fbab345 broadcom/compiler: Don't forget the discard state on TLB Z writes.
We don't want to write Z for discarded fragments.
2017-10-10 11:42:05 -07:00
Eric Anholt
84939552d0 broadcom/compiler: Use defines instead of magic values in TLB write setup. 2017-10-10 11:42:05 -07:00
Eric Anholt
ade416d023 broadcom: Add VC5 NIR compiler.
This is a pretty straightforward fork of VC4's NIR compiler to VC5.  The
condition codes, registers, and I/O have all changed, making the backend
hard to share, though their heritage is still recognizable.

v2: Move to src/broadcom/compiler to match intel's layout, rename more
    "vc5" to "v3d", rename QIR to VIR ("V3D IR") to avoid symbol conflicts
    with vc4, use new v3d_debug header, add compiler init/free functions,
    do texture swizzling in NIR to allow optimization.
2017-10-10 11:42:04 -07:00