Commit Graph

3720 Commits

Author SHA1 Message Date
Jason Ekstrand
b4e38e174f anv: Move viewport/scissor emit to genX_cmd_buffer.c
There's never been a particularly good reason to stick these in gfx7/8.
We mostly did it to deduplicate the binary a bit but this shouldn't emit
all that much code.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 13:13:45 -05:00
Jason Ekstrand
2c04373c45 anv: Calculate the real guardband based on render area
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 13:13:45 -05:00
Jason Ekstrand
12d815bcac intel/guardband: Take min/max instead of total size
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 13:13:45 -05:00
Jason Ekstrand
3501a3f9ed anv: Convert to 100% dynamic rendering
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 13:13:36 -05:00
Jason Ekstrand
8112e6d601 anv: Drop pipeline pass/subpass in favor of rendering_info
This is about the only "small" change we can make in the process of
converting from render-pass-based to dynamic-rendering-based.  Make
everything in pipeline creation work in terms of dynamic rendering and
create the dynamic rendering structs from the render pass as-needed.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:16 -05:00
Jason Ekstrand
ee9c068043 anv/pipeline: Stop pretending we're the validator
This was ill-conceived at best.  Yes, it checks for a few error
conditions but it doesn't check much and what checks it has are very far
away from the code that relies on those invariants.  If we care about
these invariants, we should add asserts near the code that makes those
assumptions rather than pretending to be the validation layers.

Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:16 -05:00
Jason Ekstrand
2da152b5e6 anv: Stop treating color input attachments specially
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:15 -05:00
Jason Ekstrand
1ad0f1b004 anv/pass: Make unused color attachments VK_ATTACHMENT_UNUSED
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:15 -05:00
Jason Ekstrand
9bbecbed7a anv: Better null surface state size for dynamic rendering
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:15 -05:00
Jason Ekstrand
fff3f8bfe5 anv: Fix handling of null depth/stencil attachments with dynamic rendering
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:15 -05:00
Jason Ekstrand
83101429bf anv: Convert to vk_framebuffer
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14961>
2022-03-16 12:51:15 -05:00
Vadym Shovkoplias
550f48a826 anv: implement EXT_depth_clip_control
A new extension allowing the application to use the OpenGL depth
range in NDC, i.e. with depth in range [-1, 1], as opposed to
Vulkan’s default of [0, 1].

v2:
- call gfx8_cmd_buffer_emit_viewport on ANV_CMD_DIRTY_PIPELINE (Jason)
- remove redundant !! operator since negativeOneToOne must be true or
  false (Tapani)
- coding style changes (Lionel)

Gitlab: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6070
Signed-off-by: Vadym Shovkoplias <vadym.shovkoplias@globallogic.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15304>
2022-03-16 11:22:24 +00:00
Lionel Landwerlin
a54f5e8e00 anv: silence compiler warnings
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6146
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15387>
2022-03-16 01:02:05 +00:00
Jason Ekstrand
0b4a80b4c4 anv: Use vk_shader_module_to_nir()
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15305>
2022-03-15 23:13:16 +00:00
Jason Ekstrand
d65dbe8018 anv: Allow MSAA resolve with different numbers of planes
The Vulkan spec for VK_KHR_depth_stencil_resolve allows a format
mismatch between the primary attachment and the resolve attachment
within certain limits.  In particular,

    VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03181

    If pDepthStencilResolveAttachment is not NULL and does not have the
    value VK_ATTACHMENT_UNUSED and VkFormat of
    pDepthStencilResolveAttachment has a depth component, then the
    VkFormat of pDepthStencilAttachment must have a depth component with
    the same number of bits and numerical type

    VUID-VkSubpassDescriptionDepthStencilResolve-pDepthStencilResolveAttachment-03182

    If pDepthStencilResolveAttachment is not NULL and does not have the
    value VK_ATTACHMENT_UNUSED, and VkFormat of
    pDepthStencilResolveAttachment has a stencil component, then the
    VkFormat of pDepthStencilAttachment must have a stencil component
    with the same number of bits and numerical type

So you can resolve from a depth/stencil format to a depth-only or
stencil-only format so long as the number of bits matches.
Unfortunately, this has never been tested because the CTS tests which
purport to test this are broken and actually test with a destination
combined depth/stencil format.

Fixes: 5e4f9ea363 ("anv: Implement VK_KHR_depth_stencil_resolve")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15333>
2022-03-11 22:25:42 +00:00
Lionel Landwerlin
6cea8a43fa anv: silence compiler warning
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
2022-03-11 08:47:15 +00:00
Lionel Landwerlin
90000aea9b anv: make a couple of descriptor function private
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
2022-03-11 08:47:15 +00:00
Lionel Landwerlin
e12698724e anv: rename host only descriptor internal flag
We add an assert to verify that those are not bound.

v2: Drop != 0 (Tapani)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
2022-03-11 08:47:15 +00:00
Lionel Landwerlin
87f59b18cf anv: don't lazy allocate surface states in descriptor sets
In 4001d9ce1a we started lazily allocating surface states in the
descriptor sets rather than upfront in the descriptor pool. This was
to workaround vkd3d-proton allocating more than we could handle at the
HW level.

The issue introduced in that change is that we didn't protect the
descriptor pool free list as well as the anv_state_stream which are
now potentially used from different threads through the descriptor set
write functions.

This reverts the lazy allocation part of that change. Host only
descriptor sets changes remain.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 4001d9ce1a ("anv: Handle VK_DESCRIPTOR_POOL_CREATE_HOST_ONLY_BIT_VALVE for descriptor sets")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
2022-03-11 08:47:15 +00:00
Lionel Landwerlin
71cd6a7b84 anv: fix acceleration structure descriptor copies
We're not supposed to have a
VkWriteDescriptorSetAccelerationStructureKHR when doing a copy. We
should instead get the acceleration structure object from the source
descriptor.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 03e1e19246 ("anv: Refactor descriptor copy")
Reviewed-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15241>
2022-03-11 08:47:15 +00:00
Mike Blumenkrantz
5ab0e3f0bb anv: fix some dynamic rasterization discard cases in pipeline construction
cc: mesa-stable

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15280>
2022-03-11 04:02:02 +00:00
Mike Blumenkrantz
1e3e7b3a4d anv: fix CmdSetColorWriteEnableEXT for maximum rts
Fixes: b15bfe92f7 ("anv: implement VK_EXT_color_write_enable")

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15280>
2022-03-11 04:02:02 +00:00
Mike Blumenkrantz
52f6978484 anv: fix xfb usage with rasterizer discard
in the initial implementation, a stream like:

* CmdBeginTransformFeedbackEXT
* CmdSetRasterizerDiscardEnableEXT
* CmdDraw
* CmdEndTransformFeedbackEXT
* CmdBeginTransformFeedbackEXT
* CmdDraw
* CmdEndTransformFeedbackEXT

would never enable transform feedback, as it only checked for the change
in rasterizer_discard state

Fixes: 4d531c67df ("anv: support rasterizer discard dynamic state")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15269>
2022-03-11 03:37:17 +00:00
Marcin Ślusarz
823cffbe1c anv: include Primitive Header in mesh shader per-primitive output
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15303>
2022-03-09 16:52:59 +00:00
Marcin Ślusarz
f410c1142f anv: set number of viewports in clip state (mesh)
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15303>
2022-03-09 16:52:59 +00:00
Kenneth Graunke
e3a0e97300 intel: Limit Wa_1607854226 to Gfx12.0 only
This workaround is needed on all Gfx12.0 parts, but doesn't appear to be
necessary on XeHP.  The other drivers do not appear to be applying this
workaround on those parts.  As further evidence, we accidentally added
the 3DSTATE_BINDING_TABLE_POOL_ALLOC commands after switching back to
GPGPU mode, which would be an incorrect way to implement the workaround,
and things seem to be working.

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14507>
2022-03-09 09:18:59 +00:00
Jason Ekstrand
a83c91a261 blorp: Add a binding_table_offset_to_pointer helper
On Gen11+, we have a feature that requires us to shift binding table
offsets by 3.  This adds a helper which gives the driver a hook to do
this if it so chooses.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14507>
2022-03-09 09:18:59 +00:00
Nanley Chery
c1a7d520f3 anv: Disable aux if the explicit modifier lacks it
For dmabuf imports, configure the primary surface without support for
compression if the modifier doesn't specify it. This helps to create VkImages
with memory requirements that are compatible with the buffers apps provide.

Suggested-by: Philip Langdale <philipl@overt.org>
Cc: 22.0 <mesa-stable>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5940
Tested-by: Philip Langdale <philipl@overt.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15181>
2022-03-01 20:05:50 +00:00
Nanley Chery
cada519482 anv: Refactor anv_image_init_from_create_info
Use a variable to store the anv_image_create_info struct. We'll modify it for a
bug fix in the next patch.

Cc: 22.0 <mesa-stable>
Tested-by: Philip Langdale <philipl@overt.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15181>
2022-03-01 20:05:50 +00:00
Nanley Chery
8d2b7e558b anv: Change a parameter of the implicit layout fn
Replace the create_info parameter with isl_extra_usage_flags to more closely
match the parameters of explicit layout function.

Tested-by: Philip Langdale <philipl@overt.org>
Reviewed-by: Tapani Pälli <tapani.palli@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15181>
2022-03-01 20:05:50 +00:00
Lionel Landwerlin
214092da87 anv: fix fast clear type value with external images
Disable fast clear if not supported by the external modifier.

v2: Set fast_clear value to NONE in case of import/export from/to external

v3: Move logic next to existing acquire/release checks (Nanley)

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6056
Reviewed-by: Nanley Chery <nanley.g.chery@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15096>
2022-03-01 17:37:13 +00:00
Nanley Chery
dc05615ec1 Revert "anv: Require the local heap for CCS on XeHP"
This reverts commit 382f6ccda8.

The spec requires that all color images created with the same tiling
(and a few other properties) support the same memoryTypeBits. So this
wasn't a valid change. It also wasn't necessary - we already have a
mechanism in anv_BindImageMemory2 for disabling compression if the BO
doesn't support it.

With this, XeHP passes the tests in
dEQP-VK.memory.requirements.*tiling_optimal

Fixes: 382f6ccd ("anv: Require the local heap for CCS on XeHP")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Nanley Chery
203c8be09f anv: Add a perf warning in anv_BindImageMemory2
It reports: "BO lacks implicit CCS. Disabling the CCS aux usage."

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Nanley Chery
74e446b45b anv: Fall back to HiZ when disabling CCS on HiZ+CCS
When an image configured for HIZ_CCS/HIZ_CCS_WT is bound to a BO lacking
implicit CCS, we disable any compression it may have had. Such images
are still compatible with ISL_AUX_USAGE_HIZ however. Fall back to that
aux usage to retain the performance benefit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Nanley Chery
ffbde42b93 anv: Don't disable HiZ/MCS in anv_BindImageMemory2
When an image is bound to a BO lacking implicit CCS, we disable any
compression it may have had. This is unnecessary in the cases where the
compression type doesn't depend on the BO having implicit CCS support.
Avoid this disabling for ISL_AUX_USAGE_MCS and ISL_AUX_USAGE_HIZ.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15068>
2022-03-01 00:02:51 +00:00
Jordan Justen
0fffaa9fca anv: Align state pools to 2MiB on XeHP
Suggested-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Fixes: c17e2216dd ("anv: Align buffer VMA to 2MiB for XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15054>
2022-02-23 20:15:24 +00:00
Jordan Justen
5a28d2482f anv: Align GENERAL_STATE_POOL_MIN_ADDRESS to 2MiB
Fixes: c17e2216dd ("anv: Align buffer VMA to 2MiB for XeHP")
Signed-off-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15054>
2022-02-23 20:15:24 +00:00
Rhys Perry
ded9cb904f anv: Enable nir_opt_access
This commit will enable pass for searching readonly / writeonly
access when it's missing.

We don't support shaderStorageImageReadWithoutFormat
and the optimization pass causes those shaders to
take the write-only path which does support formatless.

Following games are affected with positive result:
 - Wolfenstein: Youngblood
 - Wolfenstein II: The New Colossus https://gitlab.freedesktop.org/mesa/mesa/-/issues/3138
 - Rage 2 https://gitlab.freedesktop.org/mesa/mesa/-/issues/5791
 - The Surge 2 https://gitlab.freedesktop.org/mesa/mesa/-/issues/5805
 - Metro Exodus https://gitlab.freedesktop.org/mesa/mesa/-/issues/4703
 - DOOM Eternal https://gitlab.freedesktop.org/mesa/mesa/-/issues/4273

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/3138,https://gitlab.freedesktop.org/mesa/mesa/-/issues/5791,https://gitlab.freedesktop.org/mesa/mesa/-/issues/4273
Signed-off-by: Mykhailo Skorokhodov <mykhailo.skorokhodov@globallogic.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15082>
2022-02-23 13:11:12 +00:00
Kenneth Graunke
c46d3acf0e anv: Raise vertex input bindings and attributes limits slightly
This raises our vertex input bindings limit from 28 to 31, and our
vertex input attribute limit from 28 to 29.  We could theoretically
go higher, but it will take additional work.

The 3DSTATE_VERTEX_BUFFERS and 3DSTATE_VERTEX_ELEMENTS limits are 33
vertex buffers, and 34 vertex elements.  But we need up to two vertex
elements for system values (FirstVertex, BaseVertex, BaseInstance,
DrawID), and we currently use two vertex bindings for those.

There is another hidden limit: our compiler backend only supports the
push model for VS inputs currently.  3DSTATE_VS only allows URB Read
Lengths between [0, 15], which is measured in pairs of inputs, which
means we can theoretically push no more than 32 vertex elements.  This
is no artifical limit either, as a vec4 element takes up 4 registers
in the payload, and 32 * 4 = 128, the entire size of our register file.
Plus, the VS Thread payload needs at least g0 and g1 for other things,
so we can really only push 31.

We can theoretically support one additional binding, by combining our
two SGV bindings into a single upload.  In order to support additional
vertex elements, we would need to add support to the backend compiler
for the pull model for VS inputs.

References: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5917
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14991>
2022-02-22 21:31:06 +00:00
Marcin Ślusarz
fddab17e54 anv: cleanup begin_subpass & end_subpass
Share values of some expressions instead of duplicating the same logic.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Acked-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15079>
2022-02-22 09:09:05 +00:00
Marcin Ślusarz
037e98a10c anv: don't set color state when input state was requested
Fixes: 814dc66935 ("anv: Allocate surface states per-subpass")

Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15081>
2022-02-21 08:45:05 +00:00
Lionel Landwerlin
2763a8af5a anv/genxml/intel/fs: fix binding shader record entry
Bit is flipped compared to all the other packets.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 705395344d ("intel/fs: Add support for compiling bindless shaders with resume shaders")
Fixes: c3ac9afca3 ("anv: Create and return ray-tracing pipeline SBT handles")
Acked-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15078>
2022-02-19 13:50:56 +00:00
Kenneth Graunke
4ed9fd62c9 anv: Lower bufferImageGranularity to 1 from 64
The Vulkan 1.3 spec says:

   "The implementation-dependent limit bufferImageGranularity specifies
    a page-like granularity at which linear and non-linear resources
    must be placed in adjacent memory locations to avoid aliasing.  Two
    resources which do not satisfy this granularity requirement are said
    to alias. bufferImageGranularity is specified in bytes, and must be
    a power of two.  Implementations which do not impose a granularity
    restriction may report a bufferImageGranularity value of one.

    Note: Despite its name, bufferImageGranularity is really a
    granularity between "linear" and "non-linear" resources."

We set this limit to 64 bytes (a cacheline) at the dawn of time, without
any real rationale attached.  There shouldn't be any restrictions here.
Our tile sizes are typically 4K, and tiled resource addresses are
aligned to the tile size, and the extent is also a multiple of the tile
sized.  So if a linear resource occurs before a tiled one, there will
naturally be some space due to the alignment of the tiled resource's
starting address.  If a linear resource occurs after a tiled one, the
tiled resource's ending address is already 4K aligned, which is already
guaranteeing that they won't share a cacheline.

So I think it should be fine to reduce this to 1.  The other Vulkan
driver for our hardware seems to advertise 1 here as well.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15066>
2022-02-18 09:52:00 +00:00
Lionel Landwerlin
7a52286215 anv: add a custom AcquireNextImage2KHR func
So that we can plug our intel_measure framework.

Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Reviewed-by: Felix DeGrood <felix.j.degrood@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>
2022-02-17 22:15:23 +00:00
Felix DeGrood
6e939ca865 anv/measure: Fix INTEL_MEASURE for ANV
INTEL_MEASURE broke while implementing the common sync and submit
framework. Re-adding missing INTEL_MEASURE entry point for
command buffer submit.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14998>
2022-02-17 22:15:23 +00:00
Jason Ekstrand
df0e2a1565 anv: Don't assume depth/stencil attachments have depth
If a secondary command buffer is used and the client provides a
framebuffer and that framebuffer has a stencil-only attchment, we would
try to get the aux usage for the depth component of that attachment and
crash.  Check the aspects of the image before looking at aux usage.
This fixes at least the following SkQP tests on my Tigerlake:

 - vk_circular-clips
 - vk_filterfastbounds
 - vk_innershapes_bw
 - vk_lineclosepath
 - vk_multipicturedraw_rrectclip_simple
 - vk_pathinvfill
 - vk_quadclosepath
 - vk_rrect_clip_bw
 - vk_windowrectangles

Fixes: 0d8b9c529c ("anv: Allow PMA optimization to be enabled in secondary command buffers")
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Tested-by: Matt Turner <mattst88@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15048>
2022-02-16 23:02:09 +00:00
Iván Briano
11544435ad anv: only advertise 64b atomic floats if 64b floats are supported
Cc: 22.0 <mesa-stable>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15039>
2022-02-16 21:36:42 +00:00
Jason Ekstrand
9cbcdfb514 anv: use vk_image_view::format for creating dynamic renderpasses
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Jason Ekstrand
05e9e7767d vulkan: Rename vk_image_view::format to view_format
When I originally added vk_image_view, I was overly clever when it came
to the format field.  I decided to make it only contain the bits of the
format contained in the selected aspects.  However, this is confusing
(not generally a good thing) and it's also not always what you want.
The Vulkan 1.3.204 spec says:

    "When using an image view of a depth/stencil image to populate a
    descriptor set (e.g. for sampling in the shader, or for use as an
    input attachment), the aspectMask must only include one bit, which
    selects whether the image view is used for depth reads (i.e. using a
    floating-point sampler or input attachment in the shader) or stencil
    reads (i.e. using an unsigned integer sampler or input attachment in
    the shader). When an image view of a depth/stencil image is used as
    a depth/stencil framebuffer attachment, the aspectMask is ignored
    and both depth and stencil image subresources are used."

So, while the restricted format makes sense for texturing, it doesn't
for when the image is being used as an attachment.  What we probably
actually want is both versions of the format.  We'll call the one given
by the VkImageViewCreateInfo vk_image_view::format and the restricted
one vk_image_view::view_format.

This is just the first commit which switches format to view_format so
the compiler will make sure we get them all.  The next commit will
re-add vk_image_view::format but this time unmodified.

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/15007>
2022-02-16 00:14:50 +00:00
Rohan Garg
4001d9ce1a anv: Handle VK_DESCRIPTOR_POOL_CREATE_HOST_ONLY_BIT_VALVE for descriptor sets
Ensure that surface state does not get created for
VK_DESCRIPTOR_POOL_CREATE_HOST_ONLY_BIT_VALVE and we don't bind to the
binding table for descriptor sets created with this pool.

Signed-off-by: Rohan Garg <rohan.garg@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/14683>
2022-02-11 12:03:42 +00:00